From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, peter.maydell@linaro.org, f4bug@amsat.org
Subject: [Qemu-devel] [PATCH] target/arm: Optimize aa64 rev16
Date: Mon, 17 Jul 2017 20:39:07 -1000 [thread overview]
Message-ID: <20170718063907.23525-1-rth@twiddle.net> (raw)
It is much shorter to reverse all 4 half-words in parallel
than extract, reverse, and deposit each in turn.
Suggested-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
target/arm/translate-a64.c | 24 ++++++------------------
1 file changed, 6 insertions(+), 18 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index e55547d..6b247a7 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -4042,25 +4042,13 @@ static void handle_rev16(DisasContext *s, unsigned int sf,
TCGv_i64 tcg_rd = cpu_reg(s, rd);
TCGv_i64 tcg_tmp = tcg_temp_new_i64();
TCGv_i64 tcg_rn = read_cpu_reg(s, rn, sf);
+ TCGv_i64 mask = tcg_const_i64(sf ? 0x00ff00ff00ff00ffull : 0x00ff00ff);
- tcg_gen_andi_i64(tcg_tmp, tcg_rn, 0xffff);
- tcg_gen_bswap16_i64(tcg_rd, tcg_tmp);
-
- tcg_gen_shri_i64(tcg_tmp, tcg_rn, 16);
- tcg_gen_andi_i64(tcg_tmp, tcg_tmp, 0xffff);
- tcg_gen_bswap16_i64(tcg_tmp, tcg_tmp);
- tcg_gen_deposit_i64(tcg_rd, tcg_rd, tcg_tmp, 16, 16);
-
- if (sf) {
- tcg_gen_shri_i64(tcg_tmp, tcg_rn, 32);
- tcg_gen_andi_i64(tcg_tmp, tcg_tmp, 0xffff);
- tcg_gen_bswap16_i64(tcg_tmp, tcg_tmp);
- tcg_gen_deposit_i64(tcg_rd, tcg_rd, tcg_tmp, 32, 16);
-
- tcg_gen_shri_i64(tcg_tmp, tcg_rn, 48);
- tcg_gen_bswap16_i64(tcg_tmp, tcg_tmp);
- tcg_gen_deposit_i64(tcg_rd, tcg_rd, tcg_tmp, 48, 16);
- }
+ tcg_gen_shri_i64(tcg_tmp, tcg_rn, 8);
+ tcg_gen_and_i64(tcg_rd, tcg_rn, mask);
+ tcg_gen_and_i64(tcg_tmp, tcg_tmp, mask);
+ tcg_gen_shli_i64(tcg_rd, tcg_rd, 8);
+ tcg_gen_or_i64(tcg_rd, tcg_rd, tcg_tmp);
tcg_temp_free_i64(tcg_tmp);
}
--
2.9.4
reply other threads:[~2017-07-18 6:39 UTC|newest]
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