From: David Gibson <david@gibson.dropbear.id.au>
To: "Cédric Le Goater" <clg@kaod.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Alexander Graf <agraf@suse.de>,
qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [RFC PATCH 04/26] ppc/xive: introduce a skeleton for the XIVE interrupt controller model
Date: Wed, 19 Jul 2017 13:08:49 +1000 [thread overview]
Message-ID: <20170719030849.GQ3140@umbus.fritz.box> (raw)
In-Reply-To: <1499274819-15607-5-git-send-email-clg@kaod.org>
[-- Attachment #1: Type: text/plain, Size: 8630 bytes --]
On Wed, Jul 05, 2017 at 07:13:17PM +0200, Cédric Le Goater wrote:
> Let's provide an empty shell for the XIVE controller model with a
> couple of attributes for the IRQ number allocator. The latter is
> largely inspired by OPAL which allocates IPI IRQ numbers from the
> bottom of the IRQ number space and allocates the HW IRQ numbers from
> the top.
>
> The number of IPIs is simply deduced from the max number of CPUs the
> guest supports and we provision a arbitrary number of HW irqs.
>
> The XIVE object is kept private because it will hold internal tables
> which do not need to be exposed to sPAPR.
>
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
> ---
> default-configs/ppc64-softmmu.mak | 1 +
> hw/intc/Makefile.objs | 1 +
> hw/intc/xive-internal.h | 28 ++++++++++++
> hw/intc/xive.c | 94 +++++++++++++++++++++++++++++++++++++++
> include/hw/ppc/xive.h | 27 +++++++++++
> 5 files changed, 151 insertions(+)
> create mode 100644 hw/intc/xive-internal.h
> create mode 100644 hw/intc/xive.c
> create mode 100644 include/hw/ppc/xive.h
>
> diff --git a/default-configs/ppc64-softmmu.mak b/default-configs/ppc64-softmmu.mak
> index 46c95993217d..1179c07e6e9f 100644
> --- a/default-configs/ppc64-softmmu.mak
> +++ b/default-configs/ppc64-softmmu.mak
> @@ -56,6 +56,7 @@ CONFIG_SM501=y
> CONFIG_XICS=$(CONFIG_PSERIES)
> CONFIG_XICS_SPAPR=$(CONFIG_PSERIES)
> CONFIG_XICS_KVM=$(and $(CONFIG_PSERIES),$(CONFIG_KVM))
> +CONFIG_XIVE=$(CONFIG_PSERIES)
> # For PReP
> CONFIG_SERIAL_ISA=y
> CONFIG_MC146818RTC=y
> diff --git a/hw/intc/Makefile.objs b/hw/intc/Makefile.objs
> index 78426a7dafcd..28b83456bfcc 100644
> --- a/hw/intc/Makefile.objs
> +++ b/hw/intc/Makefile.objs
> @@ -35,6 +35,7 @@ obj-$(CONFIG_SH4) += sh_intc.o
> obj-$(CONFIG_XICS) += xics.o
> obj-$(CONFIG_XICS_SPAPR) += xics_spapr.o
> obj-$(CONFIG_XICS_KVM) += xics_kvm.o
> +obj-$(CONFIG_XIVE) += xive.o
> obj-$(CONFIG_POWERNV) += xics_pnv.o
> obj-$(CONFIG_ALLWINNER_A10_PIC) += allwinner-a10-pic.o
> obj-$(CONFIG_S390_FLIC) += s390_flic.o
> diff --git a/hw/intc/xive-internal.h b/hw/intc/xive-internal.h
> new file mode 100644
> index 000000000000..155c2dcd6066
> --- /dev/null
> +++ b/hw/intc/xive-internal.h
> @@ -0,0 +1,28 @@
> +/*
> + * Copyright 2016,2017 IBM Corporation.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * as published by the Free Software Foundation; either version
> + * 2 of the License, or (at your option) any later version.
> + */
> +#ifndef _INTC_XIVE_INTERNAL_H
> +#define _INTC_XIVE_INTERNAL_H
> +
> +#include <hw/sysbus.h>
> +
> +struct XIVE {
> + SysBusDevice parent;
XIVE probably shouldn't be a SysBusDevice. According to agraf, that
should only be used for things which have an MMIO presence on a bus
structure that's not worth the bother of more specifically modelling.
I don't think that's the case for XIVE, so it should just have
TYPE_DEVICE as its parent. There are several pseries things which
already get this wrong (mostly because I made them before fully
understanding the role of the SysBus), but we should avoid adding
others.
> + /* Properties */
> + uint32_t nr_targets;
> +
> + /* IRQ number allocator */
> + uint32_t int_count; /* Number of interrupts: nr_targets + HW IRQs */
> + uint32_t int_base; /* Min index */
> + uint32_t int_max; /* Max index */
> + uint32_t int_hw_bot; /* Bottom index of HW IRQ allocator */
> + uint32_t int_ipi_top; /* Highest IPI index handed out so far + 1 */
> +};
> +
> +#endif /* _INTC_XIVE_INTERNAL_H */
> diff --git a/hw/intc/xive.c b/hw/intc/xive.c
> new file mode 100644
> index 000000000000..5b4ea915d87c
> --- /dev/null
> +++ b/hw/intc/xive.c
> @@ -0,0 +1,94 @@
> +/*
> + * QEMU PowerPC XIVE model
> + *
> + * Copyright (c) 2017, IBM Corporation.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License, version 2, as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, see <http://www.gnu.org/licenses/>.
> + */
> +#include "qemu/osdep.h"
> +#include "qemu/log.h"
> +#include "qapi/error.h"
> +#include "target/ppc/cpu.h"
> +#include "sysemu/cpus.h"
> +#include "sysemu/dma.h"
> +#include "monitor/monitor.h"
> +#include "hw/ppc/xive.h"
> +
> +#include "xive-internal.h"
> +
> +/*
> + * Main XIVE object
As with XICs, does it really make sense for there to be a "main" XIVE
object, or should be an interface attached to the machine?
> + */
> +
> +/* Let's provision some HW IRQ numbers. We could use a XIVE property
> + * also but it does not seem necessary for the moment.
> + */
> +#define MAX_HW_IRQS_ENTRIES (8 * 1024)
> +
> +static void xive_init(Object *obj)
> +{
> + ;
> +}
> +
> +static void xive_realize(DeviceState *dev, Error **errp)
> +{
> + XIVE *x = XIVE(dev);
> +
> + if (!x->nr_targets) {
> + error_setg(errp, "Number of interrupt targets needs to be greater 0");
> + return;
> + }
> +
> + /* Initialize IRQ number allocator. Let's use a base number if we
> + * need to introduce a notion of blocks one day.
> + */
> + x->int_base = 0;
> + x->int_count = x->nr_targets + MAX_HW_IRQS_ENTRIES;
> + x->int_max = x->int_base + x->int_count;
> + x->int_hw_bot = x->int_max;
> + x->int_ipi_top = x->int_base;
> +
> + /* Reserve some numbers as OPAL does ? */
> + if (x->int_ipi_top < 0x10) {
> + x->int_ipi_top = 0x10;
> + }
I'm somewhat uncomfortable with an irq allocater here in the intc
code. As a rule, irq allocation is the responsibility of the machine,
not any sub-component. Furthermore, it should allocate in a way which
is repeatable, since they need to stay stable across reboots and
migrations.
And, yes, we have an allocator of sorts in XICS - it has caused a
number of problems in the past.
> +}
> +
> +static Property xive_properties[] = {
> + DEFINE_PROP_UINT32("nr-targets", XIVE, nr_targets, 0),
> + DEFINE_PROP_END_OF_LIST(),
> +};
> +
> +static void xive_class_init(ObjectClass *klass, void *data)
> +{
> + DeviceClass *dc = DEVICE_CLASS(klass);
> +
> + dc->realize = xive_realize;
> + dc->props = xive_properties;
> + dc->desc = "XIVE";
> +}
> +
> +static const TypeInfo xive_info = {
> + .name = TYPE_XIVE,
> + .parent = TYPE_SYS_BUS_DEVICE,
> + .instance_init = xive_init,
> + .instance_size = sizeof(XIVE),
> + .class_init = xive_class_init,
> +};
> +
> +static void xive_register_types(void)
> +{
> + type_register_static(&xive_info);
> +}
> +
> +type_init(xive_register_types)
> diff --git a/include/hw/ppc/xive.h b/include/hw/ppc/xive.h
> new file mode 100644
> index 000000000000..863f5a9c6b5f
> --- /dev/null
> +++ b/include/hw/ppc/xive.h
> @@ -0,0 +1,27 @@
> +/*
> + * QEMU PowerPC XIVE model
> + *
> + * Copyright (c) 2017, IBM Corporation.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License, version 2, as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, see <http://www.gnu.org/licenses/>.
> + */
> +
> +#ifndef PPC_XIVE_H
> +#define PPC_XIVE_H
> +
> +typedef struct XIVE XIVE;
> +
> +#define TYPE_XIVE "xive"
> +#define XIVE(obj) OBJECT_CHECK(XIVE, (obj), TYPE_XIVE)
> +
> +#endif /* PPC_XIVE_H */
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
next prev parent reply other threads:[~2017-07-19 3:26 UTC|newest]
Thread overview: 122+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-05 17:13 [Qemu-devel] [RFC PATCH 00/26] guest exploitation of the XIVE interrupt controller (POWER9) Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 01/26] spapr: introduce the XIVE_EXPLOIT option in CAS Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 02/26] spapr: populate device tree depending on XIVE_EXPLOIT option Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 03/26] target/ppc/POWER9: add POWERPC_EXCP_POWER9 Cédric Le Goater
2017-07-10 10:26 ` David Gibson
2017-07-10 12:49 ` Cédric Le Goater
2017-07-10 21:00 ` Benjamin Herrenschmidt
2017-07-11 9:01 ` Cédric Le Goater
2017-07-11 13:27 ` David Gibson
2017-07-11 13:52 ` Cédric Le Goater
2017-07-11 21:20 ` Benjamin Herrenschmidt
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 04/26] ppc/xive: introduce a skeleton for the XIVE interrupt controller model Cédric Le Goater
2017-07-19 3:08 ` David Gibson [this message]
2017-07-19 3:23 ` David Gibson
2017-07-19 3:56 ` Benjamin Herrenschmidt
2017-07-19 4:01 ` David Gibson
2017-07-19 4:18 ` Benjamin Herrenschmidt
2017-07-19 4:25 ` David Gibson
2017-07-19 4:02 ` Benjamin Herrenschmidt
2017-07-21 7:50 ` David Gibson
2017-07-21 8:21 ` Benjamin Herrenschmidt
2017-07-24 3:28 ` David Gibson
2017-07-24 3:53 ` Alexey Kardashevskiy
2017-07-24 5:04 ` Benjamin Herrenschmidt
2017-07-24 5:38 ` David Gibson
2017-07-24 7:20 ` Benjamin Herrenschmidt
2017-07-24 10:03 ` David Gibson
2017-07-25 8:52 ` Cédric Le Goater
2017-07-25 12:39 ` David Gibson
2017-07-25 13:48 ` Cédric Le Goater
2017-07-24 13:00 ` Cédric Le Goater
2017-07-25 1:26 ` [Qemu-devel] [Qemu-ppc] " Alexey Kardashevskiy
2017-07-25 2:17 ` David Gibson
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 05/26] ppc/xive: define XIVE internal tables Cédric Le Goater
2017-07-19 3:24 ` David Gibson
2017-07-24 12:52 ` Cédric Le Goater
2017-07-25 2:16 ` David Gibson
2017-07-25 15:54 ` Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 06/26] ppc/xive: introduce a XIVE interrupt source model Cédric Le Goater
2017-07-24 4:02 ` David Gibson
2017-07-24 6:00 ` Alexey Kardashevskiy
2017-07-24 15:20 ` Cédric Le Goater
2017-07-25 3:06 ` Alexey Kardashevskiy
2017-07-24 15:13 ` Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 07/26] ppc/xive: add MMIO handlers to the XIVE interrupt source Cédric Le Goater
2017-07-24 4:29 ` David Gibson
2017-07-24 8:56 ` Benjamin Herrenschmidt
2017-07-24 15:55 ` Cédric Le Goater
2017-07-25 12:21 ` David Gibson
2017-07-25 15:42 ` Cédric Le Goater
2017-07-24 6:50 ` Alexey Kardashevskiy
2017-07-24 15:39 ` Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 08/26] ppc/xive: add flags " Cédric Le Goater
2017-07-24 4:36 ` David Gibson
2017-07-24 7:00 ` Benjamin Herrenschmidt
2017-07-24 9:50 ` David Gibson
2017-07-24 11:07 ` Benjamin Herrenschmidt
2017-07-24 11:47 ` Cédric Le Goater
2017-07-25 4:19 ` David Gibson
2017-07-25 5:49 ` Benjamin Herrenschmidt
2017-07-25 4:18 ` David Gibson
2017-07-25 5:47 ` Benjamin Herrenschmidt
2017-07-25 8:28 ` Cédric Le Goater
2017-07-25 12:24 ` David Gibson
2017-07-25 8:17 ` Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 09/26] ppc/xive: add an overall memory region for the ESBs Cédric Le Goater
2017-07-24 4:49 ` David Gibson
2017-07-24 6:09 ` Benjamin Herrenschmidt
2017-07-24 6:39 ` David Gibson
2017-07-24 13:27 ` Cédric Le Goater
2017-07-25 2:19 ` David Gibson
2017-07-24 13:25 ` Cédric Le Goater
2017-07-25 2:19 ` David Gibson
2017-07-25 9:50 ` Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 10/26] ppc/xive: record interrupt source MMIO address for hcalls Cédric Le Goater
2017-07-24 5:11 ` David Gibson
2017-07-24 13:45 ` Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 11/26] ppc/xics: introduce a print_info() handler to the ICS and ICP objects Cédric Le Goater
2017-07-24 5:13 ` David Gibson
2017-07-24 13:58 ` Cédric Le Goater
2017-07-25 13:26 ` David Gibson
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 12/26] ppc/xive: add a print_info() handler for the interrupt source Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 13/26] ppc/xive: introduce a XIVE interrupt presenter model Cédric Le Goater
2017-07-24 6:05 ` David Gibson
2017-07-24 14:02 ` Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 14/26] ppc/xive: add MMIO handlers to the " Cédric Le Goater
2017-07-24 6:35 ` David Gibson
2017-07-24 14:44 ` Cédric Le Goater
2017-07-25 4:20 ` David Gibson
2017-07-25 9:08 ` Cédric Le Goater
2017-07-25 13:21 ` David Gibson
2017-07-25 15:01 ` Cédric Le Goater
2017-07-26 2:02 ` David Gibson
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 15/26] ppc/xive: push EQ data in OS event queues Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 16/26] ppc/xive: notify CPU when interrupt priority is more privileged Cédric Le Goater
2017-09-09 7:39 ` Benjamin Herrenschmidt
2017-09-09 8:08 ` Cédric Le Goater
2017-09-09 8:40 ` Benjamin Herrenschmidt
2017-09-09 8:24 ` Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 17/26] ppc/xive: add hcalls support Cédric Le Goater
2017-07-24 9:39 ` [Qemu-devel] [Qemu-ppc] " Alexey Kardashevskiy
2017-07-24 14:55 ` Cédric Le Goater
2017-07-25 2:09 ` Alexey Kardashevskiy
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 18/26] ppc/xive: add device tree support Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 19/26] ppc/xive: introduce a helper to map the XIVE memory regions Cédric Le Goater
2017-07-25 2:54 ` [Qemu-devel] [Qemu-ppc] " Alexey Kardashevskiy
2017-07-25 9:18 ` Cédric Le Goater
2017-07-25 14:16 ` Alexey Kardashevskiy
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 20/26] ppc/xive: introduce a helper to create XIVE interrupt source objects Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 21/26] ppc/xive: introduce routines to allocate IRQ numbers Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 22/26] ppc/xive: create an XIVE interrupt source to handle IPIs Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 23/26] spapr: add a XIVE object to the sPAPR machine Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 24/26] spapr: include the XIVE interrupt source for IPIs Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 25/26] spapr: print the XIVE interrupt source for IPIs in the monitor Cédric Le Goater
2017-07-05 17:13 ` [Qemu-devel] [RFC PATCH 26/26] spapr: force XIVE exploitation mode for POWER9 (HACK) Cédric Le Goater
2017-07-25 2:43 ` [Qemu-devel] [Qemu-ppc] " Alexey Kardashevskiy
2017-07-25 9:20 ` Cédric Le Goater
2017-07-10 10:24 ` [Qemu-devel] [RFC PATCH 00/26] guest exploitation of the XIVE interrupt controller (POWER9) David Gibson
2017-07-10 12:36 ` Cédric Le Goater
2017-07-19 3:00 ` David Gibson
2017-07-19 3:55 ` Benjamin Herrenschmidt
2017-07-24 7:28 ` Cédric Le Goater
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20170719030849.GQ3140@umbus.fritz.box \
--to=david@gibson.dropbear.id.au \
--cc=agraf@suse.de \
--cc=benh@kernel.crashing.org \
--cc=clg@kaod.org \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).