* [Qemu-devel] [PATCH v2 1/4] i386/kvm: use a switch statement for MSR detection
2017-08-07 8:56 [Qemu-devel] [PATCH v2 0/4] i386/kvm: advertise Hyper-V frequency MSRs Ladi Prosek
@ 2017-08-07 8:57 ` Ladi Prosek
2017-08-07 14:19 ` David Hildenbrand
2017-08-07 8:57 ` [Qemu-devel] [PATCH v2 2/4] i386/kvm: set tsc_khz before configuring Hyper-V CPUID Ladi Prosek
` (4 subsequent siblings)
5 siblings, 1 reply; 12+ messages in thread
From: Ladi Prosek @ 2017-08-07 8:57 UTC (permalink / raw)
To: qemu-devel, kvm; +Cc: pbonzini, mtosatti, david, rkrcmar
Switch is easier on the eye and might lead to better codegen.
Signed-off-by: Ladi Prosek <lprosek@redhat.com>
---
target/i386/kvm.c | 75 +++++++++++++++++++++++--------------------------------
1 file changed, 31 insertions(+), 44 deletions(-)
diff --git a/target/i386/kvm.c b/target/i386/kvm.c
index 6db7783..b14a0db 100644
--- a/target/i386/kvm.c
+++ b/target/i386/kvm.c
@@ -1081,65 +1081,52 @@ static int kvm_get_supported_msrs(KVMState *s)
int i;
for (i = 0; i < kvm_msr_list->nmsrs; i++) {
- if (kvm_msr_list->indices[i] == MSR_STAR) {
+ switch (kvm_msr_list->indices[i]) {
+ case MSR_STAR:
has_msr_star = true;
- continue;
- }
- if (kvm_msr_list->indices[i] == MSR_VM_HSAVE_PA) {
+ break;
+ case MSR_VM_HSAVE_PA:
has_msr_hsave_pa = true;
- continue;
- }
- if (kvm_msr_list->indices[i] == MSR_TSC_AUX) {
+ break;
+ case MSR_TSC_AUX:
has_msr_tsc_aux = true;
- continue;
- }
- if (kvm_msr_list->indices[i] == MSR_TSC_ADJUST) {
+ break;
+ case MSR_TSC_ADJUST:
has_msr_tsc_adjust = true;
- continue;
- }
- if (kvm_msr_list->indices[i] == MSR_IA32_TSCDEADLINE) {
+ break;
+ case MSR_IA32_TSCDEADLINE:
has_msr_tsc_deadline = true;
- continue;
- }
- if (kvm_msr_list->indices[i] == MSR_IA32_SMBASE) {
+ break;
+ case MSR_IA32_SMBASE:
has_msr_smbase = true;
- continue;
- }
- if (kvm_msr_list->indices[i] == MSR_IA32_MISC_ENABLE) {
+ break;
+ case MSR_IA32_MISC_ENABLE:
has_msr_misc_enable = true;
- continue;
- }
- if (kvm_msr_list->indices[i] == MSR_IA32_BNDCFGS) {
+ break;
+ case MSR_IA32_BNDCFGS:
has_msr_bndcfgs = true;
- continue;
- }
- if (kvm_msr_list->indices[i] == MSR_IA32_XSS) {
+ break;
+ case MSR_IA32_XSS:
has_msr_xss = true;
- continue;
- }
- if (kvm_msr_list->indices[i] == HV_X64_MSR_CRASH_CTL) {
+ break;;
+ case HV_X64_MSR_CRASH_CTL:
has_msr_hv_crash = true;
- continue;
- }
- if (kvm_msr_list->indices[i] == HV_X64_MSR_RESET) {
+ break;
+ case HV_X64_MSR_RESET:
has_msr_hv_reset = true;
- continue;
- }
- if (kvm_msr_list->indices[i] == HV_X64_MSR_VP_INDEX) {
+ break;
+ case HV_X64_MSR_VP_INDEX:
has_msr_hv_vpindex = true;
- continue;
- }
- if (kvm_msr_list->indices[i] == HV_X64_MSR_VP_RUNTIME) {
+ break;
+ case HV_X64_MSR_VP_RUNTIME:
has_msr_hv_runtime = true;
- continue;
- }
- if (kvm_msr_list->indices[i] == HV_X64_MSR_SCONTROL) {
+ break;
+ case HV_X64_MSR_SCONTROL:
has_msr_hv_synic = true;
- continue;
- }
- if (kvm_msr_list->indices[i] == HV_X64_MSR_STIMER0_CONFIG) {
+ break;
+ case HV_X64_MSR_STIMER0_CONFIG:
has_msr_hv_stimer = true;
- continue;
+ break;
}
}
}
--
2.9.3
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [Qemu-devel] [PATCH v2 1/4] i386/kvm: use a switch statement for MSR detection
2017-08-07 8:57 ` [Qemu-devel] [PATCH v2 1/4] i386/kvm: use a switch statement for MSR detection Ladi Prosek
@ 2017-08-07 14:19 ` David Hildenbrand
2017-08-07 14:24 ` Ladi Prosek
0 siblings, 1 reply; 12+ messages in thread
From: David Hildenbrand @ 2017-08-07 14:19 UTC (permalink / raw)
To: Ladi Prosek, qemu-devel, kvm; +Cc: pbonzini, mtosatti, rkrcmar
On 07.08.2017 10:57, Ladi Prosek wrote:
> Switch is easier on the eye and might lead to better codegen.
>
> Signed-off-by: Ladi Prosek <lprosek@redhat.com>
> ---
> target/i386/kvm.c | 75 +++++++++++++++++++++++--------------------------------
> 1 file changed, 31 insertions(+), 44 deletions(-)
>
> diff --git a/target/i386/kvm.c b/target/i386/kvm.c
> index 6db7783..b14a0db 100644
> --- a/target/i386/kvm.c
> +++ b/target/i386/kvm.c
> @@ -1081,65 +1081,52 @@ static int kvm_get_supported_msrs(KVMState *s)
> int i;
>
> for (i = 0; i < kvm_msr_list->nmsrs; i++) {
> - if (kvm_msr_list->indices[i] == MSR_STAR) {
> + switch (kvm_msr_list->indices[i]) {
> + case MSR_STAR:
> has_msr_star = true;
> - continue;
> - }
> - if (kvm_msr_list->indices[i] == MSR_VM_HSAVE_PA) {
> + break;
> + case MSR_VM_HSAVE_PA:
> has_msr_hsave_pa = true;
> - continue;
> - }
> - if (kvm_msr_list->indices[i] == MSR_TSC_AUX) {
> + break;
> + case MSR_TSC_AUX:
> has_msr_tsc_aux = true;
> - continue;
> - }
> - if (kvm_msr_list->indices[i] == MSR_TSC_ADJUST) {
> + break;
> + case MSR_TSC_ADJUST:
> has_msr_tsc_adjust = true;
> - continue;
> - }
> - if (kvm_msr_list->indices[i] == MSR_IA32_TSCDEADLINE) {
> + break;
> + case MSR_IA32_TSCDEADLINE:
> has_msr_tsc_deadline = true;
> - continue;
> - }
> - if (kvm_msr_list->indices[i] == MSR_IA32_SMBASE) {
> + break;
> + case MSR_IA32_SMBASE:
> has_msr_smbase = true;
> - continue;
> - }
> - if (kvm_msr_list->indices[i] == MSR_IA32_MISC_ENABLE) {
> + break;
> + case MSR_IA32_MISC_ENABLE:
> has_msr_misc_enable = true;
> - continue;
> - }
> - if (kvm_msr_list->indices[i] == MSR_IA32_BNDCFGS) {
> + break;
> + case MSR_IA32_BNDCFGS:
> has_msr_bndcfgs = true;
> - continue;
> - }
> - if (kvm_msr_list->indices[i] == MSR_IA32_XSS) {
> + break;
> + case MSR_IA32_XSS:
> has_msr_xss = true;
> - continue;
> - }
> - if (kvm_msr_list->indices[i] == HV_X64_MSR_CRASH_CTL) {
> + break;;
> + case HV_X64_MSR_CRASH_CTL:
> has_msr_hv_crash = true;
> - continue;
> - }
> - if (kvm_msr_list->indices[i] == HV_X64_MSR_RESET) {
> + break;
> + case HV_X64_MSR_RESET:
> has_msr_hv_reset = true;
> - continue;
> - }
> - if (kvm_msr_list->indices[i] == HV_X64_MSR_VP_INDEX) {
> + break;
> + case HV_X64_MSR_VP_INDEX:
> has_msr_hv_vpindex = true;
> - continue;
> - }
> - if (kvm_msr_list->indices[i] == HV_X64_MSR_VP_RUNTIME) {
> + break;
> + case HV_X64_MSR_VP_RUNTIME:
> has_msr_hv_runtime = true;
> - continue;
> - }
> - if (kvm_msr_list->indices[i] == HV_X64_MSR_SCONTROL) {
> + break;
> + case HV_X64_MSR_SCONTROL:
> has_msr_hv_synic = true;
> - continue;
> - }
> - if (kvm_msr_list->indices[i] == HV_X64_MSR_STIMER0_CONFIG) {
> + break;
> + case HV_X64_MSR_STIMER0_CONFIG:
> has_msr_hv_stimer = true;
> - continue;
> + break;
> }
> }
> }
>
Think you forgot to add my r-b.
--
Thanks,
David
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [Qemu-devel] [PATCH v2 1/4] i386/kvm: use a switch statement for MSR detection
2017-08-07 14:19 ` David Hildenbrand
@ 2017-08-07 14:24 ` Ladi Prosek
0 siblings, 0 replies; 12+ messages in thread
From: Ladi Prosek @ 2017-08-07 14:24 UTC (permalink / raw)
To: David Hildenbrand
Cc: qemu-devel, KVM list, Paolo Bonzini, Marcelo Tosatti,
Radim Krcmar
On Mon, Aug 7, 2017 at 4:19 PM, David Hildenbrand <david@redhat.com> wrote:
> On 07.08.2017 10:57, Ladi Prosek wrote:
>> Switch is easier on the eye and might lead to better codegen.
>>
>> Signed-off-by: Ladi Prosek <lprosek@redhat.com>
>> ---
>> target/i386/kvm.c | 75 +++++++++++++++++++++++--------------------------------
>> 1 file changed, 31 insertions(+), 44 deletions(-)
>>
>> diff --git a/target/i386/kvm.c b/target/i386/kvm.c
>> index 6db7783..b14a0db 100644
>> --- a/target/i386/kvm.c
>> +++ b/target/i386/kvm.c
>> @@ -1081,65 +1081,52 @@ static int kvm_get_supported_msrs(KVMState *s)
>> int i;
>>
>> for (i = 0; i < kvm_msr_list->nmsrs; i++) {
>> - if (kvm_msr_list->indices[i] == MSR_STAR) {
>> + switch (kvm_msr_list->indices[i]) {
>> + case MSR_STAR:
>> has_msr_star = true;
>> - continue;
>> - }
>> - if (kvm_msr_list->indices[i] == MSR_VM_HSAVE_PA) {
>> + break;
>> + case MSR_VM_HSAVE_PA:
>> has_msr_hsave_pa = true;
>> - continue;
>> - }
>> - if (kvm_msr_list->indices[i] == MSR_TSC_AUX) {
>> + break;
>> + case MSR_TSC_AUX:
>> has_msr_tsc_aux = true;
>> - continue;
>> - }
>> - if (kvm_msr_list->indices[i] == MSR_TSC_ADJUST) {
>> + break;
>> + case MSR_TSC_ADJUST:
>> has_msr_tsc_adjust = true;
>> - continue;
>> - }
>> - if (kvm_msr_list->indices[i] == MSR_IA32_TSCDEADLINE) {
>> + break;
>> + case MSR_IA32_TSCDEADLINE:
>> has_msr_tsc_deadline = true;
>> - continue;
>> - }
>> - if (kvm_msr_list->indices[i] == MSR_IA32_SMBASE) {
>> + break;
>> + case MSR_IA32_SMBASE:
>> has_msr_smbase = true;
>> - continue;
>> - }
>> - if (kvm_msr_list->indices[i] == MSR_IA32_MISC_ENABLE) {
>> + break;
>> + case MSR_IA32_MISC_ENABLE:
>> has_msr_misc_enable = true;
>> - continue;
>> - }
>> - if (kvm_msr_list->indices[i] == MSR_IA32_BNDCFGS) {
>> + break;
>> + case MSR_IA32_BNDCFGS:
>> has_msr_bndcfgs = true;
>> - continue;
>> - }
>> - if (kvm_msr_list->indices[i] == MSR_IA32_XSS) {
>> + break;
>> + case MSR_IA32_XSS:
>> has_msr_xss = true;
>> - continue;
>> - }
>> - if (kvm_msr_list->indices[i] == HV_X64_MSR_CRASH_CTL) {
>> + break;;
>> + case HV_X64_MSR_CRASH_CTL:
>> has_msr_hv_crash = true;
>> - continue;
>> - }
>> - if (kvm_msr_list->indices[i] == HV_X64_MSR_RESET) {
>> + break;
>> + case HV_X64_MSR_RESET:
>> has_msr_hv_reset = true;
>> - continue;
>> - }
>> - if (kvm_msr_list->indices[i] == HV_X64_MSR_VP_INDEX) {
>> + break;
>> + case HV_X64_MSR_VP_INDEX:
>> has_msr_hv_vpindex = true;
>> - continue;
>> - }
>> - if (kvm_msr_list->indices[i] == HV_X64_MSR_VP_RUNTIME) {
>> + break;
>> + case HV_X64_MSR_VP_RUNTIME:
>> has_msr_hv_runtime = true;
>> - continue;
>> - }
>> - if (kvm_msr_list->indices[i] == HV_X64_MSR_SCONTROL) {
>> + break;
>> + case HV_X64_MSR_SCONTROL:
>> has_msr_hv_synic = true;
>> - continue;
>> - }
>> - if (kvm_msr_list->indices[i] == HV_X64_MSR_STIMER0_CONFIG) {
>> + break;
>> + case HV_X64_MSR_STIMER0_CONFIG:
>> has_msr_hv_stimer = true;
>> - continue;
>> + break;
>> }
>> }
>> }
>>
>
> Think you forgot to add my r-b.
Oops, sorry about that!
> --
>
> Thanks,
>
> David
^ permalink raw reply [flat|nested] 12+ messages in thread
* [Qemu-devel] [PATCH v2 2/4] i386/kvm: set tsc_khz before configuring Hyper-V CPUID
2017-08-07 8:56 [Qemu-devel] [PATCH v2 0/4] i386/kvm: advertise Hyper-V frequency MSRs Ladi Prosek
2017-08-07 8:57 ` [Qemu-devel] [PATCH v2 1/4] i386/kvm: use a switch statement for MSR detection Ladi Prosek
@ 2017-08-07 8:57 ` Ladi Prosek
2017-08-07 8:57 ` [Qemu-devel] [PATCH v2 3/4] i386/kvm: introduce tsc_is_stable_and_known() Ladi Prosek
` (3 subsequent siblings)
5 siblings, 0 replies; 12+ messages in thread
From: Ladi Prosek @ 2017-08-07 8:57 UTC (permalink / raw)
To: qemu-devel, kvm; +Cc: pbonzini, mtosatti, david, rkrcmar
Timing-related Hyper-V enlightenments will benefit from knowing the final
tsc_khz value. This commit just moves the code in preparation for further
changes.
Signed-off-by: Ladi Prosek <lprosek@redhat.com>
---
target/i386/kvm.c | 38 +++++++++++++++++++-------------------
1 file changed, 19 insertions(+), 19 deletions(-)
diff --git a/target/i386/kvm.c b/target/i386/kvm.c
index b14a0db..15d56ae 100644
--- a/target/i386/kvm.c
+++ b/target/i386/kvm.c
@@ -695,6 +695,25 @@ int kvm_arch_init_vcpu(CPUState *cs)
cpuid_i = 0;
+ r = kvm_arch_set_tsc_khz(cs);
+ if (r < 0) {
+ goto fail;
+ }
+
+ /* vcpu's TSC frequency is either specified by user, or following
+ * the value used by KVM if the former is not present. In the
+ * latter case, we query it from KVM and record in env->tsc_khz,
+ * so that vcpu's TSC frequency can be migrated later via this field.
+ */
+ if (!env->tsc_khz) {
+ r = kvm_check_extension(cs->kvm_state, KVM_CAP_GET_TSC_KHZ) ?
+ kvm_vcpu_ioctl(cs, KVM_GET_TSC_KHZ) :
+ -ENOTSUP;
+ if (r > 0) {
+ env->tsc_khz = r;
+ }
+ }
+
/* Paravirtualization CPUIDs */
if (hyperv_enabled(cpu)) {
c = &cpuid_data.entries[cpuid_i++];
@@ -961,25 +980,6 @@ int kvm_arch_init_vcpu(CPUState *cs)
}
}
- r = kvm_arch_set_tsc_khz(cs);
- if (r < 0) {
- goto fail;
- }
-
- /* vcpu's TSC frequency is either specified by user, or following
- * the value used by KVM if the former is not present. In the
- * latter case, we query it from KVM and record in env->tsc_khz,
- * so that vcpu's TSC frequency can be migrated later via this field.
- */
- if (!env->tsc_khz) {
- r = kvm_check_extension(cs->kvm_state, KVM_CAP_GET_TSC_KHZ) ?
- kvm_vcpu_ioctl(cs, KVM_GET_TSC_KHZ) :
- -ENOTSUP;
- if (r > 0) {
- env->tsc_khz = r;
- }
- }
-
if (cpu->vmware_cpuid_freq
/* Guests depend on 0x40000000 to detect this feature, so only expose
* it if KVM exposes leaf 0x40000000. (Conflicts with Hyper-V) */
--
2.9.3
^ permalink raw reply related [flat|nested] 12+ messages in thread* [Qemu-devel] [PATCH v2 3/4] i386/kvm: introduce tsc_is_stable_and_known()
2017-08-07 8:56 [Qemu-devel] [PATCH v2 0/4] i386/kvm: advertise Hyper-V frequency MSRs Ladi Prosek
2017-08-07 8:57 ` [Qemu-devel] [PATCH v2 1/4] i386/kvm: use a switch statement for MSR detection Ladi Prosek
2017-08-07 8:57 ` [Qemu-devel] [PATCH v2 2/4] i386/kvm: set tsc_khz before configuring Hyper-V CPUID Ladi Prosek
@ 2017-08-07 8:57 ` Ladi Prosek
2017-08-07 14:22 ` David Hildenbrand
2017-08-07 8:57 ` [Qemu-devel] [PATCH v2 4/4] i386/kvm: advertise Hyper-V frequency MSRs Ladi Prosek
` (2 subsequent siblings)
5 siblings, 1 reply; 12+ messages in thread
From: Ladi Prosek @ 2017-08-07 8:57 UTC (permalink / raw)
To: qemu-devel, kvm; +Cc: pbonzini, mtosatti, david, rkrcmar
Move the "is TSC stable and known" condition to a reusable helper.
Signed-off-by: Ladi Prosek <lprosek@redhat.com>
---
target/i386/kvm.c | 13 ++++++++++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/target/i386/kvm.c b/target/i386/kvm.c
index 15d56ae..2dc01c9 100644
--- a/target/i386/kvm.c
+++ b/target/i386/kvm.c
@@ -611,6 +611,15 @@ static int kvm_arch_set_tsc_khz(CPUState *cs)
return 0;
}
+static bool tsc_is_stable_and_known(CPUX86State *env)
+{
+ if (!env->tsc_khz) {
+ return false;
+ }
+ return (env->features[FEAT_8000_0007_EDX] & CPUID_APM_INVTSC)
+ || env->user_tsc_khz;
+}
+
static int hyperv_handle_properties(CPUState *cs)
{
X86CPU *cpu = X86_CPU(cs);
@@ -986,9 +995,7 @@ int kvm_arch_init_vcpu(CPUState *cs)
&& cpu->expose_kvm
&& kvm_base == KVM_CPUID_SIGNATURE
/* TSC clock must be stable and known for this feature. */
- && ((env->features[FEAT_8000_0007_EDX] & CPUID_APM_INVTSC)
- || env->user_tsc_khz != 0)
- && env->tsc_khz != 0) {
+ && tsc_is_stable_and_known(env)) {
c = &cpuid_data.entries[cpuid_i++];
c->function = KVM_CPUID_SIGNATURE | 0x10;
--
2.9.3
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [Qemu-devel] [PATCH v2 3/4] i386/kvm: introduce tsc_is_stable_and_known()
2017-08-07 8:57 ` [Qemu-devel] [PATCH v2 3/4] i386/kvm: introduce tsc_is_stable_and_known() Ladi Prosek
@ 2017-08-07 14:22 ` David Hildenbrand
0 siblings, 0 replies; 12+ messages in thread
From: David Hildenbrand @ 2017-08-07 14:22 UTC (permalink / raw)
To: Ladi Prosek, qemu-devel, kvm; +Cc: pbonzini, mtosatti, rkrcmar
On 07.08.2017 10:57, Ladi Prosek wrote:
> Move the "is TSC stable and known" condition to a reusable helper.
>
> Signed-off-by: Ladi Prosek <lprosek@redhat.com>
> ---
> target/i386/kvm.c | 13 ++++++++++---
> 1 file changed, 10 insertions(+), 3 deletions(-)
>
> diff --git a/target/i386/kvm.c b/target/i386/kvm.c
> index 15d56ae..2dc01c9 100644
> --- a/target/i386/kvm.c
> +++ b/target/i386/kvm.c
> @@ -611,6 +611,15 @@ static int kvm_arch_set_tsc_khz(CPUState *cs)
> return 0;
> }
>
> +static bool tsc_is_stable_and_known(CPUX86State *env)
> +{
> + if (!env->tsc_khz) {
> + return false;
> + }
> + return (env->features[FEAT_8000_0007_EDX] & CPUID_APM_INVTSC)
> + || env->user_tsc_khz;
> +}> +
> static int hyperv_handle_properties(CPUState *cs)
> {
> X86CPU *cpu = X86_CPU(cs);
> @@ -986,9 +995,7 @@ int kvm_arch_init_vcpu(CPUState *cs)
> && cpu->expose_kvm
> && kvm_base == KVM_CPUID_SIGNATURE
> /* TSC clock must be stable and known for this feature. */
> - && ((env->features[FEAT_8000_0007_EDX] & CPUID_APM_INVTSC)
> - || env->user_tsc_khz != 0)
> - && env->tsc_khz != 0) {
> + && tsc_is_stable_and_known(env)) {
>
> c = &cpuid_data.entries[cpuid_i++];
> c->function = KVM_CPUID_SIGNATURE | 0x10;
>
Reviewed-by: David Hildenbrand <david@redhat.com>
--
Thanks,
David
^ permalink raw reply [flat|nested] 12+ messages in thread
* [Qemu-devel] [PATCH v2 4/4] i386/kvm: advertise Hyper-V frequency MSRs
2017-08-07 8:56 [Qemu-devel] [PATCH v2 0/4] i386/kvm: advertise Hyper-V frequency MSRs Ladi Prosek
` (2 preceding siblings ...)
2017-08-07 8:57 ` [Qemu-devel] [PATCH v2 3/4] i386/kvm: introduce tsc_is_stable_and_known() Ladi Prosek
@ 2017-08-07 8:57 ` Ladi Prosek
2017-08-07 14:25 ` David Hildenbrand
2017-08-09 0:50 ` [Qemu-devel] [PATCH v2 0/4] " Marcelo Tosatti
2017-09-11 9:52 ` Paolo Bonzini
5 siblings, 1 reply; 12+ messages in thread
From: Ladi Prosek @ 2017-08-07 8:57 UTC (permalink / raw)
To: qemu-devel, kvm; +Cc: pbonzini, mtosatti, david, rkrcmar
As of kernel commit eb82feea59d6 ("KVM: hyperv: support HV_X64_MSR_TSC_FREQUENCY
and HV_X64_MSR_APIC_FREQUENCY"), KVM supports two new MSRs which are required
for nested Hyper-V to read timestamps with RDTSC + TSC page.
This commit makes QEMU advertise the MSRs with CPUID.40000003H:EAX[11] and
CPUID.40000003H:EDX[8] as specified in the Hyper-V TLFS and experimentally
verified on a Hyper-V host. The feature is enabled with the existing hv-time CPU
flag, and only if the TSC frequency is stable across migrations and known.
Signed-off-by: Ladi Prosek <lprosek@redhat.com>
---
target/i386/kvm.c | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/target/i386/kvm.c b/target/i386/kvm.c
index 2dc01c9..739334a 100644
--- a/target/i386/kvm.c
+++ b/target/i386/kvm.c
@@ -89,6 +89,7 @@ static bool has_msr_hv_vpindex;
static bool has_msr_hv_runtime;
static bool has_msr_hv_synic;
static bool has_msr_hv_stimer;
+static bool has_msr_hv_frequencies;
static bool has_msr_xss;
static bool has_msr_architectural_pmu;
@@ -640,7 +641,13 @@ static int hyperv_handle_properties(CPUState *cs)
if (cpu->hyperv_time) {
env->features[FEAT_HYPERV_EAX] |= HV_X64_MSR_HYPERCALL_AVAILABLE;
env->features[FEAT_HYPERV_EAX] |= HV_X64_MSR_TIME_REF_COUNT_AVAILABLE;
- env->features[FEAT_HYPERV_EAX] |= 0x200;
+ env->features[FEAT_HYPERV_EAX] |= HV_X64_MSR_REFERENCE_TSC_AVAILABLE;
+
+ if (has_msr_hv_frequencies && tsc_is_stable_and_known(env)) {
+ env->features[FEAT_HYPERV_EAX] |= HV_X64_ACCESS_FREQUENCY_MSRS;
+ env->features[FEAT_HYPERV_EDX] |=
+ HV_FEATURE_FREQUENCY_MSRS_AVAILABLE;
+ }
}
if (cpu->hyperv_crash && has_msr_hv_crash) {
env->features[FEAT_HYPERV_EDX] |= HV_X64_GUEST_CRASH_MSR_AVAILABLE;
@@ -1134,6 +1141,9 @@ static int kvm_get_supported_msrs(KVMState *s)
case HV_X64_MSR_STIMER0_CONFIG:
has_msr_hv_stimer = true;
break;
+ case HV_X64_MSR_TSC_FREQUENCY:
+ has_msr_hv_frequencies = true;
+ break;
}
}
}
--
2.9.3
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [Qemu-devel] [PATCH v2 4/4] i386/kvm: advertise Hyper-V frequency MSRs
2017-08-07 8:57 ` [Qemu-devel] [PATCH v2 4/4] i386/kvm: advertise Hyper-V frequency MSRs Ladi Prosek
@ 2017-08-07 14:25 ` David Hildenbrand
0 siblings, 0 replies; 12+ messages in thread
From: David Hildenbrand @ 2017-08-07 14:25 UTC (permalink / raw)
To: Ladi Prosek, qemu-devel, kvm; +Cc: pbonzini, mtosatti, rkrcmar
On 07.08.2017 10:57, Ladi Prosek wrote:
> As of kernel commit eb82feea59d6 ("KVM: hyperv: support HV_X64_MSR_TSC_FREQUENCY
> and HV_X64_MSR_APIC_FREQUENCY"), KVM supports two new MSRs which are required
> for nested Hyper-V to read timestamps with RDTSC + TSC page.
>
> This commit makes QEMU advertise the MSRs with CPUID.40000003H:EAX[11] and
> CPUID.40000003H:EDX[8] as specified in the Hyper-V TLFS and experimentally
> verified on a Hyper-V host. The feature is enabled with the existing hv-time CPU
> flag, and only if the TSC frequency is stable across migrations and known.
>
> Signed-off-by: Ladi Prosek <lprosek@redhat.com>
> ---
> target/i386/kvm.c | 12 +++++++++++-
> 1 file changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/target/i386/kvm.c b/target/i386/kvm.c
> index 2dc01c9..739334a 100644
> --- a/target/i386/kvm.c
> +++ b/target/i386/kvm.c
> @@ -89,6 +89,7 @@ static bool has_msr_hv_vpindex;
> static bool has_msr_hv_runtime;
> static bool has_msr_hv_synic;
> static bool has_msr_hv_stimer;
> +static bool has_msr_hv_frequencies;
> static bool has_msr_xss;
>
> static bool has_msr_architectural_pmu;
> @@ -640,7 +641,13 @@ static int hyperv_handle_properties(CPUState *cs)
> if (cpu->hyperv_time) {
> env->features[FEAT_HYPERV_EAX] |= HV_X64_MSR_HYPERCALL_AVAILABLE;
> env->features[FEAT_HYPERV_EAX] |= HV_X64_MSR_TIME_REF_COUNT_AVAILABLE;
> - env->features[FEAT_HYPERV_EAX] |= 0x200;
> + env->features[FEAT_HYPERV_EAX] |= HV_X64_MSR_REFERENCE_TSC_AVAILABLE;
this could even go into a separate patch.
> +
> + if (has_msr_hv_frequencies && tsc_is_stable_and_known(env)) {
> + env->features[FEAT_HYPERV_EAX] |= HV_X64_ACCESS_FREQUENCY_MSRS;
> + env->features[FEAT_HYPERV_EDX] |=
> + HV_FEATURE_FREQUENCY_MSRS_AVAILABLE;
> + }
> }
> if (cpu->hyperv_crash && has_msr_hv_crash) {
> env->features[FEAT_HYPERV_EDX] |= HV_X64_GUEST_CRASH_MSR_AVAILABLE;
> @@ -1134,6 +1141,9 @@ static int kvm_get_supported_msrs(KVMState *s)
> case HV_X64_MSR_STIMER0_CONFIG:
> has_msr_hv_stimer = true;
> break;
> + case HV_X64_MSR_TSC_FREQUENCY:
> + has_msr_hv_frequencies = true;
> + break;
> }
> }
> }
>
Reviewed-by: David Hildenbrand <david@redhat.com>
--
Thanks,
David
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Qemu-devel] [PATCH v2 0/4] i386/kvm: advertise Hyper-V frequency MSRs
2017-08-07 8:56 [Qemu-devel] [PATCH v2 0/4] i386/kvm: advertise Hyper-V frequency MSRs Ladi Prosek
` (3 preceding siblings ...)
2017-08-07 8:57 ` [Qemu-devel] [PATCH v2 4/4] i386/kvm: advertise Hyper-V frequency MSRs Ladi Prosek
@ 2017-08-09 0:50 ` Marcelo Tosatti
2017-08-16 1:49 ` Konrad Rzeszutek Wilk
2017-09-11 9:52 ` Paolo Bonzini
5 siblings, 1 reply; 12+ messages in thread
From: Marcelo Tosatti @ 2017-08-09 0:50 UTC (permalink / raw)
To: Ladi Prosek; +Cc: qemu-devel, kvm, pbonzini, david, rkrcmar
On Mon, Aug 07, 2017 at 10:56:59AM +0200, Ladi Prosek wrote:
> This is the QEMU part of the changes required for nested Hyper-V to read
> timestamps with RDTSC + TSC page. Without exposing the frequency MSRs,
> Windows with the Hyper-V role enabled use the much slower
> HV_X64_MSR_TIME_REF_COUNT (0x40000020) RDMSR to read timestamps.
>
> The new registers are exposed only if the TSC frequency is stable across
> migration and known, as suggested by Paolo.
>
> v1->v2:
> * deleted an extra empty line in patch 1
> * added patch 3 introducing a helper function for the "TSC is stable and
> known" check (David)
>
> Ladi Prosek (4):
> i386/kvm: use a switch statement for MSR detection
> i386/kvm: set tsc_khz before configuring Hyper-V CPUID
> i386/kvm: introduce tsc_is_stable_and_known()
> i386/kvm: advertise Hyper-V frequency MSRs
>
> target/i386/kvm.c | 138 ++++++++++++++++++++++++++++--------------------------
> 1 file changed, 71 insertions(+), 67 deletions(-)
>
> --
> 2.9.3
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [Qemu-devel] [PATCH v2 0/4] i386/kvm: advertise Hyper-V frequency MSRs
2017-08-09 0:50 ` [Qemu-devel] [PATCH v2 0/4] " Marcelo Tosatti
@ 2017-08-16 1:49 ` Konrad Rzeszutek Wilk
0 siblings, 0 replies; 12+ messages in thread
From: Konrad Rzeszutek Wilk @ 2017-08-16 1:49 UTC (permalink / raw)
To: Marcelo Tosatti; +Cc: Ladi Prosek, qemu-devel, kvm, pbonzini, david, rkrcmar
On Tue, Aug 08, 2017 at 09:50:53PM -0300, Marcelo Tosatti wrote:
> On Mon, Aug 07, 2017 at 10:56:59AM +0200, Ladi Prosek wrote:
> > This is the QEMU part of the changes required for nested Hyper-V to read
> > timestamps with RDTSC + TSC page. Without exposing the frequency MSRs,
> > Windows with the Hyper-V role enabled use the much slower
> > HV_X64_MSR_TIME_REF_COUNT (0x40000020) RDMSR to read timestamps.
> >
> > The new registers are exposed only if the TSC frequency is stable across
> > migration and known, as suggested by Paolo.
> >
> > v1->v2:
> > * deleted an extra empty line in patch 1
> > * added patch 3 introducing a helper function for the "TSC is stable and
> > known" check (David)
> >
> > Ladi Prosek (4):
> > i386/kvm: use a switch statement for MSR detection
> > i386/kvm: set tsc_khz before configuring Hyper-V CPUID
> > i386/kvm: introduce tsc_is_stable_and_known()
> > i386/kvm: advertise Hyper-V frequency MSRs
> >
> > target/i386/kvm.c | 138 ++++++++++++++++++++++++++++--------------------------
> > 1 file changed, 71 insertions(+), 67 deletions(-)
> >
> > --
> > 2.9.3
>
>
> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Come again please?
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Qemu-devel] [PATCH v2 0/4] i386/kvm: advertise Hyper-V frequency MSRs
2017-08-07 8:56 [Qemu-devel] [PATCH v2 0/4] i386/kvm: advertise Hyper-V frequency MSRs Ladi Prosek
` (4 preceding siblings ...)
2017-08-09 0:50 ` [Qemu-devel] [PATCH v2 0/4] " Marcelo Tosatti
@ 2017-09-11 9:52 ` Paolo Bonzini
5 siblings, 0 replies; 12+ messages in thread
From: Paolo Bonzini @ 2017-09-11 9:52 UTC (permalink / raw)
To: Ladi Prosek, qemu-devel, kvm; +Cc: mtosatti, david, rkrcmar
On 07/08/2017 10:56, Ladi Prosek wrote:
> This is the QEMU part of the changes required for nested Hyper-V to read
> timestamps with RDTSC + TSC page. Without exposing the frequency MSRs,
> Windows with the Hyper-V role enabled use the much slower
> HV_X64_MSR_TIME_REF_COUNT (0x40000020) RDMSR to read timestamps.
>
> The new registers are exposed only if the TSC frequency is stable across
> migration and known, as suggested by Paolo.
>
> v1->v2:
> * deleted an extra empty line in patch 1
> * added patch 3 introducing a helper function for the "TSC is stable and
> known" check (David)
>
> Ladi Prosek (4):
> i386/kvm: use a switch statement for MSR detection
> i386/kvm: set tsc_khz before configuring Hyper-V CPUID
> i386/kvm: introduce tsc_is_stable_and_known()
> i386/kvm: advertise Hyper-V frequency MSRs
>
> target/i386/kvm.c | 138 ++++++++++++++++++++++++++++--------------------------
> 1 file changed, 71 insertions(+), 67 deletions(-)
>
Queued, thanks.
Paolo
^ permalink raw reply [flat|nested] 12+ messages in thread