* [Qemu-devel] [PATCH for-2.10] target/mips: remove MIPS16 ASE from 4Km
@ 2017-08-08 12:15 Philippe Mathieu-Daudé
2017-08-08 13:48 ` Yongbok Kim
2017-08-08 15:43 ` Philippe Mathieu-Daudé
0 siblings, 2 replies; 4+ messages in thread
From: Philippe Mathieu-Daudé @ 2017-08-08 12:15 UTC (permalink / raw)
To: Aurelien Jarno, Yongbok Kim
Cc: Philippe Mathieu-Daudé, qemu-devel, Richard Henderson
MIPS32 4Km does not support the MIPS16 instruction set, see:
MIPS32 4K Processor Core Family Software UM (MD00016 Rev 01.18)
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
probably incorrect copy/paste from 8d162c2b68db72623a507069fda0e35ccd1c6b85
target/mips/translate_init.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/mips/translate_init.c b/target/mips/translate_init.c
index 255d25bacd..7297c8c000 100644
--- a/target/mips/translate_init.c
+++ b/target/mips/translate_init.c
@@ -149,7 +149,7 @@ static const mips_def_t mips_defs[] =
.CP0_Status_rw_bitmask = 0x1258FF17,
.SEGBITS = 32,
.PABITS = 32,
- .insn_flags = CPU_MIPS32 | ASE_MIPS16,
+ .insn_flags = CPU_MIPS32,
.mmu_type = MMU_TYPE_FMT,
},
{
--
2.13.3
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [Qemu-devel] [PATCH for-2.10] target/mips: remove MIPS16 ASE from 4Km
2017-08-08 12:15 [Qemu-devel] [PATCH for-2.10] target/mips: remove MIPS16 ASE from 4Km Philippe Mathieu-Daudé
@ 2017-08-08 13:48 ` Yongbok Kim
2017-08-08 15:43 ` Philippe Mathieu-Daudé
1 sibling, 0 replies; 4+ messages in thread
From: Yongbok Kim @ 2017-08-08 13:48 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, Aurelien Jarno; +Cc: qemu-devel, Richard Henderson
On 08/08/2017 13:15, Philippe Mathieu-Daudé wrote:
> MIPS32 4Km does not support the MIPS16 instruction set, see:
> MIPS32 4K Processor Core Family Software UM (MD00016 Rev 01.18)
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> probably incorrect copy/paste from 8d162c2b68db72623a507069fda0e35ccd1c6b85
>
> target/mips/translate_init.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/mips/translate_init.c b/target/mips/translate_init.c
> index 255d25bacd..7297c8c000 100644
> --- a/target/mips/translate_init.c
> +++ b/target/mips/translate_init.c
> @@ -149,7 +149,7 @@ static const mips_def_t mips_defs[] =
> .CP0_Status_rw_bitmask = 0x1258FF17,
> .SEGBITS = 32,
> .PABITS = 32,
> - .insn_flags = CPU_MIPS32 | ASE_MIPS16,
> + .insn_flags = CPU_MIPS32,
> .mmu_type = MMU_TYPE_FMT,
> },
> {
>
Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com>
Regards,
Yongbok
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [Qemu-devel] [PATCH for-2.10] target/mips: remove MIPS16 ASE from 4Km
2017-08-08 12:15 [Qemu-devel] [PATCH for-2.10] target/mips: remove MIPS16 ASE from 4Km Philippe Mathieu-Daudé
2017-08-08 13:48 ` Yongbok Kim
@ 2017-08-08 15:43 ` Philippe Mathieu-Daudé
2017-08-08 15:45 ` Yongbok Kim
1 sibling, 1 reply; 4+ messages in thread
From: Philippe Mathieu-Daudé @ 2017-08-08 15:43 UTC (permalink / raw)
To: Aurelien Jarno, Yongbok Kim; +Cc: qemu-devel, Richard Henderson
On 08/08/2017 09:15 AM, Philippe Mathieu-Daudé wrote:
> probably incorrect copy/paste from 8d162c2b68db72623a507069fda0e35ccd1c6b85
incorrect since 10 years, so can wait 2.11 :P
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2017-08-08 15:45 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2017-08-08 12:15 [Qemu-devel] [PATCH for-2.10] target/mips: remove MIPS16 ASE from 4Km Philippe Mathieu-Daudé
2017-08-08 13:48 ` Yongbok Kim
2017-08-08 15:43 ` Philippe Mathieu-Daudé
2017-08-08 15:45 ` Yongbok Kim
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