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From: Greg Kurz <groug@kaod.org>
To: "Cédric Le Goater" <clg@kaod.org>
Cc: David Gibson <david@gibson.dropbear.id.au>,
	mdroth@linux.vnet.ibm.com, qemu-ppc@nongnu.org,
	qemu-devel@nongnu.org, aik@ozlabs.ru, agraf@suse.de
Subject: Re: [Qemu-devel] [PATCH for-2.10 1/2] target/ppc: Implement TIDR
Date: Tue, 8 Aug 2017 12:23:34 +0200	[thread overview]
Message-ID: <20170808122334.7f17fe85@bahia.lan> (raw)
In-Reply-To: <5ee43f17-9797-689e-7c00-99e1375e54f9@kaod.org>

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On Tue, 8 Aug 2017 11:13:03 +0200
Cédric Le Goater <clg@kaod.org> wrote:

> On 08/08/2017 08:08 AM, David Gibson wrote:
> > This adds a trivial implementation of the TIDR register added in
> > POWER9.  This isn't particularly important to qemu directly - it's
> > used by accelerator modules that we don't emulate.
> > 
> > However, since qemu isn't aware of it, its state is not synchronized
> > with KVM and therefore not migrated, which can be a problem.  
> 
> The Thread ID Register is defined in Power ISA 3.0B.
> 

Indeed. Available here:

https://openpowerfoundation.org/?resource_lib=power-isa-version-3-0

> Reviewed-by: Cédric Le Goater <clg@kaod.org>
> 

Reviewed-by: Greg Kurz <groug@kaod.org>

> C. 
> 
> 
> > 
> > Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> > ---
> >  target/ppc/cpu.h            | 1 +
> >  target/ppc/translate_init.c | 5 +++++
> >  2 files changed, 6 insertions(+)
> > 
> > diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
> > index 6ee2a26a96..f6e5413fad 100644
> > --- a/target/ppc/cpu.h
> > +++ b/target/ppc/cpu.h
> > @@ -1451,6 +1451,7 @@ void ppc_compat_add_property(Object *obj, const char *name,
> >  #define SPR_TEXASR            (0x082)
> >  #define SPR_TEXASRU           (0x083)
> >  #define SPR_UCTRL             (0x088)
> > +#define SPR_TIDR              (0x090)
> >  #define SPR_MPC_CMPA          (0x090)
> >  #define SPR_MPC_CMPB          (0x091)
> >  #define SPR_MPC_CMPC          (0x092)
> > diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c
> > index 01723bdfec..94800cd29d 100644
> > --- a/target/ppc/translate_init.c
> > +++ b/target/ppc/translate_init.c
> > @@ -8841,6 +8841,11 @@ static void init_proc_POWER9(CPUPPCState *env)
> >      gen_spr_power8_book4(env);
> >      gen_spr_power8_rpr(env);
> >  
> > +    /* POWER9 Specific registers */
> > +    spr_register_kvm(env, SPR_TIDR, "TIDR", NULL, NULL,
> > +                     spr_read_generic, spr_write_generic,
> > +                     KVM_REG_PPC_TIDR, 0);
> > +
> >      /* env variables */
> >  #if !defined(CONFIG_USER_ONLY)
> >      env->slb_nr = 32;
> >   
> 


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  reply	other threads:[~2017-08-08 10:23 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-08  6:08 [Qemu-devel] [PATCH for-2.10 0/2] Add some missing POWER9 SPRs for migration David Gibson
2017-08-08  6:08 ` [Qemu-devel] [PATCH for-2.10 1/2] target/ppc: Implement TIDR David Gibson
2017-08-08  9:13   ` Cédric Le Goater
2017-08-08 10:23     ` Greg Kurz [this message]
2017-08-08 11:08   ` [Qemu-devel] [Qemu-ppc] " Thomas Huth
2017-08-08  6:08 ` [Qemu-devel] [PATCH for-2.10 2/2] target/ppc: Add stub implementation of the PSSCR David Gibson
2017-08-08  9:19   ` Cédric Le Goater
2017-08-08 10:54     ` Greg Kurz
2017-08-08 12:44       ` David Gibson
2017-08-08 11:49   ` [Qemu-devel] [Qemu-ppc] " Thomas Huth

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