From: "Alex Bennée" <alex.bennee@linaro.org>
To: rth@twiddle.net, cota@braap.org, batuzovk@ispras.ru
Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org,
"Alex Bennée" <alex.bennee@linaro.org>,
"Peter Maydell" <peter.maydell@linaro.org>
Subject: [Qemu-devel] [RFC PATCH 6/9] target/arm/translate-a64: regnames -> x_regnames
Date: Thu, 17 Aug 2017 19:04:01 +0100 [thread overview]
Message-ID: <20170817180404.29334-7-alex.bennee@linaro.org> (raw)
In-Reply-To: <20170817180404.29334-1-alex.bennee@linaro.org>
These are the integer registers as will become clear when we start
declaring the vector ones.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
target/arm/translate-a64.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 2200e25be0..805af51900 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -43,7 +43,7 @@ static TCGv_i64 cpu_pc;
static TCGv_i64 cpu_exclusive_high;
static TCGv_i64 cpu_reg(DisasContext *s, int reg);
-static const char *regnames[] = {
+static const char *x_regnames[] = {
"x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7",
"x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15",
"x16", "x17", "x18", "x19", "x20", "x21", "x22", "x23",
--
2.13.0
next prev parent reply other threads:[~2017-08-17 18:04 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-17 18:03 [Qemu-devel] [RFC PATCH 0/9] TCG Vector types and example conversion Alex Bennée
2017-08-17 18:03 ` [Qemu-devel] [RFC PATCH 1/9] tcg/README: listify the TCG types Alex Bennée
2017-08-17 20:05 ` Richard Henderson
2017-08-17 18:03 ` [Qemu-devel] [RFC PATCH 2/9] tcg: introduce the concepts of a TCGv_vec register type Alex Bennée
2017-08-17 20:07 ` Richard Henderson
2017-08-17 18:03 ` [Qemu-devel] [RFC PATCH 3/9] tcg: generate ptrs to vector registers Alex Bennée
2017-08-17 20:13 ` Richard Henderson
2017-08-17 18:03 ` [Qemu-devel] [RFC PATCH 4/9] helper-head: add support for vec type Alex Bennée
2017-08-17 18:04 ` [Qemu-devel] [RFC PATCH 5/9] arm/cpu.h: align VFP registers Alex Bennée
2017-08-17 20:13 ` Richard Henderson
2017-08-17 18:04 ` Alex Bennée [this message]
2017-08-17 20:14 ` [Qemu-devel] [RFC PATCH 6/9] target/arm/translate-a64: regnames -> x_regnames Richard Henderson
2017-08-17 18:04 ` [Qemu-devel] [RFC PATCH 7/9] target/arm/translate-a64: register global vectors Alex Bennée
2017-08-17 18:04 ` [Qemu-devel] [RFC PATCH 8/9] target/arm/helpers: introduce ADVSIMD flags Alex Bennée
2017-08-17 18:04 ` [Qemu-devel] [RFC PATCH 9/9] target/arm/translate-a64: vectorise smull vD.4s, vN.[48]s, vM.h[] Alex Bennée
2017-08-17 20:23 ` Richard Henderson
2017-08-17 18:32 ` [Qemu-devel] [RFC PATCH 0/9] TCG Vector types and example conversion no-reply
2017-08-18 11:33 ` Kirill Batuzov
2017-08-18 13:44 ` Richard Henderson
2017-08-22 9:04 ` Kirill Batuzov
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