* [Qemu-devel] [PATCH v3 0/5] target-ppc/spapr: Add FWNMI support in QEMU for PowerKVM guests
@ 2017-08-16 9:11 Aravinda Prasad
2017-08-16 9:12 ` [Qemu-devel] [PATCH v3 1/5] ppc: spapr: Register and handle HCALL to receive updated RTAS region Aravinda Prasad
` (7 more replies)
0 siblings, 8 replies; 31+ messages in thread
From: Aravinda Prasad @ 2017-08-16 9:11 UTC (permalink / raw)
To: qemu-ppc, qemu-devel, david; +Cc: aik, mahesh, benh, paulus, sam.bobroff
This series of patches adds support for FWNMI in PowerKVM guests.
Memory error such as bit flips that cannot be corrected
by hardware is passed on to the kernel for handling
by raising machine check exception (an NMI). Upon such
machine check exception, if the address in error belongs
to guest then KVM causes a guest exit with KVM_EXIT_NMI
exit reason.
This patch series adds functionality to pass on such
machine check exception to the guest kernel by suitably
handling KVM_EXIT_NMI exit and building the error log.
The KVM changes are now part of the upstream kernel
(commit e20bbd3d). This series contain QEMU changes.
Change Log v3:
- Rebased to v2.10.0-rc0 (git://github.com/dgibson/qemu)
Change Log v2:
- Added KVM capability
- Serialized multiple NMIs with a conditional wait
---
Aravinda Prasad (5):
ppc: spapr: Register and handle HCALL to receive updated RTAS region
ppc: spapr: Handle "ibm,nmi-register" and "ibm,nmi-interlock" RTAS calls
Wrapper function to wait on condition for the main loop mutex
target/ppc: Handle NMI guest exit
ppc: spapr: Enable FWNMI capability
cpus.c | 5 +++
hw/ppc/spapr.c | 12 ++++++
hw/ppc/spapr_hcall.c | 8 ++++
hw/ppc/spapr_rtas.c | 52 +++++++++++++++++++++++++++
include/hw/ppc/spapr.h | 14 ++++++-
include/qemu/main-loop.h | 8 ++++
target/ppc/kvm.c | 88 ++++++++++++++++++++++++++++++++++++++++++++++
target/ppc/kvm_ppc.h | 81 ++++++++++++++++++++++++++++++++++++++++++
8 files changed, 266 insertions(+), 2 deletions(-)
--
Aravinda Prasad
^ permalink raw reply [flat|nested] 31+ messages in thread
* [Qemu-devel] [PATCH v3 1/5] ppc: spapr: Register and handle HCALL to receive updated RTAS region
2017-08-16 9:11 [Qemu-devel] [PATCH v3 0/5] target-ppc/spapr: Add FWNMI support in QEMU for PowerKVM guests Aravinda Prasad
@ 2017-08-16 9:12 ` Aravinda Prasad
2017-08-17 1:34 ` David Gibson
2017-08-16 9:12 ` [Qemu-devel] [PATCH v3 2/5] ppc: spapr: Handle "ibm, nmi-register" and "ibm, nmi-interlock" RTAS calls Aravinda Prasad
` (6 subsequent siblings)
7 siblings, 1 reply; 31+ messages in thread
From: Aravinda Prasad @ 2017-08-16 9:12 UTC (permalink / raw)
To: qemu-ppc, qemu-devel, david; +Cc: aik, mahesh, benh, paulus, sam.bobroff
Receive updates from SLOF about the updated rtas-base.
A separate patch for SLOF [1] adds functionality to invoke
a private HCALL whenever OS issues instantiate-rtas with
a new rtas-base.
This is required as QEMU needs to know the updated rtas-base
as it allocates error reporting structure in RTAS space upon
a machine check exception.
[1] https://lists.ozlabs.org/pipermail/linuxppc-dev/2014-August/120386.html
Signed-off-by: Aravinda Prasad <aravinda@linux.vnet.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
---
hw/ppc/spapr_hcall.c | 8 ++++++++
include/hw/ppc/spapr.h | 4 +++-
2 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index 72ea5a8..e66c72e 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -1062,6 +1062,13 @@ static target_ulong h_rtas(PowerPCCPU *cpu, sPAPRMachineState *spapr,
nret, rtas_r3 + 12 + 4*nargs);
}
+static target_ulong h_rtas_update(PowerPCCPU *cpu, sPAPRMachineState *spapr,
+ target_ulong opcode, target_ulong *args)
+{
+ spapr->rtas_addr = args[0];
+ return 0;
+}
+
static target_ulong h_logical_load(PowerPCCPU *cpu, sPAPRMachineState *spapr,
target_ulong opcode, target_ulong *args)
{
@@ -1717,6 +1724,7 @@ static void hypercall_register_types(void)
/* qemu/KVM-PPC specific hcalls */
spapr_register_hypercall(KVMPPC_H_RTAS, h_rtas);
+ spapr_register_hypercall(KVMPPC_H_RTAS_UPDATE, h_rtas_update);
/* ibm,client-architecture-support support */
spapr_register_hypercall(KVMPPC_H_CAS, h_client_architecture_support);
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index 2a303a7..46012b3 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -90,6 +90,7 @@ struct sPAPRMachineState {
hwaddr rma_size;
int vrma_adjust;
+ hwaddr rtas_addr;
ssize_t rtas_size;
void *rtas_blob;
long kernel_size;
@@ -399,7 +400,8 @@ struct sPAPRMachineState {
#define KVMPPC_H_LOGICAL_MEMOP (KVMPPC_HCALL_BASE + 0x1)
/* Client Architecture support */
#define KVMPPC_H_CAS (KVMPPC_HCALL_BASE + 0x2)
-#define KVMPPC_HCALL_MAX KVMPPC_H_CAS
+#define KVMPPC_H_RTAS_UPDATE (KVMPPC_HCALL_BASE + 0x3)
+#define KVMPPC_HCALL_MAX KVMPPC_H_RTAS_UPDATE
typedef struct sPAPRDeviceTreeUpdateHeader {
uint32_t version_id;
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [Qemu-devel] [PATCH v3 2/5] ppc: spapr: Handle "ibm, nmi-register" and "ibm, nmi-interlock" RTAS calls
2017-08-16 9:11 [Qemu-devel] [PATCH v3 0/5] target-ppc/spapr: Add FWNMI support in QEMU for PowerKVM guests Aravinda Prasad
2017-08-16 9:12 ` [Qemu-devel] [PATCH v3 1/5] ppc: spapr: Register and handle HCALL to receive updated RTAS region Aravinda Prasad
@ 2017-08-16 9:12 ` Aravinda Prasad
2017-08-17 1:39 ` David Gibson
2017-08-16 9:12 ` [Qemu-devel] [PATCH v3 3/5] Wrapper function to wait on condition for the main loop mutex Aravinda Prasad
` (5 subsequent siblings)
7 siblings, 1 reply; 31+ messages in thread
From: Aravinda Prasad @ 2017-08-16 9:12 UTC (permalink / raw)
To: qemu-ppc, qemu-devel, david; +Cc: aik, mahesh, benh, paulus, sam.bobroff
This patch adds support in QEMU to handle "ibm,nmi-register"
and "ibm,nmi-interlock" RTAS calls.
The machine check notification address is saved when the
OS issues "ibm,nmi-register" RTAS call.
This patch also handles the case when multiple processors
experience machine check at or about the same time by
handling "ibm,nmi-interlock" call. In such cases, as per
PAPR, subsequent processors serialize waiting for the first
processor to issue the "ibm,nmi-interlock" call. The second
processor waits till the first processor, which also
received a machine check error, is done reading the error
log. The first processor issues "ibm,nmi-interlock" call
when the error log is consumed. This patch implements the
releasing part of the error-log while subsequent patch
(which builds error log) handles the locking part.
Signed-off-by: Aravinda Prasad <aravinda@linux.vnet.ibm.com>
---
hw/ppc/spapr.c | 8 ++++++++
hw/ppc/spapr_rtas.c | 35 +++++++++++++++++++++++++++++++++++
include/hw/ppc/spapr.h | 10 +++++++++-
3 files changed, 52 insertions(+), 1 deletion(-)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 2a3e53d..0bb2c4a 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -1441,6 +1441,11 @@ static void ppc_spapr_reset(void)
first_ppc_cpu->env.nip = SPAPR_ENTRY_POINT;
spapr->cas_reboot = false;
+
+ spapr->mc_in_progress = false;
+ spapr->guest_machine_check_addr = 0;
+ qemu_cond_destroy(&spapr->mc_delivery_cond);
+ qemu_cond_init(&spapr->mc_delivery_cond);
}
static void spapr_create_nvram(sPAPRMachineState *spapr)
@@ -2491,6 +2496,9 @@ static void ppc_spapr_init(MachineState *machine)
kvmppc_spapr_enable_inkernel_multitce();
}
+
+ spapr->mc_in_progress = false;
+ qemu_cond_init(&spapr->mc_delivery_cond);
}
static int spapr_kvm_type(const char *vm_type)
diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c
index 94a2799..2f3c47b 100644
--- a/hw/ppc/spapr_rtas.c
+++ b/hw/ppc/spapr_rtas.c
@@ -348,6 +348,37 @@ static void rtas_get_power_level(PowerPCCPU *cpu, sPAPRMachineState *spapr,
rtas_st(rets, 1, 100);
}
+static void rtas_ibm_nmi_register(PowerPCCPU *cpu,
+ sPAPRMachineState *spapr,
+ uint32_t token, uint32_t nargs,
+ target_ulong args,
+ uint32_t nret, target_ulong rets)
+{
+ spapr->guest_machine_check_addr = rtas_ld(args, 1);
+ rtas_st(rets, 0, RTAS_OUT_SUCCESS);
+}
+
+static void rtas_ibm_nmi_interlock(PowerPCCPU *cpu,
+ sPAPRMachineState *spapr,
+ uint32_t token, uint32_t nargs,
+ target_ulong args,
+ uint32_t nret, target_ulong rets)
+{
+ if (!spapr->guest_machine_check_addr) {
+ /* NMI register not called */
+ rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
+ } else {
+ /*
+ * VCPU issuing "ibm,nmi-interlock" is done with NMI handling,
+ * hence unset mc_in_progress.
+ */
+ spapr->mc_in_progress = false;
+ qemu_cond_signal(&spapr->mc_delivery_cond);
+ rtas_st(rets, 0, RTAS_OUT_SUCCESS);
+ }
+}
+
+
static struct rtas_call {
const char *name;
spapr_rtas_fn fn;
@@ -489,6 +520,10 @@ static void core_rtas_register_types(void)
rtas_set_power_level);
spapr_rtas_register(RTAS_GET_POWER_LEVEL, "get-power-level",
rtas_get_power_level);
+ spapr_rtas_register(RTAS_IBM_NMI_REGISTER, "ibm,nmi-register",
+ rtas_ibm_nmi_register);
+ spapr_rtas_register(RTAS_IBM_NMI_INTERLOCK, "ibm,nmi-interlock",
+ rtas_ibm_nmi_interlock);
}
type_init(core_rtas_register_types)
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index 46012b3..eee8d33 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -123,6 +123,12 @@ struct sPAPRMachineState {
* occurs during the unplug process. */
QTAILQ_HEAD(, sPAPRDIMMState) pending_dimm_unplugs;
+ /* State related to "ibm,nmi-register" and "ibm,nmi-interlock" calls */
+ target_ulong guest_machine_check_addr;
+ bool mc_in_progress;
+ int mc_cpu;
+ QemuCond mc_delivery_cond;
+
/*< public >*/
char *kvm_type;
MemoryHotplugState hotplug_memory;
@@ -519,8 +525,10 @@ target_ulong spapr_hypercall(PowerPCCPU *cpu, target_ulong opcode,
#define RTAS_IBM_CREATE_PE_DMA_WINDOW (RTAS_TOKEN_BASE + 0x27)
#define RTAS_IBM_REMOVE_PE_DMA_WINDOW (RTAS_TOKEN_BASE + 0x28)
#define RTAS_IBM_RESET_PE_DMA_WINDOW (RTAS_TOKEN_BASE + 0x29)
+#define RTAS_IBM_NMI_REGISTER (RTAS_TOKEN_BASE + 0x2A)
+#define RTAS_IBM_NMI_INTERLOCK (RTAS_TOKEN_BASE + 0x2B)
-#define RTAS_TOKEN_MAX (RTAS_TOKEN_BASE + 0x2A)
+#define RTAS_TOKEN_MAX (RTAS_TOKEN_BASE + 0x2C)
/* RTAS ibm,get-system-parameter token values */
#define RTAS_SYSPARM_SPLPAR_CHARACTERISTICS 20
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [Qemu-devel] [PATCH v3 3/5] Wrapper function to wait on condition for the main loop mutex
2017-08-16 9:11 [Qemu-devel] [PATCH v3 0/5] target-ppc/spapr: Add FWNMI support in QEMU for PowerKVM guests Aravinda Prasad
2017-08-16 9:12 ` [Qemu-devel] [PATCH v3 1/5] ppc: spapr: Register and handle HCALL to receive updated RTAS region Aravinda Prasad
2017-08-16 9:12 ` [Qemu-devel] [PATCH v3 2/5] ppc: spapr: Handle "ibm, nmi-register" and "ibm, nmi-interlock" RTAS calls Aravinda Prasad
@ 2017-08-16 9:12 ` Aravinda Prasad
2017-08-16 9:12 ` [Qemu-devel] [PATCH v3 4/5] target/ppc: Handle NMI guest exit Aravinda Prasad
` (4 subsequent siblings)
7 siblings, 0 replies; 31+ messages in thread
From: Aravinda Prasad @ 2017-08-16 9:12 UTC (permalink / raw)
To: qemu-ppc, qemu-devel, david; +Cc: aik, mahesh, benh, paulus, sam.bobroff
Introduce a wrapper function to wait on condition for
the main loop mutex. This function atomically releases
the main loop mutex and causes the calling thread to
block on the condition.
Signed-off-by: Aravinda Prasad <aravinda@linux.vnet.ibm.com>
---
cpus.c | 5 +++++
include/qemu/main-loop.h | 8 ++++++++
2 files changed, 13 insertions(+)
diff --git a/cpus.c b/cpus.c
index 9bed61e..9712013 100644
--- a/cpus.c
+++ b/cpus.c
@@ -1589,6 +1589,11 @@ void qemu_mutex_unlock_iothread(void)
qemu_mutex_unlock(&qemu_global_mutex);
}
+void qemu_cond_wait_iothread(QemuCond *cond)
+{
+ qemu_cond_wait(cond, &qemu_global_mutex);
+}
+
static bool all_vcpus_paused(void)
{
CPUState *cpu;
diff --git a/include/qemu/main-loop.h b/include/qemu/main-loop.h
index 6b4b60b..618cb2f 100644
--- a/include/qemu/main-loop.h
+++ b/include/qemu/main-loop.h
@@ -279,6 +279,14 @@ void qemu_mutex_lock_iothread(void);
*/
void qemu_mutex_unlock_iothread(void);
+/**
+ * qemu_cond_wait_iothread: Wait on condition for the main loop mutex
+ *
+ * This function atomically releases the main loop mutex and causes
+ * the calling thread to block on the condition.
+ */
+void qemu_cond_wait_iothread(QemuCond *cond);
+
/* internal interfaces */
void qemu_fd_register(int fd);
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [Qemu-devel] [PATCH v3 4/5] target/ppc: Handle NMI guest exit
2017-08-16 9:11 [Qemu-devel] [PATCH v3 0/5] target-ppc/spapr: Add FWNMI support in QEMU for PowerKVM guests Aravinda Prasad
` (2 preceding siblings ...)
2017-08-16 9:12 ` [Qemu-devel] [PATCH v3 3/5] Wrapper function to wait on condition for the main loop mutex Aravinda Prasad
@ 2017-08-16 9:12 ` Aravinda Prasad
2017-08-17 1:57 ` David Gibson
2017-08-16 9:12 ` [Qemu-devel] [PATCH v3 5/5] ppc: spapr: Enable FWNMI capability Aravinda Prasad
` (3 subsequent siblings)
7 siblings, 1 reply; 31+ messages in thread
From: Aravinda Prasad @ 2017-08-16 9:12 UTC (permalink / raw)
To: qemu-ppc, qemu-devel, david; +Cc: aik, mahesh, benh, paulus, sam.bobroff
Memory error such as bit flips that cannot be corrected
by hardware are passed on to the kernel for handling.
If the memory address in error belongs to guest then
guest kernel is responsible for taking suitable action.
Patch [1] enhances KVM to exit guest with exit reason
set to KVM_EXIT_NMI in such cases.
This patch handles KVM_EXIT_NMI exit. If the guest OS
has registered the machine check handling routine by
calling "ibm,nmi-register", then the handler builds
the error log and invokes the registered handler else
invokes the handler at 0x200.
[1] https://www.spinics.net/lists/kvm-ppc/msg12637.html
(e20bbd3d and related commits)
Signed-off-by: Aravinda Prasad <aravinda@linux.vnet.ibm.com>
---
hw/ppc/spapr.c | 4 ++
target/ppc/kvm.c | 86 ++++++++++++++++++++++++++++++++++++++++++++++++++
target/ppc/kvm_ppc.h | 81 +++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 171 insertions(+)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 0bb2c4a..6cc3f69 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -2346,6 +2346,10 @@ static void ppc_spapr_init(MachineState *machine)
error_report("Could not get size of LPAR rtas '%s'", filename);
exit(1);
}
+
+ /* Resize blob to accommodate error log. */
+ spapr->rtas_size = RTAS_ERRLOG_OFFSET + sizeof(struct RtasMCELog);
+
spapr->rtas_blob = g_malloc(spapr->rtas_size);
if (load_image_size(filename, spapr->rtas_blob, spapr->rtas_size) < 0) {
error_report("Could not load LPAR rtas '%s'", filename);
diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
index 8571379..73f64ed 100644
--- a/target/ppc/kvm.c
+++ b/target/ppc/kvm.c
@@ -1782,6 +1782,11 @@ int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
ret = 0;
break;
+ case KVM_EXIT_NMI:
+ DPRINTF("handle NMI exception\n");
+ ret = kvm_handle_nmi(cpu);
+ break;
+
default:
fprintf(stderr, "KVM: unknown exit reason %d\n", run->exit_reason);
ret = -1;
@@ -2704,6 +2709,87 @@ int kvm_arch_msi_data_to_gsi(uint32_t data)
return data & 0xffff;
}
+int kvm_handle_nmi(PowerPCCPU *cpu)
+{
+ struct RtasMCELog mc_log;
+ CPUPPCState *env = &cpu->env;
+ sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
+ PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
+ target_ulong msr = 0;
+
+ cpu_synchronize_state(CPU(cpu));
+
+ /*
+ * Properly set bits in MSR before we invoke the handler.
+ * SRR0/1, DAR and DSISR are properly set by KVM
+ */
+ if (!(*pcc->interrupts_big_endian)(cpu)) {
+ msr |= (1ULL << MSR_LE);
+ }
+
+ if (env->msr && (1ULL << MSR_SF)) {
+ msr |= (1ULL << MSR_SF);
+ }
+
+ msr |= (1ULL << MSR_ME);
+ env->msr = msr;
+
+ if (!spapr->guest_machine_check_addr) {
+ /*
+ * If OS has not registered with "ibm,nmi-register"
+ * jump to 0x200
+ */
+ env->nip = 0x200;
+ return 0;
+ }
+
+ while (spapr->mc_in_progress) {
+ /*
+ * Check whether the same CPU got machine check error
+ * while still handling the mc error (i.e., before
+ * that CPU called "ibm,nmi-interlock"
+ */
+ if (spapr->mc_cpu == cpu->cpu_dt_id) {
+ qemu_system_guest_panicked(NULL);
+ }
+ qemu_cond_wait_iothread(&spapr->mc_delivery_cond);
+ }
+ spapr->mc_in_progress = true;
+ spapr->mc_cpu = cpu->cpu_dt_id;
+
+ /* Set error log fields */
+ mc_log.r3 = env->gpr[3];
+ mc_log.err_log.byte0 = 0;
+ mc_log.err_log.byte1 =
+ (RTAS_SEVERITY_ERROR_SYNC << RTAS_ELOG_SEVERITY_SHIFT);
+ mc_log.err_log.byte1 |=
+ (RTAS_DISP_NOT_RECOVERED << RTAS_ELOG_DISPOSITION_SHIFT);
+ mc_log.err_log.byte2 =
+ (RTAS_INITIATOR_MEMORY << RTAS_ELOG_INITIATOR_SHIFT);
+ mc_log.err_log.byte2 |= RTAS_TARGET_MEMORY;
+
+ if (env->spr[SPR_DSISR] & P7_DSISR_MC_UE) {
+ mc_log.err_log.byte3 = RTAS_TYPE_ECC_UNCORR;
+ } else {
+ mc_log.err_log.byte3 = 0;
+ }
+
+ /* Handle all Host/Guest LE/BE combinations */
+ if (env->msr & (1ULL << MSR_LE)) {
+ mc_log.r3 = cpu_to_le64(mc_log.r3);
+ } else {
+ mc_log.r3 = cpu_to_be64(mc_log.r3);
+ }
+
+ cpu_physical_memory_write(spapr->rtas_addr + RTAS_ERRLOG_OFFSET,
+ &mc_log, sizeof(mc_log));
+
+ env->nip = spapr->guest_machine_check_addr;
+ env->gpr[3] = spapr->rtas_addr + RTAS_ERRLOG_OFFSET;
+
+ return 0;
+}
+
int kvmppc_enable_hwrng(void)
{
if (!kvm_enabled() || !kvm_check_extension(kvm_state, KVM_CAP_PPC_HWRNG)) {
diff --git a/target/ppc/kvm_ppc.h b/target/ppc/kvm_ppc.h
index 6bc6fb3..bc8e3ce 100644
--- a/target/ppc/kvm_ppc.h
+++ b/target/ppc/kvm_ppc.h
@@ -70,6 +70,87 @@ void kvmppc_update_sdr1(target_ulong sdr1);
bool kvmppc_is_mem_backend_page_size_ok(const char *obj_path);
+int kvm_handle_nmi(PowerPCCPU *cpu);
+
+/* Offset from rtas-base where error log is placed */
+#define RTAS_ERRLOG_OFFSET 0x200
+
+#define RTAS_ELOG_SEVERITY_SHIFT 0x5
+#define RTAS_ELOG_DISPOSITION_SHIFT 0x3
+#define RTAS_ELOG_INITIATOR_SHIFT 0x4
+
+/*
+ * Only required RTAS event severity, disposition, initiator
+ * target and type are copied from arch/powerpc/include/asm/rtas.h
+ */
+
+/* RTAS event severity */
+#define RTAS_SEVERITY_ERROR_SYNC 0x3
+
+/* RTAS event disposition */
+#define RTAS_DISP_NOT_RECOVERED 0x2
+
+/* RTAS event initiator */
+#define RTAS_INITIATOR_MEMORY 0x4
+
+/* RTAS event target */
+#define RTAS_TARGET_MEMORY 0x4
+
+/* RTAS event type */
+#define RTAS_TYPE_ECC_UNCORR 0x09
+
+/*
+ * Currently KVM only passes on the uncorrected machine
+ * check memory error to guest. Other machine check errors
+ * such as SLB multi-hit and TLB multi-hit are recovered
+ * in KVM and are not passed on to guest.
+ *
+ * DSISR Bit for uncorrected machine check error. Based
+ * on arch/powerpc/include/asm/mce.h
+ */
+#define PPC_BIT(bit) (0x8000000000000000ULL >> bit)
+#define P7_DSISR_MC_UE (PPC_BIT(48)) /* P8 too */
+
+/* Adopted from kernel source arch/powerpc/include/asm/rtas.h */
+struct rtas_error_log {
+ /* Byte 0 */
+ uint8_t byte0; /* Architectural version */
+
+ /* Byte 1 */
+ uint8_t byte1;
+ /* XXXXXXXX
+ * XXX 3: Severity level of error
+ * XX 2: Degree of recovery
+ * X 1: Extended log present?
+ * XX 2: Reserved
+ */
+
+ /* Byte 2 */
+ uint8_t byte2;
+ /* XXXXXXXX
+ * XXXX 4: Initiator of event
+ * XXXX 4: Target of failed operation
+ */
+ uint8_t byte3; /* General event or error*/
+ __be32 extended_log_length; /* length in bytes */
+ unsigned char buffer[1]; /* Start of extended log */
+ /* Variable length. */
+};
+
+/*
+ * Data format in RTAS-Blob
+ *
+ * This structure contains error information related to Machine
+ * Check exception. This is filled up and copied to rtas-blob
+ * upon machine check exception. The address of rtas-blob is
+ * passed on to OS registered machine check notification
+ * routines upon machine check exception
+ */
+struct RtasMCELog {
+ target_ulong r3;
+ struct rtas_error_log err_log;
+};
+
#else
static inline uint32_t kvmppc_get_tbfreq(void)
^ permalink raw reply related [flat|nested] 31+ messages in thread
* [Qemu-devel] [PATCH v3 5/5] ppc: spapr: Enable FWNMI capability
2017-08-16 9:11 [Qemu-devel] [PATCH v3 0/5] target-ppc/spapr: Add FWNMI support in QEMU for PowerKVM guests Aravinda Prasad
` (3 preceding siblings ...)
2017-08-16 9:12 ` [Qemu-devel] [PATCH v3 4/5] target/ppc: Handle NMI guest exit Aravinda Prasad
@ 2017-08-16 9:12 ` Aravinda Prasad
2017-08-17 1:59 ` David Gibson
2017-08-16 9:29 ` [Qemu-devel] [PATCH v3 0/5] target-ppc/spapr: Add FWNMI support in QEMU for PowerKVM guests no-reply
` (2 subsequent siblings)
7 siblings, 1 reply; 31+ messages in thread
From: Aravinda Prasad @ 2017-08-16 9:12 UTC (permalink / raw)
To: qemu-ppc, qemu-devel, david; +Cc: aik, mahesh, benh, paulus, sam.bobroff
Enable the KVM capability KVM_CAP_PPC_FWNMI so that
the KVM causes guest exit with NMI as exit reason
when it encounters a machine check exception on the
address belonging to a guest. Without this capability
enabled, KVM redirects machine check exceptions to
guest's 0x200 vector.
Signed-off-by: Aravinda Prasad <aravinda@linux.vnet.ibm.com>
---
hw/ppc/spapr_rtas.c | 17 +++++++++++++++++
target/ppc/kvm.c | 2 ++
2 files changed, 19 insertions(+)
diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c
index 2f3c47b..c2a361a 100644
--- a/hw/ppc/spapr_rtas.c
+++ b/hw/ppc/spapr_rtas.c
@@ -47,6 +47,8 @@
#include "trace.h"
#include "hw/ppc/fdt.h"
+extern int cap_fwnmi;
+
static void rtas_display_character(PowerPCCPU *cpu, sPAPRMachineState *spapr,
uint32_t token, uint32_t nargs,
target_ulong args,
@@ -354,7 +356,22 @@ static void rtas_ibm_nmi_register(PowerPCCPU *cpu,
target_ulong args,
uint32_t nret, target_ulong rets)
{
+ int ret;
+ CPUState *cs = CPU(cpu);
+
+ if (!cap_fwnmi) {
+ rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
+ return;
+ }
+
spapr->guest_machine_check_addr = rtas_ld(args, 1);
+
+ ret = kvm_vcpu_enable_cap(cs, KVM_CAP_PPC_FWNMI, 0);
+ if (ret < 0) {
+ rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
+ return;
+ }
+
rtas_st(rets, 0, RTAS_OUT_SUCCESS);
}
diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
index 73f64ed..ca1ffa6 100644
--- a/target/ppc/kvm.c
+++ b/target/ppc/kvm.c
@@ -90,6 +90,7 @@ static int cap_htm; /* Hardware transactional memory support */
static int cap_mmu_radix;
static int cap_mmu_hash_v3;
static int cap_resize_hpt;
+int cap_fwnmi;
static uint32_t debug_inst_opcode;
@@ -147,6 +148,7 @@ int kvm_arch_init(MachineState *ms, KVMState *s)
cap_mmu_radix = kvm_vm_check_extension(s, KVM_CAP_PPC_MMU_RADIX);
cap_mmu_hash_v3 = kvm_vm_check_extension(s, KVM_CAP_PPC_MMU_HASH_V3);
cap_resize_hpt = kvm_vm_check_extension(s, KVM_CAP_SPAPR_RESIZE_HPT);
+ cap_fwnmi = kvm_check_extension(s, KVM_CAP_PPC_FWNMI);
if (!cap_interrupt_level) {
fprintf(stderr, "KVM: Couldn't find level irq capability. Expect the "
^ permalink raw reply related [flat|nested] 31+ messages in thread
* Re: [Qemu-devel] [PATCH v3 0/5] target-ppc/spapr: Add FWNMI support in QEMU for PowerKVM guests
2017-08-16 9:11 [Qemu-devel] [PATCH v3 0/5] target-ppc/spapr: Add FWNMI support in QEMU for PowerKVM guests Aravinda Prasad
` (4 preceding siblings ...)
2017-08-16 9:12 ` [Qemu-devel] [PATCH v3 5/5] ppc: spapr: Enable FWNMI capability Aravinda Prasad
@ 2017-08-16 9:29 ` no-reply
2017-08-16 9:40 ` no-reply
2017-08-17 3:35 ` Sam Bobroff
7 siblings, 0 replies; 31+ messages in thread
From: no-reply @ 2017-08-16 9:29 UTC (permalink / raw)
To: aravinda
Cc: famz, qemu-ppc, qemu-devel, david, aik, benh, paulus, sam.bobroff
Hi,
This series failed build test on s390x host. Please find the details below.
Type: series
Subject: [Qemu-devel] [PATCH v3 0/5] target-ppc/spapr: Add FWNMI support in QEMU for PowerKVM guests
Message-id: 150287457293.9760.17827532208744487789.stgit@aravinda
=== TEST SCRIPT BEGIN ===
#!/bin/bash
# Testing script will be invoked under the git checkout with
# HEAD pointing to a commit that has the patches applied on top of "base"
# branch
set -e
echo "=== ENV ==="
env
echo "=== PACKAGES ==="
rpm -qa
echo "=== TEST BEGIN ==="
CC=$HOME/bin/cc
INSTALL=$PWD/install
BUILD=$PWD/build
echo -n "Using CC: "
realpath $CC
mkdir -p $BUILD $INSTALL
SRC=$PWD
cd $BUILD
$SRC/configure --cc=$CC --prefix=$INSTALL
make -j4
# XXX: we need reliable clean up
# make check -j4 V=1
make install
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
* [new tag] patchew/150287457293.9760.17827532208744487789.stgit@aravinda -> patchew/150287457293.9760.17827532208744487789.stgit@aravinda
- [tag update] patchew/20170816082650.21880-1-cohuck@redhat.com -> patchew/20170816082650.21880-1-cohuck@redhat.com
Switched to a new branch 'test'
0fa29fb ppc: spapr: Enable FWNMI capability
f6f4237 target/ppc: Handle NMI guest exit
966e015 Wrapper function to wait on condition for the main loop mutex
3438e95 ppc: spapr: Handle "ibm, nmi-register" and "ibm, nmi-interlock" RTAS calls
d00f1dc ppc: spapr: Register and handle HCALL to receive updated RTAS region
=== OUTPUT BEGIN ===
=== ENV ===
XDG_SESSION_ID=29398
SHELL=/bin/sh
USER=fam
PATCHEW=/home/fam/patchew/patchew-cli -s http://patchew.org --nodebug
PATH=/usr/bin:/bin
PWD=/var/tmp/patchew-tester-tmp-vy8sld96/src
LANG=en_US.UTF-8
HOME=/home/fam
SHLVL=2
LOGNAME=fam
DBUS_SESSION_BUS_ADDRESS=unix:path=/run/user/1012/bus
XDG_RUNTIME_DIR=/run/user/1012
_=/usr/bin/env
=== PACKAGES ===
gpg-pubkey-873529b8-54e386ff
xz-libs-5.2.2-2.fc24.s390x
libxshmfence-1.2-3.fc24.s390x
giflib-4.1.6-15.fc24.s390x
trousers-lib-0.3.13-6.fc24.s390x
ncurses-base-6.0-6.20160709.fc25.noarch
gmp-6.1.1-1.fc25.s390x
libidn-1.33-1.fc25.s390x
slang-2.3.0-7.fc25.s390x
pkgconfig-0.29.1-1.fc25.s390x
alsa-lib-1.1.1-2.fc25.s390x
yum-metadata-parser-1.1.4-17.fc25.s390x
python3-slip-dbus-0.6.4-4.fc25.noarch
python2-cssselect-0.9.2-1.fc25.noarch
createrepo_c-libs-0.10.0-6.fc25.s390x
initscripts-9.69-1.fc25.s390x
parted-3.2-21.fc25.s390x
flex-2.6.0-3.fc25.s390x
colord-libs-1.3.4-1.fc25.s390x
python-osbs-client-0.33-3.fc25.noarch
perl-Pod-Simple-3.35-1.fc25.noarch
python2-simplejson-3.10.0-1.fc25.s390x
brltty-5.4-2.fc25.s390x
librados2-10.2.4-2.fc25.s390x
tcp_wrappers-7.6-83.fc25.s390x
libcephfs_jni1-10.2.4-2.fc25.s390x
nettle-devel-3.3-1.fc25.s390x
bzip2-devel-1.0.6-21.fc25.s390x
libuuid-2.28.2-2.fc25.s390x
python3-dnf-1.1.10-6.fc25.noarch
texlive-kpathsea-doc-svn41139-33.fc25.1.noarch
openssh-7.4p1-4.fc25.s390x
texlive-kpathsea-bin-svn40473-33.20160520.fc25.1.s390x
texlive-graphics-svn41015-33.fc25.1.noarch
texlive-dvipdfmx-def-svn40328-33.fc25.1.noarch
texlive-mfware-svn40768-33.fc25.1.noarch
texlive-texlive-scripts-svn41433-33.fc25.1.noarch
texlive-euro-svn22191.1.1-33.fc25.1.noarch
texlive-etex-svn37057.0-33.fc25.1.noarch
texlive-iftex-svn29654.0.2-33.fc25.1.noarch
texlive-palatino-svn31835.0-33.fc25.1.noarch
texlive-texlive-docindex-svn41430-33.fc25.1.noarch
texlive-xunicode-svn30466.0.981-33.fc25.1.noarch
texlive-koma-script-svn41508-33.fc25.1.noarch
texlive-pst-grad-svn15878.1.06-33.fc25.1.noarch
texlive-pst-blur-svn15878.2.0-33.fc25.1.noarch
texlive-jknapltx-svn19440.0-33.fc25.1.noarch
texinfo-6.1-4.fc25.s390x
openssl-devel-1.0.2k-1.fc25.s390x
gdk-pixbuf2-2.36.6-1.fc25.s390x
nspr-4.14.0-2.fc25.s390x
nss-softokn-freebl-3.30.2-1.0.fc25.s390x
jansson-2.10-2.fc25.s390x
fedora-repos-25-4.noarch
python3-libs-3.5.3-6.fc25.s390x
perl-Errno-1.25-387.fc25.s390x
acl-2.2.52-13.fc25.s390x
pcre2-utf16-10.23-8.fc25.s390x
pango-1.40.5-1.fc25.s390x
systemd-pam-231-17.fc25.s390x
python2-gluster-3.10.4-1.fc25.s390x
NetworkManager-libnm-1.4.4-5.fc25.s390x
selinux-policy-3.13.1-225.18.fc25.noarch
poppler-0.45.0-5.fc25.s390x
ccache-3.3.4-1.fc25.s390x
valgrind-3.12.0-9.fc25.s390x
perl-open-1.10-387.fc25.noarch
libaio-0.3.110-6.fc24.s390x
libfontenc-1.1.3-3.fc24.s390x
lzo-2.08-8.fc24.s390x
isl-0.14-5.fc24.s390x
libXau-1.0.8-6.fc24.s390x
linux-atm-libs-2.5.1-14.fc24.s390x
libXext-1.3.3-4.fc24.s390x
libXxf86vm-1.1.4-3.fc24.s390x
bison-3.0.4-4.fc24.s390x
perl-srpm-macros-1-20.fc25.noarch
gawk-4.1.3-8.fc25.s390x
libwayland-client-1.12.0-1.fc25.s390x
perl-Exporter-5.72-366.fc25.noarch
perl-version-0.99.17-1.fc25.s390x
fftw-libs-double-3.3.5-3.fc25.s390x
libssh2-1.8.0-1.fc25.s390x
ModemManager-glib-1.6.4-1.fc25.s390x
newt-python3-0.52.19-2.fc25.s390x
python-munch-2.0.4-3.fc25.noarch
python-bugzilla-1.2.2-4.fc25.noarch
libedit-3.1-16.20160618cvs.fc25.s390x
createrepo_c-0.10.0-6.fc25.s390x
device-mapper-multipath-libs-0.4.9-83.fc25.s390x
yum-3.4.3-510.fc25.noarch
dracut-config-rescue-044-78.fc25.s390x
mozjs17-17.0.0-16.fc25.s390x
libselinux-2.5-13.fc25.s390x
libgo-devel-6.3.1-1.fc25.s390x
python2-pyparsing-2.1.10-1.fc25.noarch
cairo-gobject-1.14.8-1.fc25.s390x
ethtool-4.8-1.fc25.s390x
xorg-x11-proto-devel-7.7-20.fc25.noarch
brlapi-0.6.5-2.fc25.s390x
librados-devel-10.2.4-2.fc25.s390x
libXinerama-devel-1.1.3-6.fc24.s390x
lua-posix-33.3.1-3.fc25.s390x
usbredir-devel-0.7.1-2.fc24.s390x
libepoxy-1.4.1-1.fc25.s390x
python3-dnf-plugins-core-0.1.21-5.fc25.noarch
texlive-pdftex-doc-svn41149-33.fc25.1.noarch
openssh-clients-7.4p1-4.fc25.s390x
iptables-1.6.0-3.fc25.s390x
texlive-texlive.infra-svn41280-33.fc25.1.noarch
texlive-graphics-cfg-svn40269-33.fc25.1.noarch
texlive-bibtex-svn40768-33.fc25.1.noarch
texlive-mfware-bin-svn40473-33.20160520.fc25.1.s390x
texlive-texlive-scripts-bin-svn29741.0-33.20160520.fc25.1.noarch
texlive-sauerj-svn15878.0-33.fc25.1.noarch
texlive-enctex-svn34957.0-33.fc25.1.noarch
texlive-ifetex-svn24853.1.2-33.fc25.1.noarch
texlive-ntgclass-svn15878.2.1a-33.fc25.1.noarch
texlive-tex-gyre-math-svn41264-33.fc25.1.noarch
texlive-bera-svn20031.0-33.fc25.1.noarch
texlive-ms-svn29849.0-33.fc25.1.noarch
texlive-pst-fill-svn15878.1.01-33.fc25.1.noarch
texlive-ctable-svn38672-33.fc25.1.noarch
texlive-extsizes-svn17263.1.4a-33.fc25.1.noarch
texlive-collection-latexrecommended-svn35765.0-33.20160520.fc25.1.noarch
perl-Filter-1.57-1.fc25.s390x
krb5-workstation-1.14.4-7.fc25.s390x
python2-rpm-macros-3-12.fc25.noarch
libglvnd-egl-0.2.999-14.20170308git8e6e102.fc25.s390x
libglvnd-opengl-0.2.999-14.20170308git8e6e102.fc25.s390x
gdbm-1.13-1.fc25.s390x
nss-util-3.30.2-1.0.fc25.s390x
libcrypt-nss-2.24-9.fc25.s390x
libtasn1-4.12-1.fc25.s390x
fedora-release-25-2.noarch
gdb-headless-7.12.1-48.fc25.s390x
perl-macros-5.24.2-387.fc25.s390x
sqlite-devel-3.14.2-2.fc25.s390x
pcre-devel-8.41-1.fc25.s390x
libX11-1.6.5-1.fc25.s390x
coreutils-8.25-17.fc25.s390x
python2-openidc-client-0-3.20170523git77cb3ee.fc25.noarch
nss-sysinit-3.30.2-1.1.fc25.s390x
systemtap-client-3.1-5.fc25.s390x
nss-devel-3.30.2-1.1.fc25.s390x
firewalld-0.4.4.5-1.fc25.noarch
rpmlint-1.9-9.fc25.noarch
system-python-3.5.3-6.fc25.s390x
gpg-pubkey-efe550f5-5220ba41
gpg-pubkey-81b46521-55b3ca9a
filesystem-3.2-37.fc24.s390x
libffi-3.1-9.fc24.s390x
keyutils-libs-1.5.9-8.fc24.s390x
libnfnetlink-1.0.1-8.fc24.s390x
libtheora-1.1.1-14.fc24.s390x
xml-common-0.6.3-44.fc24.noarch
autoconf-2.69-22.fc24.noarch
libXt-1.1.5-3.fc24.s390x
kbd-legacy-2.0.3-3.fc24.noarch
ghostscript-fonts-5.50-35.fc24.noarch
libXevie-1.0.3-11.fc24.s390x
libcap-2.25-2.fc25.s390x
mpfr-3.1.5-1.fc25.s390x
perl-Carp-1.40-365.fc25.noarch
libmnl-1.0.4-1.fc25.s390x
perl-Unicode-EastAsianWidth-1.33-8.fc25.noarch
libwayland-cursor-1.12.0-1.fc25.s390x
python-krbV-1.0.90-12.fc25.s390x
python2-urllib3-1.15.1-3.fc25.noarch
fipscheck-1.4.1-11.fc25.s390x
libndp-1.6-1.fc25.s390x
gnupg2-2.1.13-2.fc25.s390x
libXfixes-5.0.3-1.fc25.s390x
adwaita-icon-theme-3.22.0-1.fc25.noarch
dconf-0.26.0-1.fc25.s390x
ncurses-devel-6.0-6.20160709.fc25.s390x
dejagnu-1.6-1.fc25.noarch
libstdc++-devel-6.3.1-1.fc25.s390x
device-mapper-1.02.136-3.fc25.s390x
subversion-1.9.5-1.fc25.s390x
libtool-ltdl-2.4.6-13.fc25.s390x
libevent-2.0.22-1.fc25.s390x
atk-devel-2.22.0-1.fc25.s390x
libev-4.24-1.fc25.s390x
xorg-x11-fonts-Type1-7.5-16.fc24.noarch
brlapi-devel-0.6.5-2.fc25.s390x
pulseaudio-libs-10.0-2.fc25.s390x
glib2-2.50.3-1.fc25.s390x
python2-rpm-4.13.0.1-1.fc25.s390x
dnf-1.1.10-6.fc25.noarch
texlive-metafont-bin-svn40987-33.20160520.fc25.1.s390x
texlive-xkeyval-svn35741.2.7a-33.fc25.1.noarch
texlive-euler-svn17261.2.5-33.fc25.1.noarch
texlive-mptopdf-svn41282-33.fc25.1.noarch
texlive-wasy-svn35831.0-33.fc25.1.noarch
texlive-avantgar-svn31835.0-33.fc25.1.noarch
texlive-eurosym-svn17265.1.4_subrfix-33.fc25.1.noarch
texlive-knuth-lib-svn35820.0-33.fc25.1.noarch
texlive-parallel-svn15878.0-33.fc25.1.noarch
texlive-texlive-msg-translations-svn41431-33.fc25.1.noarch
texlive-latex-svn40218-33.fc25.1.noarch
texlive-lualatex-math-svn40621-33.fc25.1.noarch
texlive-auto-pst-pdf-svn23723.0.6-33.fc25.1.noarch
texlive-powerdot-svn38984-33.fc25.1.noarch
texlive-wasysym-svn15878.2.0-33.fc25.1.noarch
ImageMagick-libs-6.9.3.0-6.fc25.s390x
geoclue2-2.4.5-1.fc25.s390x
perl-IO-Socket-IP-0.39-1.fc25.noarch
python2-pyasn1-0.2.3-1.fc25.noarch
libglvnd-0.2.999-14.20170308git8e6e102.fc25.s390x
libglvnd-gles-0.2.999-14.20170308git8e6e102.fc25.s390x
gdk-pixbuf2-devel-2.36.6-1.fc25.s390x
at-spi2-core-devel-2.22.1-1.fc25.s390x
libacl-2.2.52-13.fc25.s390x
perl-libs-5.24.2-387.fc25.s390x
mesa-libglapi-17.0.5-3.fc25.s390x
kernel-headers-4.11.10-200.fc25.s390x
p11-kit-devel-0.23.2-4.fc25.s390x
python3-rpmconf-1.0.19-1.fc25.noarch
sqlite-3.14.2-2.fc25.s390x
pcre-utf32-8.41-1.fc25.s390x
libX11-common-1.6.5-1.fc25.noarch
coreutils-common-8.25-17.fc25.s390x
mesa-libEGL-17.0.5-3.fc25.s390x
nss-3.30.2-1.1.fc25.s390x
systemtap-runtime-3.1-5.fc25.s390x
NetworkManager-glib-1.4.4-5.fc25.s390x
audit-2.7.7-1.fc25.s390x
perl-Time-HiRes-1.9742-1.fc25.s390x
libsolv-0.6.28-1.fc25.s390x
gpg-pubkey-34ec9cba-54e38751
gpg-pubkey-030d5aed-55b577f0
basesystem-11-2.fc24.noarch
libmpc-1.0.2-5.fc24.s390x
libunistring-0.9.4-3.fc24.s390x
libmodman-2.0.1-12.fc24.s390x
lsscsi-0.28-3.fc24.s390x
kbd-misc-2.0.3-3.fc24.noarch
kmod-23-1.fc25.s390x
newt-0.52.19-2.fc25.s390x
perl-Text-Unidecode-1.27-3.fc25.noarch
plymouth-core-libs-0.9.3-0.6.20160620git0e65b86c.fc25.s390x
which-2.21-1.fc25.s390x
python3-slip-0.6.4-4.fc25.noarch
python3-systemd-232-1.fc25.s390x
python-lockfile-0.11.0-4.fc25.noarch
python2-requests-2.10.0-4.fc25.noarch
libnghttp2-1.13.0-2.fc25.s390x
python-urlgrabber-3.10.1-9.fc25.noarch
iputils-20161105-1.fc25.s390x
rest-0.8.0-1.fc25.s390x
adwaita-cursor-theme-3.22.0-1.fc25.noarch
authconfig-6.2.10-14.fc25.s390x
automake-1.15-7.fc25.noarch
shared-mime-info-1.8-1.fc25.s390x
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python-slip-0.6.4-4.fc25.noarch
python2-libcomps-0.1.7-5.fc25.s390x
gc-7.4.4-1.fc25.s390x
s390utils-cmsfs-1.36.0-1.fc25.s390x
newt-python-0.52.19-2.fc25.s390x
qt5-srpm-macros-5.7.1-1.fc25.noarch
device-mapper-event-1.02.136-3.fc25.s390x
perl-Class-Inspector-1.31-2.fc25.noarch
libbasicobjects-0.1.1-29.fc25.s390x
libradosstriper1-10.2.4-2.fc25.s390x
libXxf86vm-devel-1.1.4-3.fc24.s390x
zziplib-0.13.62-7.fc24.s390x
libpaper-1.1.24-12.fc24.s390x
libini_config-1.3.0-29.fc25.s390x
snappy-devel-1.1.3-2.fc24.s390x
libcap-ng-devel-0.7.8-1.fc25.s390x
libxkbcommon-devel-0.7.1-1.fc25.s390x
openssl-libs-1.0.2k-1.fc25.s390x
libkadm5-1.14.4-7.fc25.s390x
rpm-libs-4.13.0.1-1.fc25.s390x
util-linux-2.28.2-2.fc25.s390x
texlive-etoolbox-svn38031.2.2a-33.fc25.1.noarch
texlive-dvips-svn41149-33.fc25.1.noarch
texlive-latexconfig-svn40274-33.fc25.1.noarch
texlive-tex-ini-files-svn40533-33.fc25.1.noarch
texlive-qstest-svn15878.0-33.fc25.1.noarch
texlive-cmap-svn41168-33.fc25.1.noarch
texlive-luatex-bin-svn41091-33.20160520.fc25.1.s390x
texlive-mflogo-svn38628-33.fc25.1.noarch
texlive-sansmath-svn17997.1.1-33.fc25.1.noarch
texlive-unicode-data-svn39808-33.fc25.1.noarch
texlive-luaotfload-bin-svn34647.0-33.20160520.fc25.1.noarch
texlive-listings-svn37534.1.6-33.fc25.1.noarch
texlive-pstricks-svn41321-33.fc25.1.noarch
texlive-metalogo-svn18611.0.12-33.fc25.1.noarch
texlive-collection-latex-svn41011-33.20160520.fc25.1.noarch
kernel-4.10.5-200.fc25.s390x
python2-dnf-plugins-core-0.1.21-5.fc25.noarch
xkeyboard-config-2.20-2.fc25.noarch
file-5.29-4.fc25.s390x
perl-Test-Harness-3.39-1.fc25.noarch
systemd-libs-231-17.fc25.s390x
webkitgtk4-jsc-2.16.5-1.fc25.s390x
gtk-update-icon-cache-3.22.16-1.fc25.s390x
glibc-devel-2.24-9.fc25.s390x
python3-pycparser-2.14-7.fc25.noarch
kernel-devel-4.11.10-200.fc25.s390x
gsm-1.0.17-1.fc25.s390x
vim-filesystem-8.0.705-1.fc25.s390x
webkitgtk4-2.16.5-1.fc25.s390x
python-2.7.13-2.fc25.s390x
glusterfs-fuse-3.10.4-1.fc25.s390x
git-core-2.9.4-1.fc25.s390x
selinux-policy-targeted-3.13.1-225.18.fc25.noarch
kernel-4.11.10-200.fc25.s390x
rpmconf-1.0.19-1.fc25.noarch
teamd-1.27-1.fc25.s390x
jasper-libs-1.900.13-4.fc25.s390x
libattr-2.4.47-16.fc24.s390x
libvisual-0.4.0-20.fc24.s390x
libpcap-1.7.4-2.fc24.s390x
libutempter-1.1.6-8.fc24.s390x
libgudev-230-3.fc24.s390x
popt-devel-1.16-7.fc24.s390x
hicolor-icon-theme-0.15-3.fc24.noarch
setup-2.10.4-1.fc25.noarch
bash-4.3.43-4.fc25.s390x
libjpeg-turbo-1.5.1-0.fc25.s390x
perl-Socket-2.024-1.fc25.s390x
perl-HTTP-Tiny-0.070-1.fc25.noarch
ipset-6.29-1.fc25.s390x
python2-setuptools-25.1.1-1.fc25.noarch
gsettings-desktop-schemas-3.22.0-1.fc25.s390x
python3-setuptools-25.1.1-1.fc25.noarch
python-slip-dbus-0.6.4-4.fc25.noarch
python2-ply-3.8-2.fc25.noarch
dtc-1.4.2-1.fc25.s390x
guile-2.0.13-1.fc25.s390x
cronie-anacron-1.5.1-2.fc25.s390x
libXtst-1.2.3-1.fc25.s390x
iso-codes-3.70-1.fc25.noarch
s390utils-1.36.0-1.fc25.s390x
python-backports-ssl_match_hostname-3.5.0.1-3.fc25.noarch
fedora-cert-0.6.0.1-1.fc25.noarch
libstdc++-6.3.1-1.fc25.s390x
subversion-libs-1.9.5-1.fc25.s390x
libgfortran-6.3.1-1.fc25.s390x
dnf-plugin-system-upgrade-0.7.1-4.fc25.noarch
lvm2-2.02.167-3.fc25.s390x
libselinux-devel-2.5-13.fc25.s390x
perl-Time-Local-1.250-1.fc25.noarch
libradosstriper-devel-10.2.4-2.fc25.s390x
flac-libs-1.3.2-1.fc25.s390x
perl-Digest-1.17-366.fc25.noarch
teckit-2.5.1-15.fc24.s390x
libpath_utils-0.2.1-29.fc25.s390x
attr-2.4.47-16.fc24.s390x
usbredir-0.7.1-2.fc24.s390x
cairo-devel-1.14.8-1.fc25.s390x
lzo-devel-2.08-8.fc24.s390x
libcap-devel-2.25-2.fc25.s390x
krb5-devel-1.14.4-7.fc25.s390x
rpm-4.13.0.1-1.fc25.s390x
kernel-devel-4.10.5-200.fc25.s390x
libbsd-0.8.3-1.fc25.s390x
texlive-url-svn32528.3.4-33.fc25.1.noarch
texlive-dvips-bin-svn40987-33.20160520.fc25.1.s390x
texlive-index-svn24099.4.1beta-33.fc25.1.noarch
texlive-setspace-svn24881.6.7a-33.fc25.1.noarch
texlive-mathtools-svn38833-33.fc25.1.noarch
texlive-cm-svn32865.0-33.fc25.1.noarch
texlive-graphics-def-svn41879-33.fc25.1.noarch
texlive-mdwtools-svn15878.1.05.4-33.fc25.1.noarch
texlive-rsfs-svn15878.0-33.fc25.1.noarch
texlive-ucharcat-svn38907-33.fc25.1.noarch
texlive-fontspec-svn41262-33.fc25.1.noarch
texlive-showexpl-svn32737.v0.3l-33.fc25.1.noarch
texlive-pstricks-add-svn40744-33.fc25.1.noarch
texlive-beamer-svn36461.3.36-33.fc25.1.noarch
texlive-collection-basic-svn41149-33.20160520.fc25.1.noarch
rpm-build-4.13.0.1-1.fc25.s390x
xemacs-filesystem-21.5.34-20.20170124hgf412e9f093d4.fc25.noarch
hawkey-0.6.4-3.fc25.s390x
gdk-pixbuf2-modules-2.36.6-1.fc25.s390x
bluez-libs-5.44-1.fc25.s390x
audit-libs-2.7.7-1.fc25.s390x
iproute-4.11.0-1.fc25.s390x
libICE-1.0.9-9.fc25.s390x
glibc-headers-2.24-9.fc25.s390x
python3-ply-3.8-2.fc25.noarch
perl-5.24.2-387.fc25.s390x
graphite2-1.3.10-1.fc25.s390x
vte-profile-0.46.2-1.fc25.s390x
gtk3-devel-3.22.16-1.fc25.s390x
python-libs-2.7.13-2.fc25.s390x
mesa-libGL-17.0.5-3.fc25.s390x
python2-pycurl-7.43.0-6.fc25.s390x
NetworkManager-1.4.4-5.fc25.s390x
mesa-libEGL-devel-17.0.5-3.fc25.s390x
mariadb-libs-10.1.24-3.fc25.s390x
mesa-libGLES-devel-17.0.5-3.fc25.s390x
hostname-3.15-8.fc25.s390x
gpg-pubkey-a0a7badb-52844296
readline-6.3-8.fc24.s390x
cpio-2.12-3.fc24.s390x
libXcomposite-0.4.4-8.fc24.s390x
procps-ng-3.3.10-11.fc24.s390x
GConf2-3.2.6-16.fc24.s390x
xz-devel-5.2.2-2.fc24.s390x
fedora-logos-22.0.0-3.fc24.s390x
gpg-pubkey-e372e838-56fd7943
kmod-libs-23-1.fc25.s390x
perl-parent-0.236-1.fc25.noarch
perl-TermReadKey-2.37-1.fc25.s390x
ncurses-c++-libs-6.0-6.20160709.fc25.s390x
gzip-1.8-1.fc25.s390x
python3-gobject-base-3.22.0-1.fc25.s390x
python2-yubico-1.3.2-3.fc25.noarch
s390utils-ziomon-1.36.0-1.fc25.s390x
librepo-1.7.18-3.fc25.s390x
librsvg2-2.40.16-2.fc25.s390x
gnat-srpm-macros-4-1.fc25.noarch
python-decoratortools-1.8-12.fc25.noarch
m17n-db-1.7.0-7.fc25.noarch
e2fsprogs-libs-1.43.3-1.fc25.s390x
libvorbis-1.3.5-1.fc25.s390x
gcc-gdb-plugin-6.3.1-1.fc25.s390x
npth-1.3-1.fc25.s390x
libcephfs1-10.2.4-2.fc25.s390x
wayland-devel-1.12.0-1.fc25.s390x
libxcb-devel-1.12-1.fc25.s390x
perl-encoding-2.19-5.fc25.s390x
python3-cssselect-0.9.2-1.fc25.noarch
gettext-libs-0.19.8.1-3.fc25.s390x
at-spi2-atk-devel-2.22.0-1.fc25.s390x
virglrenderer-0.5.0-1.20160411git61846f92f.fc25.s390x
pixman-devel-0.34.0-2.fc24.s390x
libnfs-devel-1.9.8-2.fc24.s390x
libblkid-2.28.2-2.fc25.s390x
glib2-devel-2.50.3-1.fc25.s390x
texlive-ifxetex-svn19685.0.5-33.fc25.1.noarch
texlive-caption-svn41409-33.fc25.1.noarch
texlive-float-svn15878.1.3d-33.fc25.1.noarch
texlive-pdftex-def-svn22653.0.06d-33.fc25.1.noarch
texlive-xdvi-bin-svn40750-33.20160520.fc25.1.s390x
texlive-beton-svn15878.0-33.fc25.1.noarch
texlive-filecontents-svn24250.1.3-33.fc25.1.noarch
texlive-lm-math-svn36915.1.959-33.fc25.1.noarch
texlive-pslatex-svn16416.0-33.fc25.1.noarch
texlive-times-svn35058.0-33.fc25.1.noarch
texlive-breakurl-svn29901.1.40-33.fc25.1.noarch
texlive-filehook-svn24280.0.5d-33.fc25.1.noarch
texlive-pst-pdf-svn31660.1.1v-33.fc25.1.noarch
texlive-seminar-svn34011.1.62-33.fc25.1.noarch
texlive-xetexconfig-svn41133-33.fc25.1.noarch
python-rpm-macros-3-12.fc25.noarch
rpm-devel-4.13.0.1-1.fc25.s390x
nss-pem-1.0.3-3.fc25.s390x
at-spi2-core-2.22.1-1.fc25.s390x
GeoIP-GeoLite-data-2017.04-1.fc25.noarch
kernel-devel-4.10.8-200.fc25.s390x
dbus-libs-1.11.14-1.fc25.s390x
perl-Scalar-List-Utils-1.48-1.fc25.s390x
libidn2-2.0.2-1.fc25.s390x
libtasn1-devel-4.12-1.fc25.s390x
python3-koji-1.13.0-2.fc25.noarch
glusterfs-cli-3.10.4-1.fc25.s390x
opus-1.1.5-1.fc25.s390x
mariadb-common-10.1.24-3.fc25.s390x
elfutils-libs-0.169-1.fc25.s390x
kernel-core-4.11.10-200.fc25.s390x
gnutls-dane-3.5.14-1.fc25.s390x
systemd-container-231-17.fc25.s390x
sudo-1.8.20p2-1.fc25.s390x
dbus-devel-1.11.14-1.fc25.s390x
perl-Module-CoreList-5.20170621-1.fc25.noarch
libicu-devel-57.1-5.fc25.s390x
js-jquery-2.2.4-3.fc25.noarch
=== TEST BEGIN ===
Using CC: /home/fam/bin/cc
Install prefix /var/tmp/patchew-tester-tmp-vy8sld96/src/install
BIOS directory /var/tmp/patchew-tester-tmp-vy8sld96/src/install/share/qemu
binary directory /var/tmp/patchew-tester-tmp-vy8sld96/src/install/bin
library directory /var/tmp/patchew-tester-tmp-vy8sld96/src/install/lib
module directory /var/tmp/patchew-tester-tmp-vy8sld96/src/install/lib/qemu
libexec directory /var/tmp/patchew-tester-tmp-vy8sld96/src/install/libexec
include directory /var/tmp/patchew-tester-tmp-vy8sld96/src/install/include
config directory /var/tmp/patchew-tester-tmp-vy8sld96/src/install/etc
local state directory /var/tmp/patchew-tester-tmp-vy8sld96/src/install/var
Manual directory /var/tmp/patchew-tester-tmp-vy8sld96/src/install/share/man
ELF interp prefix /usr/gnemul/qemu-%M
Source path /var/tmp/patchew-tester-tmp-vy8sld96/src
C compiler /home/fam/bin/cc
Host C compiler cc
C++ compiler c++
Objective-C compiler /home/fam/bin/cc
ARFLAGS rv
CFLAGS -O2 -U_FORTIFY_SOURCE -D_FORTIFY_SOURCE=2 -g
QEMU_CFLAGS -I/usr/include/pixman-1 -Werror -DHAS_LIBSSH2_SFTP_FSYNC -pthread -I/usr/include/glib-2.0 -I/usr/lib64/glib-2.0/include -DNCURSES_WIDECHAR -D_GNU_SOURCE -m64 -D_GNU_SOURCE -D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE -Wstrict-prototypes -Wredundant-decls -Wall -Wundef -Wwrite-strings -Wmissing-prototypes -fno-strict-aliasing -fno-common -fwrapv -Wendif-labels -Wno-shift-negative-value -Wno-missing-include-dirs -Wempty-body -Wnested-externs -Wformat-security -Wformat-y2k -Winit-self -Wignored-qualifiers -Wold-style-declaration -Wold-style-definition -Wtype-limits -fstack-protector-strong -I/usr/include/p11-kit-1 -I/usr/include/libpng16 -I/usr/include/libdrm -I/usr/include/cacard -I/usr/include/nss3 -I/usr/include/nspr4 -I/usr/include/glib-2.0 -I/usr/lib64/glib-2.0/include -I/usr/include/libusb-1.0
LDFLAGS -Wl,--warn-common -m64 -g
make make
install install
python python -B
smbd /usr/sbin/smbd
module support no
host CPU s390x
host big endian yes
target list aarch64-softmmu alpha-softmmu arm-softmmu cris-softmmu i386-softmmu lm32-softmmu m68k-softmmu microblazeel-softmmu microblaze-softmmu mips64el-softmmu mips64-softmmu mipsel-softmmu mips-softmmu moxie-softmmu nios2-softmmu or1k-softmmu ppc64-softmmu ppcemb-softmmu ppc-softmmu s390x-softmmu sh4eb-softmmu sh4-softmmu sparc64-softmmu sparc-softmmu tricore-softmmu unicore32-softmmu x86_64-softmmu xtensaeb-softmmu xtensa-softmmu aarch64-linux-user alpha-linux-user armeb-linux-user arm-linux-user cris-linux-user hppa-linux-user i386-linux-user m68k-linux-user microblazeel-linux-user microblaze-linux-user mips64el-linux-user mips64-linux-user mipsel-linux-user mips-linux-user mipsn32el-linux-user mipsn32-linux-user nios2-linux-user or1k-linux-user ppc64abi32-linux-user ppc64le-linux-user ppc64-linux-user ppc-linux-user s390x-linux-user sh4eb-linux-user sh4-linux-user sparc32plus-linux-user sparc64-linux-user sparc-linux-user tilegx-linux-user x86_64-linux-user
gprof enabled no
sparse enabled no
strip binaries yes
profiler no
static build no
pixman system
SDL support yes (2.0.5)
GTK support yes (3.22.16)
GTK GL support yes
VTE support yes (0.46.2)
TLS priority NORMAL
GNUTLS support yes
GNUTLS rnd yes
libgcrypt no
libgcrypt kdf no
nettle yes (3.3)
nettle kdf yes
libtasn1 yes
curses support yes
virgl support yes
curl support yes
mingw32 support no
Audio drivers oss
Block whitelist (rw)
Block whitelist (ro)
VirtFS support yes
VNC support yes
VNC SASL support yes
VNC JPEG support yes
VNC PNG support yes
xen support no
brlapi support yes
bluez support yes
Documentation yes
PIE no
vde support no
netmap support no
Linux AIO support yes
ATTR/XATTR support yes
Install blobs yes
KVM support yes
HAX support no
TCG support yes
TCG debug enabled no
TCG interpreter no
RDMA support no
fdt support yes
preadv support yes
fdatasync yes
madvise yes
posix_madvise yes
libcap-ng support yes
vhost-net support yes
vhost-scsi support yes
vhost-vsock support yes
vhost-user support yes
Trace backends log
spice support no
rbd support yes
xfsctl support no
smartcard support yes
libusb yes
usb net redir yes
OpenGL support yes
OpenGL dmabufs yes
libiscsi support yes
libnfs support yes
build guest agent yes
QGA VSS support no
QGA w32 disk info no
QGA MSI support no
seccomp support no
coroutine backend ucontext
coroutine pool yes
debug stack usage no
crypto afalg no
GlusterFS support yes
gcov gcov
gcov enabled no
TPM support yes
libssh2 support yes
TPM passthrough no
QOM debugging yes
Live block migration yes
lzo support yes
snappy support yes
bzip2 support yes
NUMA host support no
tcmalloc support no
jemalloc support no
avx2 optimization no
replication support yes
VxHS block device no
GEN alpha-softmmu/config-devices.mak.tmp
GEN cris-softmmu/config-devices.mak.tmp
GEN arm-softmmu/config-devices.mak.tmp
GEN aarch64-softmmu/config-devices.mak.tmp
GEN cris-softmmu/config-devices.mak
GEN i386-softmmu/config-devices.mak.tmp
GEN arm-softmmu/config-devices.mak
GEN alpha-softmmu/config-devices.mak
GEN lm32-softmmu/config-devices.mak.tmp
GEN m68k-softmmu/config-devices.mak.tmp
GEN aarch64-softmmu/config-devices.mak
GEN lm32-softmmu/config-devices.mak
GEN i386-softmmu/config-devices.mak
GEN m68k-softmmu/config-devices.mak
GEN microblazeel-softmmu/config-devices.mak.tmp
GEN microblaze-softmmu/config-devices.mak.tmp
GEN mips64el-softmmu/config-devices.mak.tmp
GEN mips64-softmmu/config-devices.mak.tmp
GEN microblaze-softmmu/config-devices.mak
GEN mipsel-softmmu/config-devices.mak.tmp
GEN microblazeel-softmmu/config-devices.mak
GEN mips-softmmu/config-devices.mak.tmp
GEN mips64el-softmmu/config-devices.mak
GEN mips64-softmmu/config-devices.mak
GEN moxie-softmmu/config-devices.mak.tmp
GEN nios2-softmmu/config-devices.mak.tmp
GEN mipsel-softmmu/config-devices.mak
GEN moxie-softmmu/config-devices.mak
GEN nios2-softmmu/config-devices.mak
GEN or1k-softmmu/config-devices.mak.tmp
GEN ppc64-softmmu/config-devices.mak.tmp
GEN mips-softmmu/config-devices.mak
GEN ppcemb-softmmu/config-devices.mak.tmp
GEN ppc-softmmu/config-devices.mak.tmp
GEN or1k-softmmu/config-devices.mak
GEN s390x-softmmu/config-devices.mak.tmp
GEN ppcemb-softmmu/config-devices.mak
GEN ppc64-softmmu/config-devices.mak
GEN ppc-softmmu/config-devices.mak
GEN sh4eb-softmmu/config-devices.mak.tmp
GEN sh4-softmmu/config-devices.mak.tmp
GEN s390x-softmmu/config-devices.mak
GEN sparc64-softmmu/config-devices.mak.tmp
GEN sparc-softmmu/config-devices.mak.tmp
GEN sh4eb-softmmu/config-devices.mak
GEN sh4-softmmu/config-devices.mak
GEN sparc-softmmu/config-devices.mak
GEN tricore-softmmu/config-devices.mak.tmp
GEN unicore32-softmmu/config-devices.mak.tmp
GEN x86_64-softmmu/config-devices.mak.tmp
GEN sparc64-softmmu/config-devices.mak
GEN xtensaeb-softmmu/config-devices.mak.tmp
GEN tricore-softmmu/config-devices.mak
GEN xtensa-softmmu/config-devices.mak.tmp
GEN unicore32-softmmu/config-devices.mak
GEN xtensaeb-softmmu/config-devices.mak
GEN aarch64-linux-user/config-devices.mak.tmp
GEN alpha-linux-user/config-devices.mak.tmp
GEN x86_64-softmmu/config-devices.mak
GEN xtensa-softmmu/config-devices.mak
GEN armeb-linux-user/config-devices.mak.tmp
GEN arm-linux-user/config-devices.mak.tmp
GEN aarch64-linux-user/config-devices.mak
GEN cris-linux-user/config-devices.mak.tmp
GEN alpha-linux-user/config-devices.mak
GEN armeb-linux-user/config-devices.mak
GEN arm-linux-user/config-devices.mak
GEN hppa-linux-user/config-devices.mak.tmp
GEN i386-linux-user/config-devices.mak.tmp
GEN cris-linux-user/config-devices.mak
GEN m68k-linux-user/config-devices.mak.tmp
GEN microblazeel-linux-user/config-devices.mak.tmp
GEN i386-linux-user/config-devices.mak
GEN hppa-linux-user/config-devices.mak
GEN microblaze-linux-user/config-devices.mak.tmp
GEN m68k-linux-user/config-devices.mak
GEN microblazeel-linux-user/config-devices.mak
GEN mips64el-linux-user/config-devices.mak.tmp
GEN mips64-linux-user/config-devices.mak.tmp
GEN mipsel-linux-user/config-devices.mak.tmp
GEN mips64el-linux-user/config-devices.mak
GEN microblaze-linux-user/config-devices.mak
GEN mips-linux-user/config-devices.mak.tmp
GEN mipsel-linux-user/config-devices.mak
GEN mips64-linux-user/config-devices.mak
GEN mipsn32el-linux-user/config-devices.mak.tmp
GEN mipsn32-linux-user/config-devices.mak.tmp
GEN nios2-linux-user/config-devices.mak.tmp
GEN mips-linux-user/config-devices.mak
GEN or1k-linux-user/config-devices.mak.tmp
GEN mipsn32el-linux-user/config-devices.mak
GEN mipsn32-linux-user/config-devices.mak
GEN nios2-linux-user/config-devices.mak
GEN ppc64abi32-linux-user/config-devices.mak.tmp
GEN ppc64le-linux-user/config-devices.mak.tmp
GEN ppc64-linux-user/config-devices.mak.tmp
GEN or1k-linux-user/config-devices.mak
GEN ppc64le-linux-user/config-devices.mak
GEN ppc64abi32-linux-user/config-devices.mak
GEN ppc-linux-user/config-devices.mak.tmp
GEN s390x-linux-user/config-devices.mak.tmp
GEN sh4eb-linux-user/config-devices.mak.tmp
GEN ppc64-linux-user/config-devices.mak
GEN sh4-linux-user/config-devices.mak.tmp
GEN sh4eb-linux-user/config-devices.mak
GEN ppc-linux-user/config-devices.mak
GEN sparc32plus-linux-user/config-devices.mak.tmp
GEN s390x-linux-user/config-devices.mak
GEN sparc64-linux-user/config-devices.mak.tmp
GEN sh4-linux-user/config-devices.mak
GEN tilegx-linux-user/config-devices.mak.tmp
GEN sparc-linux-user/config-devices.mak.tmp
GEN sparc64-linux-user/config-devices.mak
GEN sparc32plus-linux-user/config-devices.mak
GEN x86_64-linux-user/config-devices.mak.tmp
GEN tilegx-linux-user/config-devices.mak
GEN config-host.h
GEN sparc-linux-user/config-devices.mak
GEN x86_64-linux-user/config-devices.mak
GEN qemu-options.def
GEN qmp-commands.h
GEN qapi-types.h
GEN qapi-visit.h
GEN qmp-marshal.c
GEN qapi-event.h
GEN qapi-types.c
GEN qapi-event.c
GEN qapi-visit.c
GEN qmp-introspect.h
GEN qmp-introspect.c
GEN trace/generated-tcg-tracers.h
GEN trace/generated-helpers-wrappers.h
GEN trace/generated-helpers.h
GEN trace/generated-helpers.c
GEN module_block.h
GEN tests/test-qapi-types.h
GEN tests/test-qapi-visit.h
GEN tests/test-qmp-commands.h
GEN tests/test-qapi-event.h
GEN trace-root.h
GEN tests/test-qmp-introspect.h
GEN crypto/trace.h
GEN util/trace.h
GEN io/trace.h
GEN migration/trace.h
GEN block/trace.h
GEN hw/block/trace.h
GEN chardev/trace.h
GEN hw/block/dataplane/trace.h
GEN hw/char/trace.h
GEN hw/intc/trace.h
GEN hw/net/trace.h
GEN hw/virtio/trace.h
GEN hw/audio/trace.h
GEN hw/misc/trace.h
GEN hw/usb/trace.h
GEN hw/scsi/trace.h
GEN hw/nvram/trace.h
GEN hw/display/trace.h
GEN hw/input/trace.h
GEN hw/timer/trace.h
GEN hw/dma/trace.h
GEN hw/sparc/trace.h
GEN hw/sd/trace.h
GEN hw/isa/trace.h
GEN hw/mem/trace.h
GEN hw/i386/trace.h
GEN hw/i386/xen/trace.h
GEN hw/9pfs/trace.h
GEN hw/ppc/trace.h
GEN hw/pci/trace.h
GEN hw/s390x/trace.h
GEN hw/vfio/trace.h
GEN hw/acpi/trace.h
GEN hw/arm/trace.h
GEN hw/alpha/trace.h
GEN hw/xen/trace.h
GEN ui/trace.h
GEN audio/trace.h
GEN net/trace.h
GEN target/arm/trace.h
GEN target/i386/trace.h
GEN target/mips/trace.h
GEN target/sparc/trace.h
GEN target/s390x/trace.h
GEN target/ppc/trace.h
GEN qom/trace.h
GEN linux-user/trace.h
GEN qapi/trace.h
GEN accel/tcg/trace.h
GEN accel/kvm/trace.h
GEN nbd/trace.h
GEN trace-root.c
GEN util/trace.c
GEN crypto/trace.c
GEN io/trace.c
GEN migration/trace.c
GEN block/trace.c
GEN chardev/trace.c
GEN hw/block/trace.c
GEN hw/block/dataplane/trace.c
GEN hw/char/trace.c
GEN hw/intc/trace.c
GEN hw/net/trace.c
GEN hw/virtio/trace.c
GEN hw/audio/trace.c
GEN hw/misc/trace.c
GEN hw/usb/trace.c
GEN hw/nvram/trace.c
GEN hw/scsi/trace.c
GEN hw/display/trace.c
GEN hw/input/trace.c
GEN hw/timer/trace.c
GEN hw/dma/trace.c
GEN hw/sparc/trace.c
GEN hw/sd/trace.c
GEN hw/isa/trace.c
GEN hw/mem/trace.c
GEN hw/i386/xen/trace.c
GEN hw/9pfs/trace.c
GEN hw/i386/trace.c
GEN hw/ppc/trace.c
GEN hw/pci/trace.c
GEN hw/s390x/trace.c
GEN hw/vfio/trace.c
GEN hw/acpi/trace.c
GEN hw/arm/trace.c
GEN hw/alpha/trace.c
GEN hw/xen/trace.c
GEN ui/trace.c
GEN audio/trace.c
GEN net/trace.c
GEN target/arm/trace.c
GEN target/i386/trace.c
GEN target/mips/trace.c
GEN target/sparc/trace.c
GEN target/ppc/trace.c
GEN target/s390x/trace.c
GEN qom/trace.c
GEN linux-user/trace.c
GEN qapi/trace.c
GEN accel/tcg/trace.c
GEN accel/kvm/trace.c
GEN nbd/trace.c
GEN config-all-devices.mak
CC tests/qemu-iotests/socket_scm_helper.o
GEN docs/version.texi
GEN qemu-monitor.texi
GEN qemu-img-cmds.texi
GEN qemu-options.texi
GEN qemu-monitor-info.texi
GEN qemu-nbd.8
GEN qemu-ga.8
GEN docs/interop/qemu-qmp-qapi.texi
GEN fsdev/virtfs-proxy-helper.1
GEN docs/interop/qemu-ga-qapi.texi
GEN qga/qapi-generated/qga-qapi-types.h
GEN qga/qapi-generated/qga-qapi-visit.h
GEN qga/qapi-generated/qga-qmp-commands.h
GEN qga/qapi-generated/qga-qapi-types.c
GEN qga/qapi-generated/qga-qapi-visit.c
GEN qga/qapi-generated/qga-qmp-marshal.c
CC qapi-types.o
CC qmp-introspect.o
CC qapi-visit.o
CC qapi-event.o
CC qapi/qapi-visit-core.o
CC qapi/qapi-dealloc-visitor.o
CC qapi/qobject-input-visitor.o
CC qapi/qobject-output-visitor.o
CC qapi/qmp-registry.o
CC qapi/qmp-dispatch.o
CC qapi/string-input-visitor.o
CC qapi/string-output-visitor.o
CC qapi/opts-visitor.o
CC qapi/qapi-clone-visitor.o
CC qapi/qmp-event.o
CC qapi/qapi-util.o
CC qobject/qnull.o
CC qobject/qnum.o
CC qobject/qstring.o
CC qobject/qdict.o
CC qobject/qlist.o
CC qobject/qbool.o
CC qobject/qjson.o
CC qobject/qobject.o
CC qobject/json-lexer.o
CC qobject/json-streamer.o
CC qobject/json-parser.o
CC trace/control.o
CC trace/qmp.o
CC util/osdep.o
CC util/cutils.o
CC util/unicode.o
CC util/qemu-timer-common.o
CC util/bufferiszero.o
CC util/lockcnt.o
CC util/aiocb.o
CC util/async.o
CC util/thread-pool.o
CC util/main-loop.o
CC util/qemu-timer.o
CC util/iohandler.o
CC util/aio-posix.o
CC util/compatfd.o
CC util/event_notifier-posix.o
CC util/mmap-alloc.o
CC util/qemu-openpty.o
CC util/oslib-posix.o
CC util/qemu-thread-posix.o
CC util/memfd.o
CC util/envlist.o
CC util/path.o
CC util/module.o
CC util/host-utils.o
CC util/bitmap.o
CC util/bitops.o
CC util/hbitmap.o
CC util/fifo8.o
CC util/acl.o
CC util/cacheinfo.o
CC util/error.o
CC util/qemu-error.o
CC util/id.o
CC util/iov.o
CC util/qemu-config.o
CC util/qemu-sockets.o
CC util/uri.o
CC util/notify.o
CC util/qemu-option.o
CC util/qemu-progress.o
CC util/keyval.o
CC util/hexdump.o
CC util/crc32c.o
CC util/uuid.o
CC util/throttle.o
CC util/getauxval.o
CC util/readline.o
CC util/rcu.o
CC util/qemu-coroutine.o
CC util/qemu-coroutine-lock.o
CC util/qemu-coroutine-io.o
CC util/qemu-coroutine-sleep.o
CC util/coroutine-ucontext.o
CC util/buffer.o
CC util/timed-average.o
CC util/base64.o
CC util/log.o
CC util/qdist.o
CC util/qht.o
CC util/range.o
CC util/stats64.o
CC util/systemd.o
CC trace-root.o
CC util/trace.o
CC crypto/trace.o
CC io/trace.o
CC migration/trace.o
CC block/trace.o
CC chardev/trace.o
CC hw/block/trace.o
CC hw/block/dataplane/trace.o
CC hw/char/trace.o
CC hw/intc/trace.o
CC hw/virtio/trace.o
CC hw/net/trace.o
CC hw/audio/trace.o
CC hw/misc/trace.o
CC hw/usb/trace.o
CC hw/scsi/trace.o
CC hw/nvram/trace.o
CC hw/display/trace.o
CC hw/input/trace.o
CC hw/timer/trace.o
CC hw/sparc/trace.o
CC hw/dma/trace.o
CC hw/sd/trace.o
CC hw/isa/trace.o
CC hw/mem/trace.o
CC hw/i386/trace.o
CC hw/i386/xen/trace.o
CC hw/9pfs/trace.o
CC hw/ppc/trace.o
CC hw/s390x/trace.o
CC hw/pci/trace.o
CC hw/vfio/trace.o
CC hw/acpi/trace.o
CC hw/arm/trace.o
CC hw/alpha/trace.o
CC ui/trace.o
CC hw/xen/trace.o
CC audio/trace.o
CC net/trace.o
CC target/arm/trace.o
CC target/i386/trace.o
CC target/mips/trace.o
CC target/sparc/trace.o
CC target/ppc/trace.o
CC target/s390x/trace.o
CC qom/trace.o
CC linux-user/trace.o
CC qapi/trace.o
CC accel/tcg/trace.o
CC accel/kvm/trace.o
CC nbd/trace.o
CC stubs/arch-query-cpu-def.o
CC crypto/pbkdf-stub.o
CC stubs/arch-query-cpu-model-expansion.o
CC stubs/arch-query-cpu-model-comparison.o
CC stubs/arch-query-cpu-model-baseline.o
CC stubs/bdrv-next-monitor-owned.o
CC stubs/blk-commit-all.o
CC stubs/blockdev-close-all-bdrv-states.o
CC stubs/clock-warp.o
CC stubs/cpu-get-clock.o
CC stubs/cpu-get-icount.o
CC stubs/dump.o
CC stubs/error-printf.o
CC stubs/fdset.o
CC stubs/gdbstub.o
CC stubs/get-vm-name.o
CC stubs/iothread.o
CC stubs/iothread-lock.o
CC stubs/is-daemonized.o
CC stubs/linux-aio.o
CC stubs/machine-init-done.o
CC stubs/migr-blocker.o
CC stubs/change-state-handler.o
CC stubs/monitor.o
CC stubs/notify-event.o
CC stubs/qtest.o
CC stubs/replay.o
CC stubs/runstate-check.o
CC stubs/set-fd-handler.o
CC stubs/slirp.o
CC stubs/sysbus.o
CC stubs/trace-control.o
CC stubs/uuid.o
CC stubs/vmstate.o
CC stubs/vm-stop.o
CC stubs/qmp_pc_dimm_device_list.o
CC stubs/target-monitor-defs.o
CC stubs/pc_madt_cpu_entry.o
CC stubs/target-get-monitor-def.o
CC stubs/xen-common.o
CC stubs/vmgenid.o
CC stubs/xen-hvm.o
CC contrib/ivshmem-client/ivshmem-client.o
CC contrib/ivshmem-client/main.o
CC contrib/ivshmem-server/ivshmem-server.o
CC contrib/ivshmem-server/main.o
CC block.o
CC qemu-nbd.o
CC blockjob.o
CC qemu-io-cmds.o
CC replication.o
CC block/raw-format.o
CC block/qcow.o
CC block/vdi.o
CC block/vmdk.o
CC block/cloop.o
CC block/bochs.o
CC block/vpc.o
CC block/vvfat.o
CC block/dmg.o
CC block/qcow2.o
CC block/qcow2-refcount.o
CC block/qcow2-cluster.o
CC block/qcow2-snapshot.o
CC block/qcow2-cache.o
CC block/qcow2-bitmap.o
CC block/qed.o
CC block/qed-l2-cache.o
CC block/qed-table.o
CC block/qed-cluster.o
CC block/qed-check.o
CC block/vhdx.o
CC block/vhdx-endian.o
CC block/vhdx-log.o
CC block/quorum.o
CC block/parallels.o
CC block/blkdebug.o
CC block/blkverify.o
CC block/blkreplay.o
CC block/block-backend.o
CC block/snapshot.o
CC block/qapi.o
CC block/file-posix.o
CC block/linux-aio.o
CC block/null.o
CC block/mirror.o
CC block/commit.o
CC block/io.o
CC block/nbd.o
CC block/throttle-groups.o
CC block/nbd-client.o
CC block/sheepdog.o
CC block/iscsi-opts.o
CC block/accounting.o
CC block/dirty-bitmap.o
CC block/write-threshold.o
CC block/backup.o
CC block/crypto.o
CC nbd/server.o
CC block/replication.o
CC nbd/client.o
CC nbd/common.o
CC block/iscsi.o
CC block/nfs.o
CC block/curl.o
CC block/rbd.o
CC block/gluster.o
CC block/ssh.o
CC crypto/init.o
CC block/dmg-bz2.o
CC crypto/hash.o
CC crypto/hash-nettle.o
CC crypto/hmac.o
CC crypto/hmac-nettle.o
CC crypto/aes.o
CC crypto/desrfb.o
CC crypto/cipher.o
CC crypto/tlscreds.o
CC crypto/tlscredsanon.o
CC crypto/tlscredsx509.o
CC crypto/tlssession.o
CC crypto/secret.o
CC crypto/pbkdf.o
CC crypto/random-gnutls.o
CC crypto/pbkdf-nettle.o
CC crypto/ivgen.o
CC crypto/ivgen-essiv.o
CC crypto/ivgen-plain.o
CC crypto/ivgen-plain64.o
CC crypto/afsplit.o
CC crypto/xts.o
CC crypto/block.o
CC crypto/block-qcow.o
CC crypto/block-luks.o
CC io/channel.o
CC io/channel-buffer.o
CC io/channel-command.o
CC io/channel-file.o
CC io/channel-socket.o
CC io/channel-tls.o
CC io/channel-watch.o
CC io/channel-websock.o
CC io/channel-util.o
CC io/dns-resolver.o
CC io/task.o
CC qom/object.o
CC qom/qom-qobject.o
CC qom/container.o
CC qom/object_interfaces.o
GEN qemu-img-cmds.h
CC qemu-io.o
CC fsdev/virtfs-proxy-helper.o
CC fsdev/9p-marshal.o
CC fsdev/9p-iov-marshal.o
CC qemu-bridge-helper.o
CC blockdev.o
CC blockdev-nbd.o
CC bootdevice.o
CC iothread.o
CC qdev-monitor.o
CC device-hotplug.o
CC os-posix.o
CC bt-host.o
CC bt-vhci.o
CC vl.o
CC dma-helpers.o
CC tpm.o
CC device_tree.o
CC qmp-marshal.o
CC qmp.o
CC hmp.o
CC cpus-common.o
CC audio/audio.o
CC audio/noaudio.o
CC audio/wavaudio.o
CC audio/mixeng.o
CC audio/sdlaudio.o
CC audio/ossaudio.o
CC audio/wavcapture.o
CC backends/rng.o
CC backends/rng-egd.o
CC backends/rng-random.o
CC backends/tpm.o
CC backends/hostmem.o
CC backends/hostmem-ram.o
CC backends/hostmem-file.o
CC backends/cryptodev.o
CC backends/cryptodev-builtin.o
CC block/stream.o
CC chardev/wctablet.o
CC chardev/msmouse.o
CC chardev/testdev.o
CC chardev/baum.o
CC disas/alpha.o
CC disas/arm.o
CXX disas/arm-a64.o
CC disas/cris.o
CC disas/hppa.o
CC disas/i386.o
CC disas/m68k.o
CC disas/microblaze.o
CC disas/mips.o
CC disas/nios2.o
CC disas/moxie.o
CC disas/ppc.o
CC disas/s390.o
CC disas/sh4.o
CC disas/sparc.o
CC disas/lm32.o
CXX disas/libvixl/vixl/utils.o
CXX disas/libvixl/vixl/compiler-intrinsics.o
CXX disas/libvixl/vixl/a64/instructions-a64.o
CXX disas/libvixl/vixl/a64/decoder-a64.o
CXX disas/libvixl/vixl/a64/disasm-a64.o
CC fsdev/qemu-fsdev.o
CC fsdev/qemu-fsdev-opts.o
CC fsdev/qemu-fsdev-throttle.o
CC fsdev/qemu-fsdev-dummy.o
CC hw/9pfs/9p.o
CC hw/9pfs/9p-util.o
CC hw/9pfs/9p-local.o
CC hw/9pfs/9p-xattr.o
CC hw/9pfs/9p-xattr-user.o
CC hw/9pfs/9p-posix-acl.o
CC hw/9pfs/coth.o
CC hw/9pfs/codir.o
CC hw/9pfs/cofs.o
CC hw/9pfs/cofile.o
CC hw/9pfs/coxattr.o
CC hw/9pfs/9p-synth.o
CC hw/9pfs/9p-handle.o
CC hw/9pfs/9p-proxy.o
CC hw/acpi/core.o
CC hw/acpi/piix4.o
CC hw/acpi/pcihp.o
CC hw/acpi/ich9.o
CC hw/acpi/tco.o
CC hw/acpi/cpu_hotplug.o
CC hw/acpi/memory_hotplug.o
CC hw/acpi/cpu.o
CC hw/acpi/nvdimm.o
CC hw/acpi/vmgenid.o
CC hw/acpi/acpi_interface.o
CC hw/acpi/bios-linker-loader.o
CC hw/acpi/aml-build.o
CC hw/acpi/ipmi.o
CC hw/acpi/acpi-stub.o
CC hw/acpi/ipmi-stub.o
CC hw/audio/sb16.o
CC hw/audio/es1370.o
CC hw/audio/ac97.o
CC hw/audio/fmopl.o
CC hw/audio/adlib.o
CC hw/audio/gus.o
CC hw/audio/gusemu_hal.o
CC hw/audio/gusemu_mixer.o
CC hw/audio/cs4231a.o
CC hw/audio/intel-hda.o
CC hw/audio/hda-codec.o
CC hw/audio/pcspk.o
CC hw/audio/wm8750.o
CC hw/audio/pl041.o
CC hw/audio/lm4549.o
CC hw/audio/marvell_88w8618.o
CC hw/audio/cs4231.o
CC hw/audio/milkymist-ac97.o
CC hw/audio/soundhw.o
CC hw/block/block.o
CC hw/block/hd-geometry.o
CC hw/block/cdrom.o
CC hw/block/fdc.o
CC hw/block/m25p80.o
CC hw/block/nand.o
CC hw/block/pflash_cfi01.o
CC hw/block/pflash_cfi02.o
CC hw/block/ecc.o
CC hw/block/onenand.o
CC hw/block/nvme.o
CC hw/bt/core.o
CC hw/bt/l2cap.o
CC hw/bt/hci.o
CC hw/bt/sdp.o
CC hw/bt/hci-csr.o
CC hw/bt/hid.o
CC hw/char/ipoctal232.o
CC hw/char/escc.o
CC hw/char/parallel.o
CC hw/char/pl011.o
CC hw/char/serial.o
CC hw/char/serial-isa.o
CC hw/char/serial-pci.o
CC hw/char/virtio-console.o
CC hw/char/xilinx_uartlite.o
CC hw/char/cadence_uart.o
CC hw/char/cmsdk-apb-uart.o
CC hw/char/etraxfs_ser.o
CC hw/char/debugcon.o
CC hw/char/grlib_apbuart.o
CC hw/char/imx_serial.o
CC hw/char/lm32_juart.o
CC hw/char/lm32_uart.o
CC hw/char/milkymist-uart.o
CC hw/char/sclpconsole.o
CC hw/char/sclpconsole-lm.o
CC hw/core/qdev.o
CC hw/core/qdev-properties.o
CC hw/core/bus.o
CC hw/core/reset.o
CC hw/core/fw-path-provider.o
CC hw/core/irq.o
CC hw/core/hotplug.o
CC hw/core/nmi.o
CC hw/core/empty_slot.o
CC hw/core/stream.o
CC hw/core/ptimer.o
CC hw/core/sysbus.o
CC hw/core/machine.o
CC hw/core/loader.o
CC hw/core/loader-fit.o
CC hw/core/qdev-properties-system.o
CC hw/core/register.o
CC hw/core/or-irq.o
CC hw/core/platform-bus.o
CC hw/cpu/core.o
CC hw/display/ads7846.o
CC hw/display/cirrus_vga.o
CC hw/display/g364fb.o
CC hw/display/jazz_led.o
CC hw/display/pl110.o
CC hw/display/ssd0303.o
CC hw/display/ssd0323.o
CC hw/display/vga-pci.o
CC hw/display/vga-isa.o
CC hw/display/vga-isa-mm.o
CC hw/display/vmware_vga.o
CC hw/display/blizzard.o
CC hw/display/exynos4210_fimd.o
CC hw/display/framebuffer.o
CC hw/display/milkymist-vgafb.o
CC hw/display/tc6393xb.o
CC hw/display/milkymist-tmu2.o
CC hw/dma/puv3_dma.o
CC hw/dma/rc4030.o
CC hw/dma/pl080.o
CC hw/dma/pl330.o
CC hw/dma/i82374.o
CC hw/dma/i8257.o
CC hw/dma/xilinx_axidma.o
CC hw/dma/xlnx-zynq-devcfg.o
CC hw/dma/etraxfs_dma.o
CC hw/dma/sparc32_dma.o
CC hw/dma/sun4m_iommu.o
CC hw/gpio/max7310.o
CC hw/gpio/pl061.o
CC hw/gpio/puv3_gpio.o
CC hw/gpio/zaurus.o
CC hw/gpio/mpc8xxx.o
CC hw/gpio/gpio_key.o
CC hw/i2c/core.o
CC hw/i2c/smbus.o
CC hw/i2c/smbus_eeprom.o
CC hw/i2c/i2c-ddc.o
CC hw/i2c/versatile_i2c.o
CC hw/i2c/smbus_ich9.o
CC hw/i2c/pm_smbus.o
CC hw/i2c/bitbang_i2c.o
CC hw/i2c/exynos4210_i2c.o
CC hw/i2c/imx_i2c.o
CC hw/i2c/aspeed_i2c.o
CC hw/ide/core.o
CC hw/ide/atapi.o
CC hw/ide/qdev.o
CC hw/ide/pci.o
CC hw/ide/isa.o
CC hw/ide/piix.o
CC hw/ide/cmd646.o
CC hw/ide/macio.o
CC hw/ide/mmio.o
CC hw/ide/via.o
CC hw/ide/microdrive.o
CC hw/ide/ahci.o
CC hw/ide/ich.o
CC hw/input/adb.o
CC hw/input/hid.o
CC hw/input/lm832x.o
CC hw/input/pckbd.o
CC hw/input/pl050.o
CC hw/input/ps2.o
CC hw/input/stellaris_input.o
CC hw/input/tsc2005.o
CC hw/input/vmmouse.o
CC hw/input/virtio-input.o
CC hw/input/virtio-input-hid.o
CC hw/input/virtio-input-host.o
CC hw/intc/heathrow_pic.o
CC hw/intc/i8259_common.o
CC hw/intc/i8259.o
CC hw/intc/pl190.o
CC hw/intc/puv3_intc.o
CC hw/intc/xilinx_intc.o
CC hw/intc/etraxfs_pic.o
CC hw/intc/imx_avic.o
CC hw/intc/lm32_pic.o
CC hw/intc/realview_gic.o
CC hw/intc/slavio_intctl.o
CC hw/intc/ioapic_common.o
CC hw/intc/arm_gic_common.o
CC hw/intc/arm_gic.o
CC hw/intc/arm_gicv2m.o
CC hw/intc/arm_gicv3_common.o
CC hw/intc/arm_gicv3.o
CC hw/intc/arm_gicv3_dist.o
CC hw/intc/arm_gicv3_redist.o
CC hw/intc/arm_gicv3_its_common.o
CC hw/intc/openpic.o
CC hw/intc/intc.o
CC hw/ipack/ipack.o
CC hw/ipack/tpci200.o
CC hw/ipmi/ipmi.o
CC hw/ipmi/ipmi_bmc_sim.o
CC hw/ipmi/ipmi_bmc_extern.o
CC hw/ipmi/isa_ipmi_kcs.o
CC hw/ipmi/isa_ipmi_bt.o
CC hw/isa/isa-bus.o
CC hw/isa/apm.o
CC hw/isa/i82378.o
CC hw/isa/pc87312.o
CC hw/isa/piix4.o
CC hw/isa/vt82c686.o
CC hw/mem/pc-dimm.o
CC hw/mem/nvdimm.o
CC hw/misc/applesmc.o
CC hw/misc/max111x.o
CC hw/misc/tmp105.o
CC hw/misc/tmp421.o
CC hw/misc/sga.o
CC hw/misc/debugexit.o
CC hw/misc/pc-testdev.o
CC hw/misc/pci-testdev.o
CC hw/misc/edu.o
CC hw/misc/unimp.o
CC hw/misc/arm_l2x0.o
CC hw/misc/arm_integrator_debug.o
CC hw/misc/a9scu.o
CC hw/misc/arm11scu.o
CC hw/misc/puv3_pm.o
CC hw/misc/macio/macio.o
CC hw/misc/macio/cuda.o
CC hw/misc/macio/mac_dbdma.o
CC hw/net/dp8393x.o
CC hw/net/ne2000.o
CC hw/net/eepro100.o
CC hw/net/pcnet-pci.o
CC hw/net/pcnet.o
CC hw/net/e1000.o
CC hw/net/e1000x_common.o
CC hw/net/net_tx_pkt.o
CC hw/net/e1000e.o
CC hw/net/net_rx_pkt.o
CC hw/net/e1000e_core.o
CC hw/net/rtl8139.o
CC hw/net/vmxnet3.o
CC hw/net/smc91c111.o
CC hw/net/lan9118.o
CC hw/net/ne2000-isa.o
CC hw/net/opencores_eth.o
CC hw/net/xgmac.o
CC hw/net/mipsnet.o
CC hw/net/xilinx_axienet.o
CC hw/net/allwinner_emac.o
CC hw/net/imx_fec.o
CC hw/net/cadence_gem.o
CC hw/net/stellaris_enet.o
CC hw/net/lance.o
CC hw/net/ftgmac100.o
CC hw/net/rocker/rocker.o
CC hw/net/rocker/rocker_fp.o
CC hw/net/rocker/rocker_desc.o
CC hw/net/rocker/rocker_world.o
CC hw/net/rocker/rocker_of_dpa.o
CC hw/nvram/ds1225y.o
CC hw/nvram/eeprom93xx.o
CC hw/nvram/fw_cfg.o
CC hw/nvram/chrp_nvram.o
CC hw/nvram/mac_nvram.o
CC hw/pci-bridge/pci_bridge_dev.o
CC hw/pci-bridge/pcie_root_port.o
CC hw/pci-bridge/gen_pcie_root_port.o
CC hw/pci-bridge/pci_expander_bridge.o
CC hw/pci-bridge/xio3130_upstream.o
CC hw/pci-bridge/xio3130_downstream.o
CC hw/pci-bridge/ioh3420.o
CC hw/pci-bridge/i82801b11.o
CC hw/pci-bridge/dec.o
CC hw/pci-host/pam.o
CC hw/pci-host/prep.o
CC hw/pci-host/grackle.o
CC hw/pci-host/uninorth.o
CC hw/pci-host/ppce500.o
CC hw/pci-host/versatile.o
CC hw/pci-host/apb.o
CC hw/pci-host/bonito.o
CC hw/pci-host/piix.o
CC hw/pci-host/q35.o
CC hw/pci-host/gpex.o
CC hw/pci-host/xilinx-pcie.o
CC hw/pci/pci.o
CC hw/pci/pci_bridge.o
CC hw/pci/msix.o
CC hw/pci/msi.o
CC hw/pci/shpc.o
CC hw/pci/slotid_cap.o
CC hw/pci/pci_host.o
CC hw/pci/pcie.o
CC hw/pci/pcie_host.o
CC hw/pci/pcie_aer.o
CC hw/pci/pcie_port.o
CC hw/pci/pci-stub.o
CC hw/pcmcia/pcmcia.o
CC hw/scsi/scsi-disk.o
CC hw/scsi/scsi-generic.o
CC hw/scsi/scsi-bus.o
CC hw/scsi/lsi53c895a.o
CC hw/scsi/mptsas.o
CC hw/scsi/mptconfig.o
CC hw/scsi/mptendian.o
CC hw/scsi/megasas.o
CC hw/scsi/vmw_pvscsi.o
CC hw/scsi/esp.o
CC hw/scsi/esp-pci.o
CC hw/sd/pl181.o
CC hw/sd/ssi-sd.o
CC hw/sd/sd.o
CC hw/sd/core.o
CC hw/smbios/smbios.o
CC hw/sd/sdhci.o
CC hw/smbios/smbios_type_38.o
CC hw/smbios/smbios-stub.o
CC hw/smbios/smbios_type_38-stub.o
CC hw/ssi/pl022.o
CC hw/ssi/ssi.o
CC hw/ssi/xilinx_spi.o
CC hw/ssi/xilinx_spips.o
CC hw/ssi/aspeed_smc.o
CC hw/timer/arm_timer.o
CC hw/ssi/stm32f2xx_spi.o
CC hw/timer/arm_mptimer.o
CC hw/timer/armv7m_systick.o
CC hw/timer/a9gtimer.o
CC hw/timer/cadence_ttc.o
CC hw/timer/ds1338.o
CC hw/timer/hpet.o
CC hw/timer/i8254_common.o
CC hw/timer/i8254.o
CC hw/timer/m48t59.o
CC hw/timer/m48t59-isa.o
CC hw/timer/pl031.o
CC hw/timer/puv3_ost.o
CC hw/timer/twl92230.o
CC hw/timer/xilinx_timer.o
CC hw/timer/slavio_timer.o
CC hw/timer/etraxfs_timer.o
CC hw/timer/grlib_gptimer.o
CC hw/timer/imx_epit.o
CC hw/timer/imx_gpt.o
CC hw/timer/lm32_timer.o
CC hw/timer/milkymist-sysctl.o
CC hw/timer/stm32f2xx_timer.o
CC hw/timer/aspeed_timer.o
CC hw/timer/sun4v-rtc.o
CC hw/timer/cmsdk-apb-timer.o
CC hw/tpm/tpm_tis.o
CC hw/usb/core.o
CC hw/usb/combined-packet.o
CC hw/usb/bus.o
CC hw/usb/libhw.o
CC hw/usb/desc.o
CC hw/usb/desc-msos.o
CC hw/usb/hcd-uhci.o
CC hw/usb/hcd-ohci.o
CC hw/usb/hcd-ehci.o
CC hw/usb/hcd-ehci-pci.o
CC hw/usb/hcd-ehci-sysbus.o
CC hw/usb/hcd-xhci.o
CC hw/usb/hcd-xhci-nec.o
CC hw/usb/hcd-musb.o
CC hw/usb/dev-hub.o
CC hw/usb/dev-hid.o
CC hw/usb/dev-wacom.o
CC hw/usb/dev-storage.o
CC hw/usb/dev-uas.o
CC hw/usb/dev-audio.o
CC hw/usb/dev-serial.o
CC hw/usb/dev-network.o
CC hw/usb/dev-bluetooth.o
CC hw/usb/dev-smartcard-reader.o
CC hw/usb/ccid-card-passthru.o
CC hw/usb/ccid-card-emulated.o
CC hw/usb/dev-mtp.o
CC hw/usb/redirect.o
CC hw/usb/quirks.o
CC hw/usb/host-libusb.o
CC hw/usb/host-legacy.o
CC hw/virtio/virtio-rng.o
CC hw/virtio/virtio-pci.o
CC hw/virtio/virtio-bus.o
CC hw/virtio/virtio-mmio.o
CC hw/virtio/vhost-stub.o
CC hw/watchdog/wdt_i6300esb.o
CC hw/watchdog/watchdog.o
CC hw/watchdog/wdt_ib700.o
CC hw/watchdog/wdt_diag288.o
CC hw/watchdog/wdt_aspeed.o
CC migration/migration.o
CC migration/socket.o
CC migration/fd.o
CC migration/exec.o
CC migration/tls.o
CC migration/channel.o
CC migration/savevm.o
CC migration/colo-comm.o
CC migration/colo.o
CC migration/colo-failover.o
CC migration/vmstate.o
CC migration/vmstate-types.o
CC migration/page_cache.o
CC migration/qemu-file.o
CC migration/global_state.o
CC migration/qemu-file-channel.o
CC migration/xbzrle.o
CC migration/qjson.o
CC migration/postcopy-ram.o
CC migration/block.o
CC net/net.o
CC net/queue.o
CC net/checksum.o
CC net/util.o
CC net/hub.o
CC net/socket.o
CC net/dump.o
CC net/eth.o
CC net/l2tpv3.o
CC net/vhost-user.o
CC net/slirp.o
CC net/filter.o
CC net/filter-buffer.o
CC net/filter-mirror.o
CC net/colo-compare.o
CC net/colo.o
CC net/filter-rewriter.o
CC net/filter-replay.o
CC net/tap.o
CC net/tap-linux.o
CC qom/cpu.o
CC replay/replay.o
CC replay/replay-internal.o
CC replay/replay-events.o
CC replay/replay-time.o
CC replay/replay-input.o
CC replay/replay-char.o
CC replay/replay-snapshot.o
CC replay/replay-net.o
CC replay/replay-audio.o
CC slirp/cksum.o
CC slirp/if.o
CC slirp/ip_icmp.o
CC slirp/ip6_icmp.o
CC slirp/ip6_input.o
CC slirp/ip6_output.o
CC slirp/ip_input.o
CC slirp/ip_output.o
CC slirp/dnssearch.o
CC slirp/dhcpv6.o
CC slirp/slirp.o
CC slirp/mbuf.o
CC slirp/misc.o
CC slirp/sbuf.o
CC slirp/socket.o
CC slirp/tcp_input.o
CC slirp/tcp_output.o
CC slirp/tcp_subr.o
CC slirp/tcp_timer.o
CC slirp/udp.o
CC slirp/udp6.o
CC slirp/bootp.o
CC slirp/tftp.o
CC slirp/arp_table.o
CC slirp/ndp_table.o
CC slirp/ncsi.o
CC ui/console.o
CC ui/keymaps.o
CC ui/cursor.o
CC ui/qemu-pixman.o
CC ui/input.o
CC ui/input-keymap.o
CC ui/input-legacy.o
CC ui/input-linux.o
CC ui/sdl2.o
CC ui/sdl2-input.o
CC ui/sdl2-2d.o
CC ui/sdl2-gl.o
CC ui/x_keymap.o
CC ui/curses.o
CC ui/vnc.o
CC ui/vnc-enc-zlib.o
CC ui/vnc-enc-hextile.o
CC ui/vnc-enc-tight.o
CC ui/vnc-palette.o
CC ui/vnc-enc-zrle.o
CC ui/vnc-auth-vencrypt.o
CC ui/vnc-auth-sasl.o
CC ui/vnc-ws.o
CC ui/vnc-jobs.o
CC ui/gtk.o
CC ui/shader.o
VERT ui/shader/texture-blit-vert.h
FRAG ui/shader/texture-blit-frag.h
CC ui/egl-helpers.o
CC ui/egl-headless.o
CC ui/egl-context.o
CC ui/gtk-gl-area.o
CC chardev/char.o
CC chardev/char-fd.o
CC chardev/char-fe.o
CC chardev/char-file.o
CC chardev/char-io.o
CC chardev/char-mux.o
CC chardev/char-null.o
CC chardev/char-parallel.o
CC chardev/char-pipe.o
CC chardev/char-pty.o
CC chardev/char-ringbuf.o
CC chardev/char-serial.o
CC chardev/char-socket.o
CC chardev/char-stdio.o
CC chardev/char-udp.o
CCAS s390-ccw/start.o
CC s390-ccw/main.o
CC s390-ccw/bootmap.o
LINK tests/qemu-iotests/socket_scm_helper
GEN qemu-doc.html
CC s390-ccw/sclp.o
CC s390-ccw/virtio.o
CC s390-ccw/virtio-scsi.o
CC s390-ccw/virtio-blkdev.o
s390-netboot.img not built since roms/SLOF/ is not available.
GEN qemu-doc.txt
GEN qemu.1
BUILD s390-ccw/s390-ccw.elf
STRIP s390-ccw/s390-ccw.img
GEN qemu-img.1
GEN docs/interop/qemu-qmp-ref.html
GEN docs/interop/qemu-qmp-ref.txt
GEN docs/interop/qemu-qmp-ref.7
GEN docs/interop/qemu-ga-ref.html
GEN docs/interop/qemu-ga-ref.txt
GEN docs/interop/qemu-ga-ref.7
CC qga/guest-agent-command-state.o
CC qga/commands.o
CC qga/main.o
CC qga/commands-posix.o
CC qga/channel-posix.o
CC qga/qapi-generated/qga-qapi-types.o
CC qga/qapi-generated/qga-qapi-visit.o
CC qga/qapi-generated/qga-qmp-marshal.o
AR libqemuutil.a
AR libqemustub.a
CC qemu-img.o
LINK qemu-io
LINK fsdev/virtfs-proxy-helper
LINK qemu-bridge-helper
CC ui/console-gl.o
LINK qemu-ga
LINK ivshmem-client
LINK ivshmem-server
LINK qemu-nbd
GEN alpha-softmmu/hmp-commands.h
GEN alpha-softmmu/hmp-commands-info.h
GEN alpha-softmmu/config-target.h
CC alpha-softmmu/exec.o
GEN aarch64-softmmu/hmp-commands.h
GEN aarch64-softmmu/hmp-commands-info.h
GEN cris-softmmu/hmp-commands.h
GEN cris-softmmu/hmp-commands-info.h
GEN cris-softmmu/config-target.h
GEN aarch64-softmmu/config-target.h
CC cris-softmmu/exec.o
CC aarch64-softmmu/exec.o
GEN arm-softmmu/hmp-commands.h
GEN arm-softmmu/hmp-commands-info.h
GEN arm-softmmu/config-target.h
CC arm-softmmu/exec.o
CC aarch64-softmmu/tcg/tcg.o
CC alpha-softmmu/tcg/tcg.o
CC cris-softmmu/tcg/tcg.o
CC arm-softmmu/tcg/tcg.o
CC alpha-softmmu/tcg/tcg-op.o
CC cris-softmmu/tcg/tcg-op.o
CC aarch64-softmmu/tcg/tcg-op.o
CC arm-softmmu/tcg/tcg-op.o
CC alpha-softmmu/tcg/optimize.o
CC aarch64-softmmu/tcg/optimize.o
CC cris-softmmu/tcg/optimize.o
CC arm-softmmu/tcg/optimize.o
CC alpha-softmmu/tcg/tcg-common.o
CC aarch64-softmmu/tcg/tcg-common.o
CC aarch64-softmmu/tcg/tcg-runtime.o
CC alpha-softmmu/tcg/tcg-runtime.o
CC cris-softmmu/tcg/tcg-common.o
CC cris-softmmu/tcg/tcg-runtime.o
CC alpha-softmmu/fpu/softfloat.o
CC aarch64-softmmu/fpu/softfloat.o
CC cris-softmmu/fpu/softfloat.o
CC arm-softmmu/tcg/tcg-common.o
CC arm-softmmu/tcg/tcg-runtime.o
CC arm-softmmu/fpu/softfloat.o
CC aarch64-softmmu/disas.o
CC alpha-softmmu/disas.o
CC cris-softmmu/disas.o
CC cris-softmmu/hax-stub.o
GEN aarch64-softmmu/gdbstub-xml.c
CC alpha-softmmu/hax-stub.o
CC cris-softmmu/arch_init.o
CC alpha-softmmu/arch_init.o
CC aarch64-softmmu/hax-stub.o
CC cris-softmmu/cpus.o
CC alpha-softmmu/cpus.o
CC aarch64-softmmu/arch_init.o
CC aarch64-softmmu/cpus.o
CC cris-softmmu/monitor.o
CC alpha-softmmu/monitor.o
CC arm-softmmu/disas.o
CC aarch64-softmmu/monitor.o
GEN arm-softmmu/gdbstub-xml.c
CC cris-softmmu/gdbstub.o
CC alpha-softmmu/gdbstub.o
CC cris-softmmu/balloon.o
CC arm-softmmu/hax-stub.o
CC arm-softmmu/arch_init.o
CC cris-softmmu/ioport.o
CC alpha-softmmu/balloon.o
CC aarch64-softmmu/gdbstub.o
CC arm-softmmu/cpus.o
CC cris-softmmu/numa.o
CC alpha-softmmu/ioport.o
CC cris-softmmu/qtest.o
CC aarch64-softmmu/balloon.o
CC alpha-softmmu/numa.o
CC aarch64-softmmu/ioport.o
CC arm-softmmu/monitor.o
CC cris-softmmu/memory.o
CC alpha-softmmu/qtest.o
CC aarch64-softmmu/numa.o
CC alpha-softmmu/memory.o
CC aarch64-softmmu/qtest.o
CC cris-softmmu/memory_mapping.o
CC arm-softmmu/gdbstub.o
CC cris-softmmu/dump.o
CC aarch64-softmmu/memory.o
CC arm-softmmu/balloon.o
CC alpha-softmmu/memory_mapping.o
CC alpha-softmmu/dump.o
CC cris-softmmu/migration/ram.o
CC arm-softmmu/ioport.o
CC aarch64-softmmu/memory_mapping.o
CC alpha-softmmu/migration/ram.o
CC arm-softmmu/numa.o
CC cris-softmmu/accel/accel.o
CC aarch64-softmmu/dump.o
CC arm-softmmu/qtest.o
CC cris-softmmu/accel/stubs/kvm-stub.o
CC aarch64-softmmu/migration/ram.o
CC alpha-softmmu/accel/accel.o
CC cris-softmmu/accel/tcg/tcg-all.o
CC arm-softmmu/memory.o
CC alpha-softmmu/accel/stubs/kvm-stub.o
CC cris-softmmu/accel/tcg/cputlb.o
CC alpha-softmmu/accel/tcg/tcg-all.o
CC aarch64-softmmu/accel/accel.o
CC alpha-softmmu/accel/tcg/cputlb.o
CC aarch64-softmmu/accel/stubs/kvm-stub.o
CC arm-softmmu/memory_mapping.o
CC aarch64-softmmu/accel/tcg/tcg-all.o
CC arm-softmmu/dump.o
CC cris-softmmu/accel/tcg/cpu-exec.o
CC aarch64-softmmu/accel/tcg/cputlb.o
CC arm-softmmu/migration/ram.o
CC alpha-softmmu/accel/tcg/cpu-exec.o
CC cris-softmmu/accel/tcg/cpu-exec-common.o
CC alpha-softmmu/accel/tcg/cpu-exec-common.o
CC cris-softmmu/accel/tcg/translate-all.o
CC arm-softmmu/accel/accel.o
CC alpha-softmmu/accel/tcg/translate-all.o
CC aarch64-softmmu/accel/tcg/cpu-exec.o
CC cris-softmmu/hw/core/generic-loader.o
CC arm-softmmu/accel/stubs/kvm-stub.o
CC alpha-softmmu/hw/9pfs/virtio-9p-device.o
CC cris-softmmu/hw/core/null-machine.o
CC arm-softmmu/accel/tcg/tcg-all.o
CC arm-softmmu/accel/tcg/cputlb.o
CC cris-softmmu/hw/misc/mmio_interface.o
CC alpha-softmmu/hw/block/virtio-blk.o
CC cris-softmmu/hw/net/etraxfs_eth.o
CC aarch64-softmmu/accel/tcg/cpu-exec-common.o
CC cris-softmmu/hw/net/vhost_net.o
CC alpha-softmmu/hw/block/dataplane/virtio-blk.o
CC aarch64-softmmu/accel/tcg/translate-all.o
CC cris-softmmu/hw/net/rocker/qmp-norocker.o
CC cris-softmmu/hw/vfio/common.o
CC alpha-softmmu/hw/char/virtio-serial-bus.o
CC aarch64-softmmu/hw/9pfs/virtio-9p-device.o
CC arm-softmmu/accel/tcg/cpu-exec.o
CC aarch64-softmmu/hw/adc/stm32f2xx_adc.o
CC cris-softmmu/hw/vfio/platform.o
CC alpha-softmmu/hw/core/generic-loader.o
CC alpha-softmmu/hw/core/null-machine.o
CC aarch64-softmmu/hw/block/virtio-blk.o
CC cris-softmmu/hw/vfio/spapr.o
CC arm-softmmu/accel/tcg/cpu-exec-common.o
CC alpha-softmmu/hw/display/vga.o
CC aarch64-softmmu/hw/block/dataplane/virtio-blk.o
CC cris-softmmu/hw/cris/boot.o
CC arm-softmmu/accel/tcg/translate-all.o
CC cris-softmmu/hw/cris/axis_dev88.o
CC aarch64-softmmu/hw/char/exynos4210_uart.o
CC cris-softmmu/target/cris/translate.o
CC aarch64-softmmu/hw/char/omap_uart.o
CC alpha-softmmu/hw/display/virtio-gpu.o
CC arm-softmmu/hw/9pfs/virtio-9p-device.o
CC aarch64-softmmu/hw/char/digic-uart.o
CC arm-softmmu/hw/adc/stm32f2xx_adc.o
CC aarch64-softmmu/hw/char/stm32f2xx_usart.o
CC arm-softmmu/hw/block/virtio-blk.o
CC alpha-softmmu/hw/display/virtio-gpu-3d.o
CC aarch64-softmmu/hw/char/bcm2835_aux.o
CC cris-softmmu/target/cris/op_helper.o
CC aarch64-softmmu/hw/char/virtio-serial-bus.o
CC arm-softmmu/hw/block/dataplane/virtio-blk.o
CC cris-softmmu/target/cris/helper.o
CC alpha-softmmu/hw/display/virtio-gpu-pci.o
CC aarch64-softmmu/hw/core/generic-loader.o
CC arm-softmmu/hw/char/exynos4210_uart.o
CC cris-softmmu/target/cris/cpu.o
CC cris-softmmu/target/cris/gdbstub.o
CC aarch64-softmmu/hw/core/null-machine.o
CC alpha-softmmu/hw/misc/ivshmem.o
CC arm-softmmu/hw/char/omap_uart.o
CC aarch64-softmmu/hw/cpu/arm11mpcore.o
CC cris-softmmu/target/cris/mmu.o
CC arm-softmmu/hw/char/digic-uart.o
CC alpha-softmmu/hw/misc/mmio_interface.o
CC cris-softmmu/target/cris/machine.o
CC aarch64-softmmu/hw/cpu/realview_mpcore.o
CC arm-softmmu/hw/char/stm32f2xx_usart.o
CC alpha-softmmu/hw/net/virtio-net.o
GEN trace/generated-helpers.c
CC cris-softmmu/trace/control-target.o
CC arm-softmmu/hw/char/bcm2835_aux.o
CC aarch64-softmmu/hw/cpu/a9mpcore.o
CC cris-softmmu/trace/generated-helpers.o
CC arm-softmmu/hw/char/virtio-serial-bus.o
CC aarch64-softmmu/hw/cpu/a15mpcore.o
CC alpha-softmmu/hw/net/vhost_net.o
LINK cris-softmmu/qemu-system-cris
CC alpha-softmmu/hw/scsi/virtio-scsi.o
CC arm-softmmu/hw/core/generic-loader.o
CC aarch64-softmmu/hw/display/omap_dss.o
CC arm-softmmu/hw/core/null-machine.o
CC alpha-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC arm-softmmu/hw/cpu/arm11mpcore.o
CC arm-softmmu/hw/cpu/realview_mpcore.o
CC aarch64-softmmu/hw/display/omap_lcdc.o
CC arm-softmmu/hw/cpu/a9mpcore.o
CC alpha-softmmu/hw/scsi/vhost-scsi-common.o
CC alpha-softmmu/hw/scsi/vhost-scsi.o
CC arm-softmmu/hw/cpu/a15mpcore.o
CC alpha-softmmu/hw/scsi/vhost-user-scsi.o
CC aarch64-softmmu/hw/display/pxa2xx_lcd.o
CC arm-softmmu/hw/display/omap_dss.o
CC alpha-softmmu/hw/timer/mc146818rtc.o
GEN i386-softmmu/hmp-commands.h
GEN i386-softmmu/hmp-commands-info.h
CC arm-softmmu/hw/display/omap_lcdc.o
GEN i386-softmmu/config-target.h
CC i386-softmmu/exec.o
CC alpha-softmmu/hw/vfio/common.o
CC aarch64-softmmu/hw/display/bcm2835_fb.o
CC arm-softmmu/hw/display/pxa2xx_lcd.o
CC alpha-softmmu/hw/vfio/pci.o
CC aarch64-softmmu/hw/display/vga.o
CC arm-softmmu/hw/display/bcm2835_fb.o
CC i386-softmmu/tcg/tcg.o
CC alpha-softmmu/hw/vfio/pci-quirks.o
CC arm-softmmu/hw/display/vga.o
CC aarch64-softmmu/hw/display/virtio-gpu.o
CC alpha-softmmu/hw/vfio/platform.o
CC aarch64-softmmu/hw/display/virtio-gpu-3d.o
CC arm-softmmu/hw/display/virtio-gpu.o
CC alpha-softmmu/hw/vfio/spapr.o
CC i386-softmmu/tcg/tcg-op.o
CC alpha-softmmu/hw/virtio/virtio.o
CC aarch64-softmmu/hw/display/virtio-gpu-pci.o
CC arm-softmmu/hw/display/virtio-gpu-3d.o
CC aarch64-softmmu/hw/display/dpcd.o
CC alpha-softmmu/hw/virtio/virtio-balloon.o
CC aarch64-softmmu/hw/display/xlnx_dp.o
CC alpha-softmmu/hw/virtio/vhost.o
CC arm-softmmu/hw/display/virtio-gpu-pci.o
CC aarch64-softmmu/hw/dma/xlnx_dpdma.o
CC alpha-softmmu/hw/virtio/vhost-backend.o
CC arm-softmmu/hw/dma/omap_dma.o
CC alpha-softmmu/hw/virtio/vhost-user.o
CC i386-softmmu/tcg/optimize.o
CC aarch64-softmmu/hw/dma/omap_dma.o
CC arm-softmmu/hw/dma/soc_dma.o
CC alpha-softmmu/hw/virtio/vhost-vsock.o
CC alpha-softmmu/hw/virtio/virtio-crypto.o
CC arm-softmmu/hw/dma/pxa2xx_dma.o
CC aarch64-softmmu/hw/dma/soc_dma.o
CC i386-softmmu/tcg/tcg-common.o
CC alpha-softmmu/hw/virtio/virtio-crypto-pci.o
CC aarch64-softmmu/hw/dma/pxa2xx_dma.o
CC i386-softmmu/tcg/tcg-runtime.o
CC arm-softmmu/hw/dma/bcm2835_dma.o
CC aarch64-softmmu/hw/dma/bcm2835_dma.o
CC i386-softmmu/fpu/softfloat.o
CC arm-softmmu/hw/gpio/omap_gpio.o
CC alpha-softmmu/hw/alpha/dp264.o
CC aarch64-softmmu/hw/gpio/omap_gpio.o
CC alpha-softmmu/hw/alpha/pci.o
CC arm-softmmu/hw/gpio/imx_gpio.o
CC alpha-softmmu/hw/alpha/typhoon.o
CC aarch64-softmmu/hw/gpio/imx_gpio.o
CC alpha-softmmu/target/alpha/machine.o
CC arm-softmmu/hw/gpio/bcm2835_gpio.o
CC alpha-softmmu/target/alpha/translate.o
CC aarch64-softmmu/hw/gpio/bcm2835_gpio.o
CC aarch64-softmmu/hw/i2c/omap_i2c.o
CC arm-softmmu/hw/i2c/omap_i2c.o
CC arm-softmmu/hw/input/pxa2xx_keypad.o
CC aarch64-softmmu/hw/input/pxa2xx_keypad.o
CC i386-softmmu/disas.o
CC arm-softmmu/hw/input/tsc210x.o
CC alpha-softmmu/target/alpha/helper.o
CC aarch64-softmmu/hw/input/tsc210x.o
CC alpha-softmmu/target/alpha/cpu.o
GEN i386-softmmu/gdbstub-xml.c
CC i386-softmmu/hax-stub.o
CC aarch64-softmmu/hw/intc/armv7m_nvic.o
CC arm-softmmu/hw/intc/armv7m_nvic.o
CC i386-softmmu/arch_init.o
CC alpha-softmmu/target/alpha/int_helper.o
CC i386-softmmu/cpus.o
CC aarch64-softmmu/hw/intc/exynos4210_gic.o
CC arm-softmmu/hw/intc/exynos4210_gic.o
CC alpha-softmmu/target/alpha/fpu_helper.o
CC aarch64-softmmu/hw/intc/exynos4210_combiner.o
CC arm-softmmu/hw/intc/exynos4210_combiner.o
CC i386-softmmu/monitor.o
CC arm-softmmu/hw/intc/omap_intc.o
CC aarch64-softmmu/hw/intc/omap_intc.o
CC alpha-softmmu/target/alpha/vax_helper.o
CC alpha-softmmu/target/alpha/sys_helper.o
CC arm-softmmu/hw/intc/bcm2835_ic.o
CC aarch64-softmmu/hw/intc/bcm2835_ic.o
CC alpha-softmmu/target/alpha/mem_helper.o
CC aarch64-softmmu/hw/intc/bcm2836_control.o
CC arm-softmmu/hw/intc/bcm2836_control.o
CC arm-softmmu/hw/intc/allwinner-a10-pic.o
CC alpha-softmmu/target/alpha/gdbstub.o
CC aarch64-softmmu/hw/intc/allwinner-a10-pic.o
GEN trace/generated-helpers.c
CC alpha-softmmu/trace/control-target.o
CC i386-softmmu/gdbstub.o
CC aarch64-softmmu/hw/intc/aspeed_vic.o
CC arm-softmmu/hw/intc/aspeed_vic.o
CC alpha-softmmu/trace/generated-helpers.o
CC aarch64-softmmu/hw/intc/arm_gicv3_cpuif.o
CC arm-softmmu/hw/intc/arm_gicv3_cpuif.o
CC i386-softmmu/balloon.o
LINK alpha-softmmu/qemu-system-alpha
CC i386-softmmu/ioport.o
CC aarch64-softmmu/hw/misc/ivshmem.o
CC i386-softmmu/numa.o
CC arm-softmmu/hw/misc/ivshmem.o
CC aarch64-softmmu/hw/misc/arm_sysctl.o
CC i386-softmmu/qtest.o
CC arm-softmmu/hw/misc/arm_sysctl.o
CC aarch64-softmmu/hw/misc/cbus.o
CC arm-softmmu/hw/misc/cbus.o
CC i386-softmmu/memory.o
CC arm-softmmu/hw/misc/exynos4210_pmu.o
CC aarch64-softmmu/hw/misc/exynos4210_pmu.o
CC i386-softmmu/memory_mapping.o
CC aarch64-softmmu/hw/misc/exynos4210_clk.o
CC arm-softmmu/hw/misc/exynos4210_clk.o
CC i386-softmmu/dump.o
CC aarch64-softmmu/hw/misc/exynos4210_rng.o
CC arm-softmmu/hw/misc/exynos4210_rng.o
CC aarch64-softmmu/hw/misc/imx_ccm.o
CC arm-softmmu/hw/misc/imx_ccm.o
CC aarch64-softmmu/hw/misc/imx31_ccm.o
CC i386-softmmu/migration/ram.o
CC i386-softmmu/accel/accel.o
CC arm-softmmu/hw/misc/imx31_ccm.o
CC aarch64-softmmu/hw/misc/imx25_ccm.o
CC arm-softmmu/hw/misc/imx25_ccm.o
CC i386-softmmu/accel/stubs/kvm-stub.o
CC aarch64-softmmu/hw/misc/imx6_ccm.o
CC arm-softmmu/hw/misc/imx6_ccm.o
CC arm-softmmu/hw/misc/imx6_src.o
CC i386-softmmu/accel/tcg/tcg-all.o
CC aarch64-softmmu/hw/misc/imx6_src.o
CC arm-softmmu/hw/misc/mst_fpga.o
CC i386-softmmu/accel/tcg/cputlb.o
CC arm-softmmu/hw/misc/omap_clk.o
CC aarch64-softmmu/hw/misc/mst_fpga.o
CC arm-softmmu/hw/misc/omap_gpmc.o
CC i386-softmmu/accel/tcg/cpu-exec.o
CC arm-softmmu/hw/misc/omap_l4.o
CC aarch64-softmmu/hw/misc/omap_clk.o
CC arm-softmmu/hw/misc/omap_sdrc.o
CC i386-softmmu/accel/tcg/cpu-exec-common.o
CC aarch64-softmmu/hw/misc/omap_gpmc.o
CC arm-softmmu/hw/misc/omap_tap.o
CC arm-softmmu/hw/misc/bcm2835_mbox.o
CC i386-softmmu/accel/tcg/translate-all.o
CC aarch64-softmmu/hw/misc/omap_l4.o
GEN lm32-softmmu/hmp-commands.h
CC arm-softmmu/hw/misc/bcm2835_property.o
CC aarch64-softmmu/hw/misc/omap_sdrc.o
GEN lm32-softmmu/hmp-commands-info.h
GEN lm32-softmmu/config-target.h
CC lm32-softmmu/exec.o
CC i386-softmmu/hw/9pfs/virtio-9p-device.o
CC arm-softmmu/hw/misc/bcm2835_rng.o
CC aarch64-softmmu/hw/misc/omap_tap.o
CC aarch64-softmmu/hw/misc/bcm2835_mbox.o
CC arm-softmmu/hw/misc/zynq_slcr.o
CC i386-softmmu/hw/block/virtio-blk.o
CC aarch64-softmmu/hw/misc/bcm2835_property.o
CC arm-softmmu/hw/misc/zynq-xadc.o
CC arm-softmmu/hw/misc/stm32f2xx_syscfg.o
CC aarch64-softmmu/hw/misc/bcm2835_rng.o
CC i386-softmmu/hw/block/dataplane/virtio-blk.o
CC arm-softmmu/hw/misc/mps2-scc.o
CC aarch64-softmmu/hw/misc/zynq_slcr.o
CC lm32-softmmu/tcg/tcg.o
CC i386-softmmu/hw/char/virtio-serial-bus.o
CC arm-softmmu/hw/misc/aspeed_scu.o
CC aarch64-softmmu/hw/misc/zynq-xadc.o
CC arm-softmmu/hw/misc/aspeed_sdmc.o
CC aarch64-softmmu/hw/misc/stm32f2xx_syscfg.o
CC i386-softmmu/hw/core/generic-loader.o
CC arm-softmmu/hw/misc/mmio_interface.o
CC aarch64-softmmu/hw/misc/mps2-scc.o
CC arm-softmmu/hw/net/virtio-net.o
CC i386-softmmu/hw/core/null-machine.o
CC aarch64-softmmu/hw/misc/auxbus.o
CC i386-softmmu/hw/display/vga.o
CC lm32-softmmu/tcg/tcg-op.o
CC aarch64-softmmu/hw/misc/aspeed_scu.o
CC arm-softmmu/hw/net/vhost_net.o
CC aarch64-softmmu/hw/misc/aspeed_sdmc.o
CC arm-softmmu/hw/pcmcia/pxa2xx.o
CC aarch64-softmmu/hw/misc/mmio_interface.o
CC arm-softmmu/hw/scsi/virtio-scsi.o
CC i386-softmmu/hw/display/virtio-gpu.o
CC aarch64-softmmu/hw/net/virtio-net.o
CC aarch64-softmmu/hw/net/vhost_net.o
CC arm-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC i386-softmmu/hw/display/virtio-gpu-3d.o
CC aarch64-softmmu/hw/pcmcia/pxa2xx.o
CC aarch64-softmmu/hw/scsi/virtio-scsi.o
CC arm-softmmu/hw/scsi/vhost-scsi-common.o
CC lm32-softmmu/tcg/optimize.o
CC i386-softmmu/hw/display/virtio-gpu-pci.o
CC arm-softmmu/hw/scsi/vhost-scsi.o
CC aarch64-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC arm-softmmu/hw/scsi/vhost-user-scsi.o
CC i386-softmmu/hw/display/virtio-vga.o
CC aarch64-softmmu/hw/scsi/vhost-scsi-common.o
CC aarch64-softmmu/hw/scsi/vhost-scsi.o
CC lm32-softmmu/tcg/tcg-common.o
CC arm-softmmu/hw/sd/omap_mmc.o
CC i386-softmmu/hw/intc/apic.o
CC arm-softmmu/hw/sd/pxa2xx_mmci.o
CC aarch64-softmmu/hw/scsi/vhost-user-scsi.o
CC lm32-softmmu/tcg/tcg-runtime.o
CC arm-softmmu/hw/sd/bcm2835_sdhost.o
CC aarch64-softmmu/hw/sd/omap_mmc.o
CC lm32-softmmu/fpu/softfloat.o
CC i386-softmmu/hw/intc/apic_common.o
CC arm-softmmu/hw/ssi/omap_spi.o
CC aarch64-softmmu/hw/sd/pxa2xx_mmci.o
CC i386-softmmu/hw/intc/ioapic.o
CC arm-softmmu/hw/ssi/imx_spi.o
CC aarch64-softmmu/hw/sd/bcm2835_sdhost.o
CC i386-softmmu/hw/isa/lpc_ich9.o
CC aarch64-softmmu/hw/ssi/omap_spi.o
CC arm-softmmu/hw/timer/exynos4210_mct.o
CC i386-softmmu/hw/misc/vmport.o
CC aarch64-softmmu/hw/ssi/imx_spi.o
CC i386-softmmu/hw/misc/ivshmem.o
CC arm-softmmu/hw/timer/exynos4210_pwm.o
CC aarch64-softmmu/hw/timer/exynos4210_mct.o
CC i386-softmmu/hw/misc/pvpanic.o
CC arm-softmmu/hw/timer/exynos4210_rtc.o
CC aarch64-softmmu/hw/timer/exynos4210_pwm.o
CC i386-softmmu/hw/misc/mmio_interface.o
CC aarch64-softmmu/hw/timer/exynos4210_rtc.o
CC arm-softmmu/hw/timer/omap_gptimer.o
CC lm32-softmmu/disas.o
CC i386-softmmu/hw/net/virtio-net.o
CC aarch64-softmmu/hw/timer/omap_gptimer.o
CC arm-softmmu/hw/timer/omap_synctimer.o
CC lm32-softmmu/hax-stub.o
CC aarch64-softmmu/hw/timer/omap_synctimer.o
CC arm-softmmu/hw/timer/pxa2xx_timer.o
CC lm32-softmmu/arch_init.o
CC arm-softmmu/hw/timer/digic-timer.o
CC i386-softmmu/hw/net/vhost_net.o
CC aarch64-softmmu/hw/timer/pxa2xx_timer.o
CC lm32-softmmu/cpus.o
CC arm-softmmu/hw/timer/allwinner-a10-pit.o
CC i386-softmmu/hw/scsi/virtio-scsi.o
CC aarch64-softmmu/hw/timer/digic-timer.o
CC arm-softmmu/hw/usb/tusb6010.o
CC aarch64-softmmu/hw/timer/allwinner-a10-pit.o
CC lm32-softmmu/monitor.o
CC arm-softmmu/hw/vfio/common.o
CC i386-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC aarch64-softmmu/hw/usb/tusb6010.o
CC i386-softmmu/hw/scsi/vhost-scsi-common.o
CC aarch64-softmmu/hw/vfio/common.o
CC i386-softmmu/hw/scsi/vhost-scsi.o
CC arm-softmmu/hw/vfio/pci.o
CC i386-softmmu/hw/scsi/vhost-user-scsi.o
CC aarch64-softmmu/hw/vfio/pci.o
CC lm32-softmmu/gdbstub.o
CC i386-softmmu/hw/timer/mc146818rtc.o
CC lm32-softmmu/balloon.o
CC arm-softmmu/hw/vfio/pci-quirks.o
CC i386-softmmu/hw/vfio/common.o
CC aarch64-softmmu/hw/vfio/pci-quirks.o
CC lm32-softmmu/ioport.o
CC arm-softmmu/hw/vfio/platform.o
CC lm32-softmmu/numa.o
CC i386-softmmu/hw/vfio/pci.o
CC aarch64-softmmu/hw/vfio/platform.o
CC lm32-softmmu/qtest.o
CC arm-softmmu/hw/vfio/calxeda-xgmac.o
CC arm-softmmu/hw/vfio/amd-xgbe.o
CC aarch64-softmmu/hw/vfio/calxeda-xgmac.o
CC lm32-softmmu/memory.o
CC arm-softmmu/hw/vfio/spapr.o
CC aarch64-softmmu/hw/vfio/amd-xgbe.o
CC arm-softmmu/hw/virtio/virtio.o
CC i386-softmmu/hw/vfio/pci-quirks.o
CC aarch64-softmmu/hw/vfio/spapr.o
CC aarch64-softmmu/hw/virtio/virtio.o
CC lm32-softmmu/memory_mapping.o
CC arm-softmmu/hw/virtio/virtio-balloon.o
CC lm32-softmmu/dump.o
CC i386-softmmu/hw/vfio/platform.o
CC arm-softmmu/hw/virtio/vhost.o
CC lm32-softmmu/migration/ram.o
CC i386-softmmu/hw/vfio/spapr.o
CC aarch64-softmmu/hw/virtio/virtio-balloon.o
CC arm-softmmu/hw/virtio/vhost-backend.o
CC i386-softmmu/hw/virtio/virtio.o
CC arm-softmmu/hw/virtio/vhost-user.o
CC aarch64-softmmu/hw/virtio/vhost.o
CC lm32-softmmu/accel/accel.o
CC arm-softmmu/hw/virtio/vhost-vsock.o
CC lm32-softmmu/accel/stubs/kvm-stub.o
CC i386-softmmu/hw/virtio/virtio-balloon.o
CC arm-softmmu/hw/virtio/virtio-crypto.o
CC aarch64-softmmu/hw/virtio/vhost-backend.o
CC lm32-softmmu/accel/tcg/tcg-all.o
CC lm32-softmmu/accel/tcg/cputlb.o
CC i386-softmmu/hw/virtio/vhost.o
CC aarch64-softmmu/hw/virtio/vhost-user.o
CC arm-softmmu/hw/virtio/virtio-crypto-pci.o
CC aarch64-softmmu/hw/virtio/vhost-vsock.o
CC arm-softmmu/hw/arm/boot.o
CC i386-softmmu/hw/virtio/vhost-backend.o
CC aarch64-softmmu/hw/virtio/virtio-crypto.o
CC i386-softmmu/hw/virtio/vhost-user.o
CC lm32-softmmu/accel/tcg/cpu-exec.o
CC arm-softmmu/hw/arm/collie.o
CC aarch64-softmmu/hw/virtio/virtio-crypto-pci.o
CC arm-softmmu/hw/arm/exynos4_boards.o
CC i386-softmmu/hw/virtio/vhost-vsock.o
CC lm32-softmmu/accel/tcg/cpu-exec-common.o
CC lm32-softmmu/accel/tcg/translate-all.o
CC i386-softmmu/hw/virtio/virtio-crypto.o
CC arm-softmmu/hw/arm/gumstix.o
CC aarch64-softmmu/hw/arm/boot.o
CC arm-softmmu/hw/arm/highbank.o
CC i386-softmmu/hw/virtio/virtio-crypto-pci.o
CC lm32-softmmu/hw/core/generic-loader.o
CC arm-softmmu/hw/arm/digic_boards.o
CC lm32-softmmu/hw/core/null-machine.o
CC aarch64-softmmu/hw/arm/collie.o
CC i386-softmmu/hw/i386/multiboot.o
CC arm-softmmu/hw/arm/integratorcp.o
CC lm32-softmmu/hw/input/milkymist-softusb.o
CC aarch64-softmmu/hw/arm/exynos4_boards.o
CC i386-softmmu/hw/i386/pc.o
CC arm-softmmu/hw/arm/mainstone.o
CC aarch64-softmmu/hw/arm/gumstix.o
CC lm32-softmmu/hw/misc/milkymist-hpdmc.o
CC arm-softmmu/hw/arm/musicpal.o
CC aarch64-softmmu/hw/arm/highbank.o
CC lm32-softmmu/hw/misc/milkymist-pfpu.o
CC i386-softmmu/hw/i386/pc_piix.o
CC lm32-softmmu/hw/misc/mmio_interface.o
CC aarch64-softmmu/hw/arm/digic_boards.o
CC arm-softmmu/hw/arm/nseries.o
CC lm32-softmmu/hw/net/milkymist-minimac2.o
CC aarch64-softmmu/hw/arm/integratorcp.o
CC i386-softmmu/hw/i386/pc_q35.o
CC lm32-softmmu/hw/net/vhost_net.o
CC arm-softmmu/hw/arm/omap_sx1.o
CC aarch64-softmmu/hw/arm/mainstone.o
CC lm32-softmmu/hw/net/rocker/qmp-norocker.o
CC i386-softmmu/hw/i386/pc_sysfw.o
CC aarch64-softmmu/hw/arm/musicpal.o
CC lm32-softmmu/hw/sd/milkymist-memcard.o
CC arm-softmmu/hw/arm/palm.o
CC i386-softmmu/hw/i386/x86-iommu.o
CC lm32-softmmu/hw/vfio/common.o
CC i386-softmmu/hw/i386/intel_iommu.o
CC aarch64-softmmu/hw/arm/nseries.o
CC arm-softmmu/hw/arm/realview.o
CC lm32-softmmu/hw/vfio/platform.o
CC arm-softmmu/hw/arm/spitz.o
CC aarch64-softmmu/hw/arm/omap_sx1.o
CC lm32-softmmu/hw/vfio/spapr.o
CC i386-softmmu/hw/i386/amd_iommu.o
CC aarch64-softmmu/hw/arm/palm.o
CC lm32-softmmu/hw/lm32/lm32_boards.o
CC arm-softmmu/hw/arm/stellaris.o
CC lm32-softmmu/hw/lm32/milkymist.o
CC aarch64-softmmu/hw/arm/realview.o
CC i386-softmmu/hw/i386/kvmvapic.o
CC arm-softmmu/hw/arm/tosa.o
CC aarch64-softmmu/hw/arm/spitz.o
CC lm32-softmmu/target/lm32/translate.o
CC arm-softmmu/hw/arm/versatilepb.o
CC i386-softmmu/hw/i386/acpi-build.o
CC arm-softmmu/hw/arm/vexpress.o
CC aarch64-softmmu/hw/arm/stellaris.o
CC lm32-softmmu/target/lm32/op_helper.o
CC arm-softmmu/hw/arm/virt.o
CC aarch64-softmmu/hw/arm/tosa.o
CC lm32-softmmu/target/lm32/helper.o
CC i386-softmmu/hw/i386/pci-assign-load-rom.o
CC aarch64-softmmu/hw/arm/versatilepb.o
CC lm32-softmmu/target/lm32/cpu.o
CC i386-softmmu/target/i386/helper.o
CC arm-softmmu/hw/arm/xilinx_zynq.o
CC aarch64-softmmu/hw/arm/vexpress.o
CC lm32-softmmu/target/lm32/gdbstub.o
CC arm-softmmu/hw/arm/z2.o
CC i386-softmmu/target/i386/cpu.o
CC aarch64-softmmu/hw/arm/virt.o
CC lm32-softmmu/target/lm32/lm32-semi.o
CC lm32-softmmu/target/lm32/machine.o
CC arm-softmmu/hw/arm/virt-acpi-build.o
GEN trace/generated-helpers.c
CC lm32-softmmu/trace/control-target.o
CC i386-softmmu/target/i386/gdbstub.o
CC aarch64-softmmu/hw/arm/xilinx_zynq.o
CC lm32-softmmu/trace/generated-helpers.o
CC arm-softmmu/hw/arm/netduino2.o
CC i386-softmmu/target/i386/xsave_helper.o
CC aarch64-softmmu/hw/arm/z2.o
CC arm-softmmu/hw/arm/sysbus-fdt.o
LINK lm32-softmmu/qemu-system-lm32
CC i386-softmmu/target/i386/translate.o
CC arm-softmmu/hw/arm/armv7m.o
CC aarch64-softmmu/hw/arm/virt-acpi-build.o
CC arm-softmmu/hw/arm/exynos4210.o
CC i386-softmmu/target/i386/bpt_helper.o
CC aarch64-softmmu/hw/arm/netduino2.o
CC arm-softmmu/hw/arm/pxa2xx.o
CC arm-softmmu/hw/arm/pxa2xx_gpio.o
CC aarch64-softmmu/hw/arm/sysbus-fdt.o
CC aarch64-softmmu/hw/arm/armv7m.o
CC arm-softmmu/hw/arm/pxa2xx_pic.o
CC i386-softmmu/target/i386/cc_helper.o
CC aarch64-softmmu/hw/arm/exynos4210.o
CC arm-softmmu/hw/arm/digic.o
CC aarch64-softmmu/hw/arm/pxa2xx.o
CC i386-softmmu/target/i386/excp_helper.o
CC arm-softmmu/hw/arm/omap1.o
CC aarch64-softmmu/hw/arm/pxa2xx_gpio.o
GEN m68k-softmmu/hmp-commands.h
GEN m68k-softmmu/hmp-commands-info.h
GEN m68k-softmmu/config-target.h
CC aarch64-softmmu/hw/arm/pxa2xx_pic.o
CC m68k-softmmu/exec.o
CC arm-softmmu/hw/arm/omap2.o
CC aarch64-softmmu/hw/arm/digic.o
CC arm-softmmu/hw/arm/strongarm.o
CC aarch64-softmmu/hw/arm/omap1.o
CC arm-softmmu/hw/arm/allwinner-a10.o
CC i386-softmmu/target/i386/fpu_helper.o
CC arm-softmmu/hw/arm/cubieboard.o
CC aarch64-softmmu/hw/arm/omap2.o
CC m68k-softmmu/tcg/tcg.o
CC arm-softmmu/hw/arm/bcm2835_peripherals.o
CC arm-softmmu/hw/arm/bcm2836.o
CC aarch64-softmmu/hw/arm/strongarm.o
CC arm-softmmu/hw/arm/raspi.o
CC aarch64-softmmu/hw/arm/allwinner-a10.o
CC m68k-softmmu/tcg/tcg-op.o
CC arm-softmmu/hw/arm/stm32f205_soc.o
CC i386-softmmu/target/i386/int_helper.o
CC aarch64-softmmu/hw/arm/cubieboard.o
CC aarch64-softmmu/hw/arm/bcm2835_peripherals.o
CC i386-softmmu/target/i386/mem_helper.o
CC arm-softmmu/hw/arm/fsl-imx25.o
CC i386-softmmu/target/i386/misc_helper.o
CC arm-softmmu/hw/arm/imx25_pdk.o
CC aarch64-softmmu/hw/arm/bcm2836.o
CC i386-softmmu/target/i386/mpx_helper.o
CC arm-softmmu/hw/arm/fsl-imx31.o
CC aarch64-softmmu/hw/arm/raspi.o
CC arm-softmmu/hw/arm/kzm.o
CC i386-softmmu/target/i386/seg_helper.o
CC arm-softmmu/hw/arm/fsl-imx6.o
CC aarch64-softmmu/hw/arm/stm32f205_soc.o
CC m68k-softmmu/tcg/optimize.o
CC aarch64-softmmu/hw/arm/xlnx-zynqmp.o
CC arm-softmmu/hw/arm/sabrelite.o
CC m68k-softmmu/tcg/tcg-common.o
CC arm-softmmu/hw/arm/aspeed_soc.o
CC aarch64-softmmu/hw/arm/xlnx-ep108.o
CC m68k-softmmu/tcg/tcg-runtime.o
CC arm-softmmu/hw/arm/aspeed.o
CC aarch64-softmmu/hw/arm/fsl-imx25.o
CC arm-softmmu/hw/arm/mps2.o
CC m68k-softmmu/fpu/softfloat.o
CC aarch64-softmmu/hw/arm/imx25_pdk.o
CC i386-softmmu/target/i386/smm_helper.o
CC arm-softmmu/target/arm/arm-semi.o
CC i386-softmmu/target/i386/svm_helper.o
CC aarch64-softmmu/hw/arm/fsl-imx31.o
CC arm-softmmu/target/arm/machine.o
CC aarch64-softmmu/hw/arm/kzm.o
CC arm-softmmu/target/arm/psci.o
CC i386-softmmu/target/i386/machine.o
CC arm-softmmu/target/arm/arch_dump.o
CC aarch64-softmmu/hw/arm/fsl-imx6.o
CC i386-softmmu/target/i386/arch_memory_mapping.o
CC arm-softmmu/target/arm/monitor.o
CC i386-softmmu/target/i386/arch_dump.o
CC aarch64-softmmu/hw/arm/sabrelite.o
CC arm-softmmu/target/arm/kvm-stub.o
CC aarch64-softmmu/hw/arm/aspeed_soc.o
CC i386-softmmu/target/i386/monitor.o
CC arm-softmmu/target/arm/translate.o
CC aarch64-softmmu/hw/arm/aspeed.o
CC m68k-softmmu/disas.o
CC i386-softmmu/target/i386/kvm-stub.o
CC aarch64-softmmu/hw/arm/mps2.o
GEN m68k-softmmu/gdbstub-xml.c
GEN trace/generated-helpers.c
CC m68k-softmmu/hax-stub.o
CC i386-softmmu/trace/control-target.o
CC aarch64-softmmu/target/arm/arm-semi.o
CC m68k-softmmu/arch_init.o
CC i386-softmmu/gdbstub-xml.o
CC m68k-softmmu/cpus.o
CC i386-softmmu/trace/generated-helpers.o
CC aarch64-softmmu/target/arm/machine.o
LINK i386-softmmu/qemu-system-i386
CC aarch64-softmmu/target/arm/psci.o
CC m68k-softmmu/monitor.o
CC aarch64-softmmu/target/arm/arch_dump.o
CC aarch64-softmmu/target/arm/monitor.o
CC m68k-softmmu/gdbstub.o
CC m68k-softmmu/balloon.o
CC aarch64-softmmu/target/arm/kvm-stub.o
CC m68k-softmmu/ioport.o
CC aarch64-softmmu/target/arm/translate.o
CC m68k-softmmu/numa.o
CC aarch64-softmmu/target/arm/op_helper.o
CC m68k-softmmu/qtest.o
CC m68k-softmmu/memory.o
CC arm-softmmu/target/arm/op_helper.o
CC m68k-softmmu/memory_mapping.o
CC aarch64-softmmu/target/arm/helper.o
CC m68k-softmmu/dump.o
CC arm-softmmu/target/arm/helper.o
CC m68k-softmmu/migration/ram.o
CC m68k-softmmu/accel/accel.o
CC m68k-softmmu/accel/stubs/kvm-stub.o
CC arm-softmmu/target/arm/cpu.o
CC arm-softmmu/target/arm/neon_helper.o
CC m68k-softmmu/accel/tcg/tcg-all.o
CC aarch64-softmmu/target/arm/cpu.o
CC m68k-softmmu/accel/tcg/cputlb.o
CC m68k-softmmu/accel/tcg/cpu-exec.o
CC aarch64-softmmu/target/arm/neon_helper.o
CC arm-softmmu/target/arm/iwmmxt_helper.o
CC aarch64-softmmu/target/arm/iwmmxt_helper.o
CC m68k-softmmu/accel/tcg/cpu-exec-common.o
CC m68k-softmmu/accel/tcg/translate-all.o
CC arm-softmmu/target/arm/gdbstub.o
CC arm-softmmu/target/arm/crypto_helper.o
CC aarch64-softmmu/target/arm/gdbstub.o
CC m68k-softmmu/hw/char/mcf_uart.o
CC aarch64-softmmu/target/arm/cpu64.o
CC arm-softmmu/target/arm/arm-powerctl.o
GEN microblazeel-softmmu/hmp-commands.h
CC m68k-softmmu/hw/core/generic-loader.o
GEN microblazeel-softmmu/hmp-commands-info.h
GEN microblazeel-softmmu/config-target.h
CC aarch64-softmmu/target/arm/translate-a64.o
CC microblazeel-softmmu/exec.o
GEN trace/generated-helpers.c
CC arm-softmmu/trace/control-target.o
CC m68k-softmmu/hw/core/null-machine.o
CC m68k-softmmu/hw/misc/mmio_interface.o
CC arm-softmmu/gdbstub-xml.o
CC m68k-softmmu/hw/net/mcf_fec.o
CC arm-softmmu/trace/generated-helpers.o
CC m68k-softmmu/hw/net/vhost_net.o
LINK arm-softmmu/qemu-system-arm
CC m68k-softmmu/hw/net/rocker/qmp-norocker.o
CC microblazeel-softmmu/tcg/tcg.o
CC m68k-softmmu/hw/vfio/common.o
CC m68k-softmmu/hw/vfio/platform.o
CC aarch64-softmmu/target/arm/helper-a64.o
CC microblazeel-softmmu/tcg/tcg-op.o
CC m68k-softmmu/hw/vfio/spapr.o
CC aarch64-softmmu/target/arm/gdbstub64.o
CC m68k-softmmu/hw/m68k/an5206.o
CC aarch64-softmmu/target/arm/crypto_helper.o
GEN microblaze-softmmu/hmp-commands.h
GEN microblaze-softmmu/hmp-commands-info.h
CC m68k-softmmu/hw/m68k/mcf5208.o
GEN microblaze-softmmu/config-target.h
CC microblaze-softmmu/exec.o
CC aarch64-softmmu/target/arm/arm-powerctl.o
CC m68k-softmmu/hw/m68k/mcf5206.o
GEN trace/generated-helpers.c
CC aarch64-softmmu/trace/control-target.o
CC m68k-softmmu/hw/m68k/mcf_intc.o
CC aarch64-softmmu/gdbstub-xml.o
CC m68k-softmmu/target/m68k/m68k-semi.o
CC microblazeel-softmmu/tcg/optimize.o
CC aarch64-softmmu/trace/generated-helpers.o
CC m68k-softmmu/target/m68k/translate.o
CC microblaze-softmmu/tcg/tcg.o
LINK aarch64-softmmu/qemu-system-aarch64
CC microblazeel-softmmu/tcg/tcg-common.o
CC microblazeel-softmmu/tcg/tcg-runtime.o
CC microblazeel-softmmu/fpu/softfloat.o
CC microblaze-softmmu/tcg/tcg-op.o
CC m68k-softmmu/target/m68k/op_helper.o
CC m68k-softmmu/target/m68k/helper.o
GEN mips64el-softmmu/hmp-commands.h
GEN mips64el-softmmu/hmp-commands-info.h
GEN mips64el-softmmu/config-target.h
CC mips64el-softmmu/exec.o
CC m68k-softmmu/target/m68k/cpu.o
CC microblaze-softmmu/tcg/optimize.o
CC m68k-softmmu/target/m68k/fpu_helper.o
CC microblazeel-softmmu/disas.o
CC microblazeel-softmmu/hax-stub.o
CC microblaze-softmmu/tcg/tcg-common.o
CC m68k-softmmu/target/m68k/gdbstub.o
CC microblaze-softmmu/tcg/tcg-runtime.o
CC microblazeel-softmmu/arch_init.o
GEN trace/generated-helpers.c
CC m68k-softmmu/trace/control-target.o
CC mips64el-softmmu/tcg/tcg.o
CC microblaze-softmmu/fpu/softfloat.o
CC microblazeel-softmmu/cpus.o
CC m68k-softmmu/gdbstub-xml.o
CC m68k-softmmu/trace/generated-helpers.o
CC microblazeel-softmmu/monitor.o
LINK m68k-softmmu/qemu-system-m68k
CC microblazeel-softmmu/gdbstub.o
CC mips64el-softmmu/tcg/tcg-op.o
CC microblaze-softmmu/disas.o
CC microblaze-softmmu/hax-stub.o
CC microblazeel-softmmu/balloon.o
GEN mips64-softmmu/hmp-commands.h
GEN mips64-softmmu/hmp-commands-info.h
GEN mips64-softmmu/config-target.h
CC microblaze-softmmu/arch_init.o
CC mips64-softmmu/exec.o
CC microblazeel-softmmu/ioport.o
CC microblaze-softmmu/cpus.o
CC microblazeel-softmmu/numa.o
CC microblazeel-softmmu/qtest.o
CC microblaze-softmmu/monitor.o
CC mips64el-softmmu/tcg/optimize.o
CC microblazeel-softmmu/memory.o
CC mips64-softmmu/tcg/tcg.o
CC microblaze-softmmu/gdbstub.o
CC microblazeel-softmmu/memory_mapping.o
CC mips64el-softmmu/tcg/tcg-common.o
CC microblazeel-softmmu/dump.o
CC microblaze-softmmu/balloon.o
CC mips64el-softmmu/tcg/tcg-runtime.o
CC microblaze-softmmu/ioport.o
CC mips64-softmmu/tcg/tcg-op.o
CC microblazeel-softmmu/migration/ram.o
CC microblaze-softmmu/numa.o
CC mips64el-softmmu/fpu/softfloat.o
CC microblaze-softmmu/qtest.o
CC microblazeel-softmmu/accel/accel.o
CC microblazeel-softmmu/accel/stubs/kvm-stub.o
CC microblaze-softmmu/memory.o
CC microblazeel-softmmu/accel/tcg/tcg-all.o
CC microblazeel-softmmu/accel/tcg/cputlb.o
CC microblaze-softmmu/memory_mapping.o
CC mips64-softmmu/tcg/optimize.o
CC mips64el-softmmu/disas.o
CC microblaze-softmmu/dump.o
CC mips64el-softmmu/hax-stub.o
CC microblazeel-softmmu/accel/tcg/cpu-exec.o
CC mips64el-softmmu/arch_init.o
CC microblaze-softmmu/migration/ram.o
CC mips64-softmmu/tcg/tcg-common.o
CC mips64el-softmmu/cpus.o
CC microblazeel-softmmu/accel/tcg/cpu-exec-common.o
CC mips64-softmmu/tcg/tcg-runtime.o
CC microblazeel-softmmu/accel/tcg/translate-all.o
CC mips64el-softmmu/monitor.o
CC mips64-softmmu/fpu/softfloat.o
CC microblaze-softmmu/accel/accel.o
CC microblazeel-softmmu/hw/core/generic-loader.o
CC microblaze-softmmu/accel/stubs/kvm-stub.o
CC microblazeel-softmmu/hw/core/null-machine.o
CC microblaze-softmmu/accel/tcg/tcg-all.o
CC microblazeel-softmmu/hw/misc/mmio_interface.o
CC microblaze-softmmu/accel/tcg/cputlb.o
CC mips64el-softmmu/gdbstub.o
CC microblazeel-softmmu/hw/net/xilinx_ethlite.o
CC mips64el-softmmu/balloon.o
CC microblazeel-softmmu/hw/net/vhost_net.o
CC microblazeel-softmmu/hw/net/rocker/qmp-norocker.o
CC mips64-softmmu/disas.o
CC mips64el-softmmu/ioport.o
CC microblazeel-softmmu/hw/vfio/common.o
CC microblaze-softmmu/accel/tcg/cpu-exec.o
CC mips64el-softmmu/numa.o
CC mips64-softmmu/hax-stub.o
CC microblaze-softmmu/accel/tcg/cpu-exec-common.o
CC microblazeel-softmmu/hw/vfio/platform.o
CC mips64-softmmu/arch_init.o
CC mips64el-softmmu/qtest.o
CC microblaze-softmmu/accel/tcg/translate-all.o
CC mips64-softmmu/cpus.o
CC microblazeel-softmmu/hw/vfio/spapr.o
CC microblaze-softmmu/hw/core/generic-loader.o
CC mips64el-softmmu/memory.o
CC mips64-softmmu/monitor.o
CC microblazeel-softmmu/hw/microblaze/petalogix_s3adsp1800_mmu.o
CC microblaze-softmmu/hw/core/null-machine.o
CC microblazeel-softmmu/hw/microblaze/petalogix_ml605_mmu.o
CC microblaze-softmmu/hw/misc/mmio_interface.o
CC microblaze-softmmu/hw/net/xilinx_ethlite.o
CC mips64el-softmmu/memory_mapping.o
CC microblazeel-softmmu/hw/microblaze/boot.o
CC microblaze-softmmu/hw/net/vhost_net.o
CC microblazeel-softmmu/target/microblaze/translate.o
CC mips64el-softmmu/dump.o
CC mips64-softmmu/gdbstub.o
CC microblaze-softmmu/hw/net/rocker/qmp-norocker.o
CC microblaze-softmmu/hw/vfio/common.o
CC mips64-softmmu/balloon.o
CC mips64el-softmmu/migration/ram.o
CC microblazeel-softmmu/target/microblaze/op_helper.o
CC mips64-softmmu/ioport.o
CC microblaze-softmmu/hw/vfio/platform.o
CC microblazeel-softmmu/target/microblaze/helper.o
CC mips64-softmmu/numa.o
CC microblaze-softmmu/hw/vfio/spapr.o
CC microblazeel-softmmu/target/microblaze/cpu.o
CC mips64el-softmmu/accel/accel.o
CC microblaze-softmmu/hw/microblaze/petalogix_s3adsp1800_mmu.o
CC mips64-softmmu/qtest.o
CC mips64el-softmmu/accel/stubs/kvm-stub.o
CC microblazeel-softmmu/target/microblaze/gdbstub.o
CC microblaze-softmmu/hw/microblaze/petalogix_ml605_mmu.o
CC mips64el-softmmu/accel/tcg/tcg-all.o
CC microblazeel-softmmu/target/microblaze/mmu.o
CC mips64-softmmu/memory.o
CC mips64el-softmmu/accel/tcg/cputlb.o
CC microblaze-softmmu/hw/microblaze/boot.o
GEN trace/generated-helpers.c
CC microblazeel-softmmu/trace/control-target.o
CC microblaze-softmmu/target/microblaze/translate.o
CC microblazeel-softmmu/trace/generated-helpers.o
CC mips64-softmmu/memory_mapping.o
CC microblaze-softmmu/target/microblaze/op_helper.o
CC mips64el-softmmu/accel/tcg/cpu-exec.o
LINK microblazeel-softmmu/qemu-system-microblazeel
CC mips64-softmmu/dump.o
CC mips64el-softmmu/accel/tcg/cpu-exec-common.o
CC microblaze-softmmu/target/microblaze/helper.o
CC mips64el-softmmu/accel/tcg/translate-all.o
CC microblaze-softmmu/target/microblaze/cpu.o
CC microblaze-softmmu/target/microblaze/gdbstub.o
CC microblaze-softmmu/target/microblaze/mmu.o
CC mips64-softmmu/migration/ram.o
CC mips64el-softmmu/hw/9pfs/virtio-9p-device.o
CC mips64-softmmu/accel/accel.o
GEN trace/generated-helpers.c
CC microblaze-softmmu/trace/control-target.o
CC mips64el-softmmu/hw/block/virtio-blk.o
CC microblaze-softmmu/trace/generated-helpers.o
LINK microblaze-softmmu/qemu-system-microblaze
CC mips64-softmmu/accel/stubs/kvm-stub.o
GEN mipsel-softmmu/hmp-commands.h
GEN mipsel-softmmu/hmp-commands-info.h
GEN mipsel-softmmu/config-target.h
CC mips64el-softmmu/hw/block/dataplane/virtio-blk.o
CC mipsel-softmmu/exec.o
CC mips64-softmmu/accel/tcg/tcg-all.o
CC mips64-softmmu/accel/tcg/cputlb.o
CC mips64el-softmmu/hw/char/virtio-serial-bus.o
CC mipsel-softmmu/tcg/tcg.o
CC mips64el-softmmu/hw/core/generic-loader.o
CC mips64el-softmmu/hw/core/null-machine.o
CC mips64el-softmmu/hw/display/vga.o
CC mips64-softmmu/accel/tcg/cpu-exec.o
CC mips64-softmmu/accel/tcg/cpu-exec-common.o
CC mips64el-softmmu/hw/display/virtio-gpu.o
CC mips64-softmmu/accel/tcg/translate-all.o
CC mipsel-softmmu/tcg/tcg-op.o
CC mips64-softmmu/hw/9pfs/virtio-9p-device.o
CC mips64el-softmmu/hw/display/virtio-gpu-3d.o
CC mips64el-softmmu/hw/display/virtio-gpu-pci.o
CC mips64-softmmu/hw/block/virtio-blk.o
CC mips64el-softmmu/hw/intc/mips_gic.o
GEN mips-softmmu/hmp-commands.h
GEN mips-softmmu/hmp-commands-info.h
CC mips64-softmmu/hw/block/dataplane/virtio-blk.o
GEN mips-softmmu/config-target.h
CC mips-softmmu/exec.o
CC mips64el-softmmu/hw/misc/ivshmem.o
CC mips64-softmmu/hw/char/virtio-serial-bus.o
CC mips64el-softmmu/hw/misc/mips_cmgcr.o
CC mips64-softmmu/hw/core/generic-loader.o
CC mips64el-softmmu/hw/misc/mips_cpc.o
CC mips64-softmmu/hw/core/null-machine.o
CC mipsel-softmmu/tcg/optimize.o
CC mips64el-softmmu/hw/misc/mips_itu.o
CC mips64-softmmu/hw/display/vga.o
CC mips64el-softmmu/hw/misc/mmio_interface.o
CC mips-softmmu/tcg/tcg.o
CC mipsel-softmmu/tcg/tcg-common.o
CC mips64el-softmmu/hw/net/virtio-net.o
CC mips64-softmmu/hw/display/virtio-gpu.o
CC mipsel-softmmu/tcg/tcg-runtime.o
CC mips64el-softmmu/hw/net/vhost_net.o
CC mips64el-softmmu/hw/scsi/virtio-scsi.o
CC mipsel-softmmu/fpu/softfloat.o
CC mips64-softmmu/hw/display/virtio-gpu-3d.o
CC mips64el-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC mips-softmmu/tcg/tcg-op.o
CC mips64-softmmu/hw/display/virtio-gpu-pci.o
CC mips64el-softmmu/hw/scsi/vhost-scsi-common.o
CC mips64-softmmu/hw/intc/mips_gic.o
CC mips64el-softmmu/hw/scsi/vhost-scsi.o
CC mips64-softmmu/hw/misc/ivshmem.o
CC mips64el-softmmu/hw/scsi/vhost-user-scsi.o
CC mips64el-softmmu/hw/timer/mips_gictimer.o
CC mipsel-softmmu/disas.o
CC mips64-softmmu/hw/misc/mips_cmgcr.o
CC mipsel-softmmu/hax-stub.o
CC mips64el-softmmu/hw/timer/mc146818rtc.o
CC mips64-softmmu/hw/misc/mips_cpc.o
CC mipsel-softmmu/arch_init.o
CC mips64el-softmmu/hw/vfio/common.o
CC mips64-softmmu/hw/misc/mips_itu.o
CC mips-softmmu/tcg/optimize.o
CC mipsel-softmmu/cpus.o
CC mips64-softmmu/hw/misc/mmio_interface.o
CC mips64el-softmmu/hw/vfio/pci.o
CC mips64-softmmu/hw/net/virtio-net.o
CC mipsel-softmmu/monitor.o
CC mips-softmmu/tcg/tcg-common.o
CC mips-softmmu/tcg/tcg-runtime.o
CC mips64-softmmu/hw/net/vhost_net.o
CC mips64el-softmmu/hw/vfio/pci-quirks.o
CC mips64-softmmu/hw/scsi/virtio-scsi.o
CC mips-softmmu/fpu/softfloat.o
CC mips64el-softmmu/hw/vfio/platform.o
CC mips64-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC mips64-softmmu/hw/scsi/vhost-scsi-common.o
CC mipsel-softmmu/gdbstub.o
CC mips64el-softmmu/hw/vfio/spapr.o
CC mips64-softmmu/hw/scsi/vhost-scsi.o
CC mipsel-softmmu/balloon.o
CC mips64el-softmmu/hw/virtio/virtio.o
CC mipsel-softmmu/ioport.o
CC mips64-softmmu/hw/scsi/vhost-user-scsi.o
CC mipsel-softmmu/numa.o
CC mips64-softmmu/hw/timer/mips_gictimer.o
CC mips64el-softmmu/hw/virtio/virtio-balloon.o
CC mips64-softmmu/hw/timer/mc146818rtc.o
CC mipsel-softmmu/qtest.o
CC mips-softmmu/disas.o
CC mips64el-softmmu/hw/virtio/vhost.o
CC mipsel-softmmu/memory.o
CC mips-softmmu/hax-stub.o
CC mips64-softmmu/hw/vfio/common.o
CC mips-softmmu/arch_init.o
CC mips64el-softmmu/hw/virtio/vhost-backend.o
CC mips64-softmmu/hw/vfio/pci.o
CC mips-softmmu/cpus.o
CC mips64el-softmmu/hw/virtio/vhost-user.o
CC mips64el-softmmu/hw/virtio/vhost-vsock.o
CC mipsel-softmmu/memory_mapping.o
CC mipsel-softmmu/dump.o
CC mips-softmmu/monitor.o
CC mips64el-softmmu/hw/virtio/virtio-crypto.o
CC mips64-softmmu/hw/vfio/pci-quirks.o
CC mips64el-softmmu/hw/virtio/virtio-crypto-pci.o
CC mipsel-softmmu/migration/ram.o
CC mips64-softmmu/hw/vfio/platform.o
CC mips64el-softmmu/hw/mips/mips_r4k.o
CC mips64-softmmu/hw/vfio/spapr.o
CC mips64el-softmmu/hw/mips/mips_malta.o
CC mips-softmmu/gdbstub.o
CC mipsel-softmmu/accel/accel.o
CC mips64-softmmu/hw/virtio/virtio.o
CC mips64el-softmmu/hw/mips/mips_mipssim.o
CC mipsel-softmmu/accel/stubs/kvm-stub.o
CC mips-softmmu/balloon.o
CC mips64el-softmmu/hw/mips/addr.o
CC mips-softmmu/ioport.o
CC mipsel-softmmu/accel/tcg/tcg-all.o
CC mips64el-softmmu/hw/mips/cputimer.o
CC mipsel-softmmu/accel/tcg/cputlb.o
CC mips-softmmu/numa.o
CC mips64-softmmu/hw/virtio/virtio-balloon.o
CC mips64el-softmmu/hw/mips/mips_int.o
CC mips64-softmmu/hw/virtio/vhost.o
CC mips-softmmu/qtest.o
CC mips64el-softmmu/hw/mips/mips_jazz.o
CC mips-softmmu/memory.o
CC mips64-softmmu/hw/virtio/vhost-backend.o
CC mipsel-softmmu/accel/tcg/cpu-exec.o
CC mips64el-softmmu/hw/mips/mips_fulong2e.o
CC mips64-softmmu/hw/virtio/vhost-user.o
CC mips64el-softmmu/hw/mips/gt64xxx_pci.o
CC mipsel-softmmu/accel/tcg/cpu-exec-common.o
CC mips64-softmmu/hw/virtio/vhost-vsock.o
CC mips-softmmu/memory_mapping.o
CC mipsel-softmmu/accel/tcg/translate-all.o
CC mips64el-softmmu/hw/mips/cps.o
CC mips64-softmmu/hw/virtio/virtio-crypto.o
CC mips-softmmu/dump.o
CC mipsel-softmmu/hw/9pfs/virtio-9p-device.o
CC mips64el-softmmu/hw/mips/boston.o
CC mips64-softmmu/hw/virtio/virtio-crypto-pci.o
CC mipsel-softmmu/hw/block/virtio-blk.o
CC mips-softmmu/migration/ram.o
CC mips64el-softmmu/target/mips/translate.o
CC mips64-softmmu/hw/mips/mips_r4k.o
CC mipsel-softmmu/hw/block/dataplane/virtio-blk.o
CC mips-softmmu/accel/accel.o
CC mipsel-softmmu/hw/char/virtio-serial-bus.o
CC mips64-softmmu/hw/mips/mips_malta.o
CC mips-softmmu/accel/stubs/kvm-stub.o
CC mips64-softmmu/hw/mips/mips_mipssim.o
CC mipsel-softmmu/hw/core/generic-loader.o
CC mips-softmmu/accel/tcg/tcg-all.o
CC mipsel-softmmu/hw/core/null-machine.o
CC mips64-softmmu/hw/mips/addr.o
CC mips-softmmu/accel/tcg/cputlb.o
CC mips64-softmmu/hw/mips/cputimer.o
CC mipsel-softmmu/hw/display/vga.o
CC mips64-softmmu/hw/mips/mips_int.o
CC mips64-softmmu/hw/mips/mips_jazz.o
CC mipsel-softmmu/hw/display/virtio-gpu.o
CC mips-softmmu/accel/tcg/cpu-exec.o
CC mips64-softmmu/hw/mips/gt64xxx_pci.o
CC mips-softmmu/accel/tcg/cpu-exec-common.o
CC mipsel-softmmu/hw/display/virtio-gpu-3d.o
CC mips-softmmu/accel/tcg/translate-all.o
CC mips64-softmmu/hw/mips/cps.o
CC mipsel-softmmu/hw/display/virtio-gpu-pci.o
CC mips64-softmmu/target/mips/translate.o
CC mips-softmmu/hw/9pfs/virtio-9p-device.o
CC mipsel-softmmu/hw/intc/mips_gic.o
CC mips-softmmu/hw/block/virtio-blk.o
CC mipsel-softmmu/hw/misc/ivshmem.o
CC mipsel-softmmu/hw/misc/mips_cmgcr.o
CC mips-softmmu/hw/block/dataplane/virtio-blk.o
CC mipsel-softmmu/hw/misc/mips_cpc.o
CC mips-softmmu/hw/char/virtio-serial-bus.o
CC mips64el-softmmu/target/mips/dsp_helper.o
CC mipsel-softmmu/hw/misc/mips_itu.o
CC mips-softmmu/hw/core/generic-loader.o
CC mipsel-softmmu/hw/misc/mmio_interface.o
CC mips-softmmu/hw/core/null-machine.o
CC mipsel-softmmu/hw/net/virtio-net.o
CC mips-softmmu/hw/display/vga.o
CC mips64el-softmmu/target/mips/op_helper.o
CC mipsel-softmmu/hw/net/vhost_net.o
CC mipsel-softmmu/hw/scsi/virtio-scsi.o
CC mips-softmmu/hw/display/virtio-gpu.o
CC mipsel-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC mipsel-softmmu/hw/scsi/vhost-scsi-common.o
CC mips-softmmu/hw/display/virtio-gpu-3d.o
CC mips64-softmmu/target/mips/dsp_helper.o
CC mipsel-softmmu/hw/scsi/vhost-scsi.o
CC mips64el-softmmu/target/mips/lmi_helper.o
CC mipsel-softmmu/hw/scsi/vhost-user-scsi.o
CC mips-softmmu/hw/display/virtio-gpu-pci.o
CC mips64el-softmmu/target/mips/helper.o
CC mipsel-softmmu/hw/timer/mips_gictimer.o
CC mips-softmmu/hw/intc/mips_gic.o
CC mips64el-softmmu/target/mips/cpu.o
CC mipsel-softmmu/hw/timer/mc146818rtc.o
CC mips64-softmmu/target/mips/op_helper.o
CC mips64el-softmmu/target/mips/gdbstub.o
CC mips-softmmu/hw/misc/ivshmem.o
CC mips64el-softmmu/target/mips/msa_helper.o
CC mipsel-softmmu/hw/vfio/common.o
CC mips-softmmu/hw/misc/mips_cmgcr.o
CC mipsel-softmmu/hw/vfio/pci.o
CC mips-softmmu/hw/misc/mips_cpc.o
CC mips-softmmu/hw/misc/mips_itu.o
CC mips64-softmmu/target/mips/lmi_helper.o
CC mipsel-softmmu/hw/vfio/pci-quirks.o
CC mips-softmmu/hw/misc/mmio_interface.o
CC mips-softmmu/hw/net/virtio-net.o
CC mips64-softmmu/target/mips/helper.o
CC mipsel-softmmu/hw/vfio/platform.o
CC mips64-softmmu/target/mips/cpu.o
CC mips-softmmu/hw/net/vhost_net.o
CC mipsel-softmmu/hw/vfio/spapr.o
CC mips64-softmmu/target/mips/gdbstub.o
CC mipsel-softmmu/hw/virtio/virtio.o
CC mips-softmmu/hw/scsi/virtio-scsi.o
CC mips64-softmmu/target/mips/msa_helper.o
CC mips64el-softmmu/target/mips/mips-semi.o
CC mips-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC mips64el-softmmu/target/mips/machine.o
CC mips-softmmu/hw/scsi/vhost-scsi-common.o
CC mipsel-softmmu/hw/virtio/virtio-balloon.o
GEN trace/generated-helpers.c
CC mips64el-softmmu/trace/control-target.o
CC mips-softmmu/hw/scsi/vhost-scsi.o
CC mipsel-softmmu/hw/virtio/vhost.o
CC mips-softmmu/hw/scsi/vhost-user-scsi.o
CC mips64el-softmmu/trace/generated-helpers.o
CC mips-softmmu/hw/timer/mips_gictimer.o
CC mipsel-softmmu/hw/virtio/vhost-backend.o
CC mips-softmmu/hw/timer/mc146818rtc.o
LINK mips64el-softmmu/qemu-system-mips64el
CC mipsel-softmmu/hw/virtio/vhost-user.o
CC mips-softmmu/hw/vfio/common.o
CC mipsel-softmmu/hw/virtio/vhost-vsock.o
CC mips-softmmu/hw/vfio/pci.o
CC mips64-softmmu/target/mips/mips-semi.o
CC mipsel-softmmu/hw/virtio/virtio-crypto.o
CC mips64-softmmu/target/mips/machine.o
GEN trace/generated-helpers.c
CC mips64-softmmu/trace/control-target.o
CC mipsel-softmmu/hw/virtio/virtio-crypto-pci.o
GEN moxie-softmmu/hmp-commands.h
GEN moxie-softmmu/hmp-commands-info.h
GEN moxie-softmmu/config-target.h
CC moxie-softmmu/exec.o
CC mips-softmmu/hw/vfio/pci-quirks.o
CC mipsel-softmmu/hw/mips/mips_r4k.o
CC mips64-softmmu/trace/generated-helpers.o
CC mipsel-softmmu/hw/mips/mips_malta.o
LINK mips64-softmmu/qemu-system-mips64
CC mips-softmmu/hw/vfio/platform.o
CC mips-softmmu/hw/vfio/spapr.o
CC mipsel-softmmu/hw/mips/mips_mipssim.o
CC mips-softmmu/hw/virtio/virtio.o
CC moxie-softmmu/tcg/tcg.o
CC mipsel-softmmu/hw/mips/addr.o
CC mipsel-softmmu/hw/mips/cputimer.o
CC mipsel-softmmu/hw/mips/mips_int.o
CC mips-softmmu/hw/virtio/virtio-balloon.o
CC mipsel-softmmu/hw/mips/gt64xxx_pci.o
GEN nios2-softmmu/hmp-commands.h
GEN nios2-softmmu/hmp-commands-info.h
GEN nios2-softmmu/config-target.h
CC nios2-softmmu/exec.o
CC mips-softmmu/hw/virtio/vhost.o
CC mipsel-softmmu/hw/mips/cps.o
CC moxie-softmmu/tcg/tcg-op.o
CC mipsel-softmmu/target/mips/translate.o
CC mips-softmmu/hw/virtio/vhost-backend.o
CC mips-softmmu/hw/virtio/vhost-user.o
CC mips-softmmu/hw/virtio/vhost-vsock.o
CC nios2-softmmu/tcg/tcg.o
CC mips-softmmu/hw/virtio/virtio-crypto.o
CC mips-softmmu/hw/virtio/virtio-crypto-pci.o
CC moxie-softmmu/tcg/optimize.o
CC mips-softmmu/hw/mips/mips_r4k.o
CC nios2-softmmu/tcg/tcg-op.o
CC moxie-softmmu/tcg/tcg-common.o
CC mips-softmmu/hw/mips/mips_malta.o
CC moxie-softmmu/tcg/tcg-runtime.o
CC moxie-softmmu/fpu/softfloat.o
CC mips-softmmu/hw/mips/mips_mipssim.o
CC mips-softmmu/hw/mips/addr.o
CC nios2-softmmu/tcg/optimize.o
CC mips-softmmu/hw/mips/cputimer.o
CC mips-softmmu/hw/mips/mips_int.o
CC mips-softmmu/hw/mips/gt64xxx_pci.o
CC mipsel-softmmu/target/mips/dsp_helper.o
CC mips-softmmu/hw/mips/cps.o
CC nios2-softmmu/tcg/tcg-common.o
CC nios2-softmmu/tcg/tcg-runtime.o
CC moxie-softmmu/disas.o
CC mips-softmmu/target/mips/translate.o
CC moxie-softmmu/hax-stub.o
CC nios2-softmmu/fpu/softfloat.o
CC mipsel-softmmu/target/mips/op_helper.o
CC moxie-softmmu/arch_init.o
CC moxie-softmmu/cpus.o
CC moxie-softmmu/monitor.o
CC nios2-softmmu/disas.o
CC mipsel-softmmu/target/mips/lmi_helper.o
CC moxie-softmmu/gdbstub.o
CC mipsel-softmmu/target/mips/helper.o
CC nios2-softmmu/hax-stub.o
CC nios2-softmmu/arch_init.o
CC moxie-softmmu/balloon.o
CC mipsel-softmmu/target/mips/cpu.o
CC nios2-softmmu/cpus.o
CC moxie-softmmu/ioport.o
CC mipsel-softmmu/target/mips/gdbstub.o
CC moxie-softmmu/numa.o
CC mipsel-softmmu/target/mips/msa_helper.o
CC nios2-softmmu/monitor.o
CC moxie-softmmu/qtest.o
CC mips-softmmu/target/mips/dsp_helper.o
CC moxie-softmmu/memory.o
CC nios2-softmmu/gdbstub.o
CC mips-softmmu/target/mips/op_helper.o
CC nios2-softmmu/balloon.o
CC moxie-softmmu/memory_mapping.o
CC nios2-softmmu/ioport.o
CC moxie-softmmu/dump.o
CC nios2-softmmu/numa.o
CC mipsel-softmmu/target/mips/mips-semi.o
CC moxie-softmmu/migration/ram.o
CC mipsel-softmmu/target/mips/machine.o
CC nios2-softmmu/qtest.o
CC mips-softmmu/target/mips/lmi_helper.o
GEN trace/generated-helpers.c
CC mipsel-softmmu/trace/control-target.o
CC moxie-softmmu/accel/accel.o
CC nios2-softmmu/memory.o
CC mips-softmmu/target/mips/helper.o
CC moxie-softmmu/accel/stubs/kvm-stub.o
CC mipsel-softmmu/trace/generated-helpers.o
CC moxie-softmmu/accel/tcg/tcg-all.o
LINK mipsel-softmmu/qemu-system-mipsel
CC mips-softmmu/target/mips/cpu.o
CC moxie-softmmu/accel/tcg/cputlb.o
CC nios2-softmmu/memory_mapping.o
CC mips-softmmu/target/mips/gdbstub.o
CC mips-softmmu/target/mips/msa_helper.o
CC nios2-softmmu/dump.o
CC nios2-softmmu/migration/ram.o
CC moxie-softmmu/accel/tcg/cpu-exec.o
CC mips-softmmu/target/mips/mips-semi.o
CC moxie-softmmu/accel/tcg/cpu-exec-common.o
CC nios2-softmmu/accel/accel.o
CC nios2-softmmu/accel/stubs/kvm-stub.o
CC moxie-softmmu/accel/tcg/translate-all.o
CC mips-softmmu/target/mips/machine.o
CC nios2-softmmu/accel/tcg/tcg-all.o
CC moxie-softmmu/hw/core/generic-loader.o
CC nios2-softmmu/accel/tcg/cputlb.o
CC moxie-softmmu/hw/core/null-machine.o
GEN or1k-softmmu/hmp-commands.h
GEN or1k-softmmu/hmp-commands-info.h
GEN or1k-softmmu/config-target.h
CC moxie-softmmu/hw/display/vga.o
CC or1k-softmmu/exec.o
CC nios2-softmmu/accel/tcg/cpu-exec.o
GEN trace/generated-helpers.c
CC mips-softmmu/trace/control-target.o
CC moxie-softmmu/hw/misc/mmio_interface.o
CC mips-softmmu/trace/generated-helpers.o
CC moxie-softmmu/hw/net/vhost_net.o
CC nios2-softmmu/accel/tcg/cpu-exec-common.o
CC moxie-softmmu/hw/net/rocker/qmp-norocker.o
LINK mips-softmmu/qemu-system-mips
CC nios2-softmmu/accel/tcg/translate-all.o
CC moxie-softmmu/hw/timer/mc146818rtc.o
CC moxie-softmmu/hw/vfio/common.o
CC or1k-softmmu/tcg/tcg.o
CC nios2-softmmu/hw/core/generic-loader.o
CC nios2-softmmu/hw/core/null-machine.o
CC moxie-softmmu/hw/vfio/platform.o
CC nios2-softmmu/hw/intc/nios2_iic.o
CC moxie-softmmu/hw/vfio/spapr.o
CC nios2-softmmu/hw/misc/mmio_interface.o
GEN ppc64-softmmu/hmp-commands.h
CC nios2-softmmu/hw/net/vhost_net.o
GEN ppc64-softmmu/hmp-commands-info.h
GEN ppc64-softmmu/config-target.h
CC moxie-softmmu/hw/moxie/moxiesim.o
CC ppc64-softmmu/exec.o
CC nios2-softmmu/hw/net/rocker/qmp-norocker.o
CC moxie-softmmu/target/moxie/translate.o
CC or1k-softmmu/tcg/tcg-op.o
CC nios2-softmmu/hw/timer/altera_timer.o
CC moxie-softmmu/target/moxie/helper.o
CC nios2-softmmu/hw/vfio/common.o
CC moxie-softmmu/target/moxie/machine.o
CC nios2-softmmu/hw/vfio/platform.o
CC moxie-softmmu/target/moxie/cpu.o
CC ppc64-softmmu/tcg/tcg.o
CC nios2-softmmu/hw/vfio/spapr.o
CC nios2-softmmu/hw/nios2/boot.o
CC moxie-softmmu/target/moxie/mmu.o
CC or1k-softmmu/tcg/optimize.o
CC nios2-softmmu/hw/nios2/cpu_pic.o
GEN trace/generated-helpers.c
CC moxie-softmmu/trace/control-target.o
CC nios2-softmmu/hw/nios2/10m50_devboard.o
CC or1k-softmmu/tcg/tcg-common.o
CC nios2-softmmu/target/nios2/translate.o
CC moxie-softmmu/trace/generated-helpers.o
CC or1k-softmmu/tcg/tcg-runtime.o
LINK moxie-softmmu/qemu-system-moxie
CC ppc64-softmmu/tcg/tcg-op.o
CC or1k-softmmu/fpu/softfloat.o
CC nios2-softmmu/target/nios2/op_helper.o
CC nios2-softmmu/target/nios2/helper.o
CC nios2-softmmu/target/nios2/cpu.o
GEN ppcemb-softmmu/hmp-commands.h
GEN ppcemb-softmmu/hmp-commands-info.h
GEN ppcemb-softmmu/config-target.h
CC nios2-softmmu/target/nios2/mmu.o
CC ppcemb-softmmu/exec.o
CC nios2-softmmu/target/nios2/monitor.o
CC ppc64-softmmu/tcg/optimize.o
GEN trace/generated-helpers.c
CC or1k-softmmu/disas.o
CC nios2-softmmu/trace/control-target.o
CC nios2-softmmu/trace/generated-helpers.o
CC or1k-softmmu/hax-stub.o
LINK nios2-softmmu/qemu-system-nios2
CC or1k-softmmu/arch_init.o
CC ppc64-softmmu/tcg/tcg-common.o
CC ppc64-softmmu/tcg/tcg-runtime.o
CC or1k-softmmu/cpus.o
CC ppcemb-softmmu/tcg/tcg.o
CC ppc64-softmmu/fpu/softfloat.o
CC ppcemb-softmmu/tcg/tcg-op.o
CC or1k-softmmu/monitor.o
CC or1k-softmmu/gdbstub.o
CC or1k-softmmu/balloon.o
CC or1k-softmmu/ioport.o
CC ppcemb-softmmu/tcg/optimize.o
CC or1k-softmmu/numa.o
CC ppc64-softmmu/disas.o
CC or1k-softmmu/qtest.o
GEN ppc64-softmmu/gdbstub-xml.c
GEN ppc-softmmu/hmp-commands.h
GEN ppc-softmmu/hmp-commands-info.h
GEN ppc-softmmu/config-target.h
CC ppc-softmmu/exec.o
CC ppcemb-softmmu/tcg/tcg-common.o
CC or1k-softmmu/memory.o
CC ppc64-softmmu/hax-stub.o
CC ppcemb-softmmu/tcg/tcg-runtime.o
CC ppc64-softmmu/libdecnumber/decContext.o
CC ppcemb-softmmu/fpu/softfloat.o
CC ppc64-softmmu/libdecnumber/decNumber.o
CC or1k-softmmu/memory_mapping.o
CC ppc-softmmu/tcg/tcg.o
CC or1k-softmmu/dump.o
CC ppc64-softmmu/libdecnumber/dpd/decimal32.o
CC ppc64-softmmu/libdecnumber/dpd/decimal64.o
CC or1k-softmmu/migration/ram.o
CC ppc64-softmmu/libdecnumber/dpd/decimal128.o
CC ppcemb-softmmu/disas.o
CC ppc-softmmu/tcg/tcg-op.o
GEN ppcemb-softmmu/gdbstub-xml.c
CC or1k-softmmu/accel/accel.o
CC ppc64-softmmu/arch_init.o
CC ppcemb-softmmu/hax-stub.o
CC or1k-softmmu/accel/stubs/kvm-stub.o
CC ppc64-softmmu/cpus.o
CC or1k-softmmu/accel/tcg/tcg-all.o
CC ppcemb-softmmu/libdecnumber/decContext.o
CC or1k-softmmu/accel/tcg/cputlb.o
CC ppcemb-softmmu/libdecnumber/decNumber.o
CC ppc64-softmmu/monitor.o
CC ppc-softmmu/tcg/optimize.o
CC ppc64-softmmu/gdbstub.o
CC or1k-softmmu/accel/tcg/cpu-exec.o
CC ppcemb-softmmu/libdecnumber/dpd/decimal32.o
CC or1k-softmmu/accel/tcg/cpu-exec-common.o
CC ppc64-softmmu/balloon.o
CC ppcemb-softmmu/libdecnumber/dpd/decimal64.o
CC or1k-softmmu/accel/tcg/translate-all.o
CC ppc64-softmmu/ioport.o
CC ppcemb-softmmu/libdecnumber/dpd/decimal128.o
CC ppc-softmmu/tcg/tcg-common.o
CC or1k-softmmu/hw/core/generic-loader.o
CC ppcemb-softmmu/arch_init.o
CC ppc64-softmmu/numa.o
CC ppc-softmmu/tcg/tcg-runtime.o
CC ppcemb-softmmu/cpus.o
CC or1k-softmmu/hw/core/null-machine.o
CC ppc64-softmmu/qtest.o
CC or1k-softmmu/hw/misc/mmio_interface.o
CC ppc-softmmu/fpu/softfloat.o
CC or1k-softmmu/hw/net/vhost_net.o
CC ppcemb-softmmu/monitor.o
CC ppc64-softmmu/memory.o
CC or1k-softmmu/hw/net/rocker/qmp-norocker.o
CC or1k-softmmu/hw/vfio/common.o
CC ppcemb-softmmu/gdbstub.o
CC ppc64-softmmu/memory_mapping.o
CC or1k-softmmu/hw/vfio/platform.o
CC ppc64-softmmu/dump.o
CC ppcemb-softmmu/balloon.o
CC ppc-softmmu/disas.o
CC or1k-softmmu/hw/vfio/spapr.o
CC ppcemb-softmmu/ioport.o
CC or1k-softmmu/hw/openrisc/pic_cpu.o
CC ppc64-softmmu/migration/ram.o
GEN ppc-softmmu/gdbstub-xml.c
CC ppcemb-softmmu/numa.o
CC or1k-softmmu/hw/openrisc/cputimer.o
CC or1k-softmmu/hw/openrisc/openrisc_sim.o
CC ppcemb-softmmu/qtest.o
CC or1k-softmmu/target/openrisc/machine.o
CC ppc-softmmu/hax-stub.o
CC ppc64-softmmu/accel/accel.o
CC ppcemb-softmmu/memory.o
CC or1k-softmmu/target/openrisc/cpu.o
CC ppc-softmmu/libdecnumber/decContext.o
CC ppc-softmmu/libdecnumber/decNumber.o
CC ppc64-softmmu/accel/stubs/kvm-stub.o
CC or1k-softmmu/target/openrisc/exception.o
CC ppc64-softmmu/accel/tcg/tcg-all.o
CC or1k-softmmu/target/openrisc/interrupt.o
CC ppc64-softmmu/accel/tcg/cputlb.o
CC ppcemb-softmmu/memory_mapping.o
CC or1k-softmmu/target/openrisc/mmu.o
CC or1k-softmmu/target/openrisc/translate.o
CC ppcemb-softmmu/dump.o
CC ppc-softmmu/libdecnumber/dpd/decimal32.o
CC ppc-softmmu/libdecnumber/dpd/decimal64.o
CC ppc64-softmmu/accel/tcg/cpu-exec.o
CC or1k-softmmu/target/openrisc/exception_helper.o
CC ppcemb-softmmu/migration/ram.o
CC ppc-softmmu/libdecnumber/dpd/decimal128.o
CC ppc64-softmmu/accel/tcg/cpu-exec-common.o
CC or1k-softmmu/target/openrisc/fpu_helper.o
CC ppc64-softmmu/accel/tcg/translate-all.o
CC ppc-softmmu/arch_init.o
CC or1k-softmmu/target/openrisc/interrupt_helper.o
CC ppcemb-softmmu/accel/accel.o
CC or1k-softmmu/target/openrisc/mmu_helper.o
CC ppc-softmmu/cpus.o
CC ppc64-softmmu/hw/9pfs/virtio-9p-device.o
CC ppcemb-softmmu/accel/stubs/kvm-stub.o
CC or1k-softmmu/target/openrisc/sys_helper.o
CC ppcemb-softmmu/accel/tcg/tcg-all.o
CC ppc64-softmmu/hw/block/virtio-blk.o
CC ppc-softmmu/monitor.o
CC or1k-softmmu/target/openrisc/gdbstub.o
CC ppcemb-softmmu/accel/tcg/cputlb.o
GEN trace/generated-helpers.c
CC ppc64-softmmu/hw/block/dataplane/virtio-blk.o
CC or1k-softmmu/trace/control-target.o
CC ppc64-softmmu/hw/char/spapr_vty.o
CC or1k-softmmu/trace/generated-helpers.o
CC ppc64-softmmu/hw/char/virtio-serial-bus.o
LINK or1k-softmmu/qemu-system-or1k
CC ppc-softmmu/gdbstub.o
CC ppc64-softmmu/hw/core/generic-loader.o
CC ppcemb-softmmu/accel/tcg/cpu-exec.o
CC ppc64-softmmu/hw/core/null-machine.o
CC ppc-softmmu/balloon.o
CC ppcemb-softmmu/accel/tcg/cpu-exec-common.o
CC ppcemb-softmmu/accel/tcg/translate-all.o
CC ppc64-softmmu/hw/display/sm501.o
CC ppc-softmmu/ioport.o
CC ppc-softmmu/numa.o
CC ppcemb-softmmu/hw/9pfs/virtio-9p-device.o
CC ppc-softmmu/qtest.o
CC ppc64-softmmu/hw/display/vga.o
GEN s390x-softmmu/hmp-commands.h
GEN s390x-softmmu/hmp-commands-info.h
CC s390x-softmmu/gen-features
GEN s390x-softmmu/config-target.h
CC ppcemb-softmmu/hw/block/virtio-blk.o
GEN s390x-softmmu/gen-features.h
CC ppc-softmmu/memory.o
CC s390x-softmmu/exec.o
CC ppcemb-softmmu/hw/block/dataplane/virtio-blk.o
CC ppc64-softmmu/hw/display/virtio-gpu.o
CC ppcemb-softmmu/hw/char/virtio-serial-bus.o
CC ppc-softmmu/memory_mapping.o
CC ppc64-softmmu/hw/display/virtio-gpu-3d.o
CC ppc-softmmu/dump.o
CC s390x-softmmu/tcg/tcg.o
CC ppcemb-softmmu/hw/core/generic-loader.o
CC ppcemb-softmmu/hw/core/null-machine.o
CC ppc64-softmmu/hw/display/virtio-gpu-pci.o
CC ppcemb-softmmu/hw/display/sm501.o
CC ppc-softmmu/migration/ram.o
CC ppc64-softmmu/hw/display/virtio-vga.o
CC ppcemb-softmmu/hw/display/vga.o
CC s390x-softmmu/tcg/tcg-op.o
CC ppc-softmmu/accel/accel.o
CC ppc64-softmmu/hw/intc/xics.o
CC ppc-softmmu/accel/stubs/kvm-stub.o
CC ppc64-softmmu/hw/intc/xics_spapr.o
CC ppc-softmmu/accel/tcg/tcg-all.o
CC ppcemb-softmmu/hw/display/virtio-gpu.o
CC ppc64-softmmu/hw/intc/xics_pnv.o
CC ppc-softmmu/accel/tcg/cputlb.o
CC ppc64-softmmu/hw/misc/ivshmem.o
CC ppcemb-softmmu/hw/display/virtio-gpu-3d.o
CC ppc64-softmmu/hw/misc/mmio_interface.o
CC s390x-softmmu/tcg/optimize.o
CC ppcemb-softmmu/hw/display/virtio-gpu-pci.o
CC ppc64-softmmu/hw/net/spapr_llan.o
CC ppc-softmmu/accel/tcg/cpu-exec.o
CC ppcemb-softmmu/hw/misc/ivshmem.o
CC ppc64-softmmu/hw/net/xilinx_ethlite.o
CC s390x-softmmu/tcg/tcg-common.o
CC ppc-softmmu/accel/tcg/cpu-exec-common.o
CC ppc64-softmmu/hw/net/virtio-net.o
CC s390x-softmmu/tcg/tcg-runtime.o
CC ppcemb-softmmu/hw/misc/mmio_interface.o
CC ppc-softmmu/accel/tcg/translate-all.o
CC ppcemb-softmmu/hw/net/xilinx_ethlite.o
CC s390x-softmmu/fpu/softfloat.o
CC ppcemb-softmmu/hw/net/virtio-net.o
CC ppc64-softmmu/hw/net/vhost_net.o
CC ppc-softmmu/hw/9pfs/virtio-9p-device.o
CC ppc64-softmmu/hw/net/fsl_etsec/etsec.o
CC ppc-softmmu/hw/block/virtio-blk.o
CC ppcemb-softmmu/hw/net/vhost_net.o
CC ppc64-softmmu/hw/net/fsl_etsec/registers.o
CC ppcemb-softmmu/hw/scsi/virtio-scsi.o
CC ppc64-softmmu/hw/net/fsl_etsec/rings.o
CC ppc-softmmu/hw/block/dataplane/virtio-blk.o
CC ppcemb-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC ppc64-softmmu/hw/net/fsl_etsec/miim.o
CC ppc-softmmu/hw/char/virtio-serial-bus.o
CC ppcemb-softmmu/hw/scsi/vhost-scsi-common.o
CC ppc64-softmmu/hw/nvram/spapr_nvram.o
CC ppc-softmmu/hw/core/generic-loader.o
CC ppcemb-softmmu/hw/scsi/vhost-scsi.o
CC s390x-softmmu/disas.o
CC ppc64-softmmu/hw/scsi/spapr_vscsi.o
CC ppc-softmmu/hw/core/null-machine.o
CC ppcemb-softmmu/hw/scsi/vhost-user-scsi.o
CC ppc-softmmu/hw/display/sm501.o
GEN s390x-softmmu/gdbstub-xml.c
CC ppc64-softmmu/hw/scsi/virtio-scsi.o
CC ppcemb-softmmu/hw/vfio/common.o
CC s390x-softmmu/hax-stub.o
CC s390x-softmmu/arch_init.o
CC ppc64-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC ppc-softmmu/hw/display/vga.o
CC s390x-softmmu/cpus.o
CC ppcemb-softmmu/hw/vfio/pci.o
CC ppc64-softmmu/hw/scsi/vhost-scsi-common.o
CC s390x-softmmu/monitor.o
CC ppc64-softmmu/hw/scsi/vhost-scsi.o
CC ppc64-softmmu/hw/scsi/vhost-user-scsi.o
CC ppc-softmmu/hw/display/virtio-gpu.o
CC ppc64-softmmu/hw/timer/mc146818rtc.o
CC ppcemb-softmmu/hw/vfio/pci-quirks.o
CC ppc-softmmu/hw/display/virtio-gpu-3d.o
CC ppc64-softmmu/hw/vfio/common.o
CC ppcemb-softmmu/hw/vfio/platform.o
CC s390x-softmmu/gdbstub.o
CC ppcemb-softmmu/hw/vfio/spapr.o
CC ppc-softmmu/hw/display/virtio-gpu-pci.o
CC ppcemb-softmmu/hw/virtio/virtio.o
CC ppc64-softmmu/hw/vfio/pci.o
CC s390x-softmmu/balloon.o
CC ppc-softmmu/hw/misc/ivshmem.o
CC s390x-softmmu/ioport.o
CC ppcemb-softmmu/hw/virtio/virtio-balloon.o
CC ppc64-softmmu/hw/vfio/pci-quirks.o
CC ppc-softmmu/hw/misc/mmio_interface.o
CC s390x-softmmu/numa.o
CC ppc-softmmu/hw/net/xilinx_ethlite.o
CC s390x-softmmu/qtest.o
CC ppcemb-softmmu/hw/virtio/vhost.o
CC ppc64-softmmu/hw/vfio/platform.o
CC ppc-softmmu/hw/net/virtio-net.o
CC s390x-softmmu/memory.o
CC ppc64-softmmu/hw/vfio/spapr.o
CC ppcemb-softmmu/hw/virtio/vhost-backend.o
CC ppc64-softmmu/hw/virtio/virtio.o
CC ppc-softmmu/hw/net/vhost_net.o
CC ppcemb-softmmu/hw/virtio/vhost-user.o
CC ppcemb-softmmu/hw/virtio/vhost-vsock.o
CC ppc-softmmu/hw/net/fsl_etsec/etsec.o
CC s390x-softmmu/memory_mapping.o
CC ppc-softmmu/hw/net/fsl_etsec/registers.o
CC ppcemb-softmmu/hw/virtio/virtio-crypto.o
CC ppc-softmmu/hw/net/fsl_etsec/rings.o
CC s390x-softmmu/dump.o
CC ppc64-softmmu/hw/virtio/virtio-balloon.o
CC ppcemb-softmmu/hw/virtio/virtio-crypto-pci.o
CC ppc-softmmu/hw/net/fsl_etsec/miim.o
CC ppc64-softmmu/hw/virtio/vhost.o
CC ppcemb-softmmu/hw/ppc/ppc.o
CC s390x-softmmu/migration/ram.o
CC ppc-softmmu/hw/scsi/virtio-scsi.o
CC ppcemb-softmmu/hw/ppc/ppc_booke.o
CC ppc64-softmmu/hw/virtio/vhost-backend.o
CC ppc-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC s390x-softmmu/accel/accel.o
CC ppc64-softmmu/hw/virtio/vhost-user.o
CC s390x-softmmu/accel/kvm/kvm-all.o
CC ppcemb-softmmu/hw/ppc/fdt.o
CC ppc-softmmu/hw/scsi/vhost-scsi-common.o
CC ppcemb-softmmu/hw/ppc/ppc405_boards.o
CC ppc-softmmu/hw/scsi/vhost-scsi.o
CC ppc64-softmmu/hw/virtio/vhost-vsock.o
CC ppc64-softmmu/hw/virtio/virtio-crypto.o
CC ppcemb-softmmu/hw/ppc/ppc4xx_devs.o
CC s390x-softmmu/accel/tcg/tcg-all.o
CC ppc-softmmu/hw/scsi/vhost-user-scsi.o
CC ppc-softmmu/hw/timer/mc146818rtc.o
CC s390x-softmmu/accel/tcg/cputlb.o
CC ppc64-softmmu/hw/virtio/virtio-crypto-pci.o
CC ppcemb-softmmu/hw/ppc/ppc405_uc.o
CC ppc-softmmu/hw/vfio/common.o
CC ppc64-softmmu/hw/ppc/ppc.o
CC ppcemb-softmmu/hw/ppc/ppc440_bamboo.o
CC ppc-softmmu/hw/vfio/pci.o
CC ppcemb-softmmu/hw/ppc/ppc4xx_pci.o
CC ppc64-softmmu/hw/ppc/ppc_booke.o
CC s390x-softmmu/accel/tcg/cpu-exec.o
CC ppc64-softmmu/hw/ppc/fdt.o
CC ppcemb-softmmu/hw/ppc/virtex_ml507.o
CC s390x-softmmu/accel/tcg/cpu-exec-common.o
CC ppc64-softmmu/hw/ppc/spapr.o
CC ppcemb-softmmu/target/ppc/cpu-models.o
CC s390x-softmmu/accel/tcg/translate-all.o
CC ppc-softmmu/hw/vfio/pci-quirks.o
/var/tmp/patchew-tester-tmp-vy8sld96/src/hw/ppc/spapr.c: In function ‘ppc_spapr_init’:
/var/tmp/patchew-tester-tmp-vy8sld96/src/hw/ppc/spapr.c:2349:24: error: ‘RTAS_ERRLOG_OFFSET’ undeclared (first use in this function)
spapr->rtas_size = RTAS_ERRLOG_OFFSET + sizeof(struct RtasMCELog);
^~~~~~~~~~~~~~~~~~
/var/tmp/patchew-tester-tmp-vy8sld96/src/hw/ppc/spapr.c:2349:24: note: each undeclared identifier is reported only once for each function it appears in
/var/tmp/patchew-tester-tmp-vy8sld96/src/hw/ppc/spapr.c:2349:52: error: invalid application of ‘sizeof’ to incomplete type ‘struct RtasMCELog’
spapr->rtas_size = RTAS_ERRLOG_OFFSET + sizeof(struct RtasMCELog);
^~~~~~
/var/tmp/patchew-tester-tmp-vy8sld96/src/rules.mak:66: recipe for target 'hw/ppc/spapr.o' failed
make[1]: *** [hw/ppc/spapr.o] Error 1
Makefile:326: recipe for target 'subdir-ppc64-softmmu' failed
make: *** [subdir-ppc64-softmmu] Error 2
make: *** Waiting for unfinished jobs....
CC ppc-softmmu/hw/vfio/platform.o
CC s390x-softmmu/hw/9pfs/virtio-9p-device.o
CC ppcemb-softmmu/target/ppc/cpu.o
CC ppcemb-softmmu/target/ppc/translate.o
CC ppc-softmmu/hw/vfio/spapr.o
CC s390x-softmmu/hw/block/virtio-blk.o
CC s390x-softmmu/hw/block/dataplane/virtio-blk.o
CC ppc-softmmu/hw/virtio/virtio.o
CC ppcemb-softmmu/target/ppc/machine.o
CC s390x-softmmu/hw/char/virtio-serial-bus.o
CC s390x-softmmu/hw/char/terminal3270.o
CC s390x-softmmu/hw/core/generic-loader.o
CC ppc-softmmu/hw/virtio/virtio-balloon.o
CC ppc-softmmu/hw/virtio/vhost.o
CC s390x-softmmu/hw/core/null-machine.o
CC ppcemb-softmmu/target/ppc/mmu_helper.o
CC s390x-softmmu/hw/display/virtio-gpu.o
CC ppc-softmmu/hw/virtio/vhost-backend.o
CC ppc-softmmu/hw/virtio/vhost-user.o
CC ppc-softmmu/hw/virtio/vhost-vsock.o
CC s390x-softmmu/hw/display/virtio-gpu-3d.o
CC ppc-softmmu/hw/virtio/virtio-crypto.o
CC s390x-softmmu/hw/display/virtio-gpu-pci.o
CC ppc-softmmu/hw/virtio/virtio-crypto-pci.o
CC ppc-softmmu/hw/ppc/ppc.o
CC s390x-softmmu/hw/intc/s390_flic.o
CC s390x-softmmu/hw/intc/s390_flic_kvm.o
CC s390x-softmmu/hw/misc/mmio_interface.o
CC ppc-softmmu/hw/ppc/ppc_booke.o
CC s390x-softmmu/hw/net/virtio-net.o
CC ppc-softmmu/hw/ppc/fdt.o
CC s390x-softmmu/hw/net/vhost_net.o
CC ppc-softmmu/hw/ppc/ppc405_boards.o
CC ppc-softmmu/hw/ppc/ppc4xx_devs.o
CC s390x-softmmu/hw/net/rocker/qmp-norocker.o
CC s390x-softmmu/hw/scsi/virtio-scsi.o
CC ppc-softmmu/hw/ppc/ppc405_uc.o
CC ppcemb-softmmu/target/ppc/mmu-hash32.o
CC ppc-softmmu/hw/ppc/ppc440_bamboo.o
CC s390x-softmmu/hw/scsi/virtio-scsi-dataplane.o
CC ppc-softmmu/hw/ppc/ppc4xx_pci.o
CC ppcemb-softmmu/target/ppc/monitor.o
CC s390x-softmmu/hw/scsi/vhost-scsi-common.o
CC ppc-softmmu/hw/ppc/prep.o
CC s390x-softmmu/hw/scsi/vhost-scsi.o
CC ppc-softmmu/hw/ppc/prep_systemio.o
CC s390x-softmmu/hw/scsi/vhost-user-scsi.o
CC ppcemb-softmmu/target/ppc/arch_dump.o
CC s390x-softmmu/hw/vfio/common.o
CC ppc-softmmu/hw/ppc/rs6000_mc.o
CC ppc-softmmu/hw/ppc/mac_oldworld.o
CC ppcemb-softmmu/target/ppc/kvm-stub.o
CC ppc-softmmu/hw/ppc/mac_newworld.o
CC s390x-softmmu/hw/vfio/pci.o
CC ppc-softmmu/hw/ppc/e500.o
CC s390x-softmmu/hw/vfio/pci-quirks.o
CC ppc-softmmu/hw/ppc/mpc8544ds.o
CC ppc-softmmu/hw/ppc/e500plat.o
CC s390x-softmmu/hw/vfio/ccw.o
CC s390x-softmmu/hw/vfio/platform.o
CC ppc-softmmu/hw/ppc/mpc8544_guts.o
CC ppc-softmmu/hw/ppc/ppce500_spin.o
CC ppcemb-softmmu/target/ppc/dfp_helper.o
CC s390x-softmmu/hw/vfio/spapr.o
CC ppc-softmmu/hw/ppc/virtex_ml507.o
CC s390x-softmmu/hw/virtio/virtio.o
CC ppc-softmmu/target/ppc/cpu-models.o
CC ppc-softmmu/target/ppc/cpu.o
CC ppcemb-softmmu/target/ppc/excp_helper.o
CC ppcemb-softmmu/target/ppc/fpu_helper.o
CC s390x-softmmu/hw/virtio/virtio-balloon.o
CC s390x-softmmu/hw/virtio/vhost.o
CC ppc-softmmu/target/ppc/translate.o
CC ppc-softmmu/target/ppc/machine.o
CC s390x-softmmu/hw/virtio/vhost-backend.o
CC ppcemb-softmmu/target/ppc/int_helper.o
CC s390x-softmmu/hw/virtio/vhost-user.o
CC s390x-softmmu/hw/virtio/vhost-vsock.o
CC s390x-softmmu/hw/virtio/virtio-crypto.o
CC ppcemb-softmmu/target/ppc/timebase_helper.o
CC s390x-softmmu/hw/virtio/virtio-crypto-pci.o
CC ppcemb-softmmu/target/ppc/misc_helper.o
CC ppc-softmmu/target/ppc/mmu_helper.o
CC ppcemb-softmmu/target/ppc/mem_helper.o
CC s390x-softmmu/hw/s390x/s390-virtio.o
CC s390x-softmmu/hw/s390x/s390-virtio-hcall.o
CC ppcemb-softmmu/target/ppc/gdbstub.o
CC s390x-softmmu/hw/s390x/sclp.o
GEN trace/generated-helpers.c
CC ppc-softmmu/target/ppc/mmu-hash32.o
CC ppcemb-softmmu/trace/control-target.o
CC s390x-softmmu/hw/s390x/event-facility.o
CC ppc-softmmu/target/ppc/monitor.o
CC ppcemb-softmmu/gdbstub-xml.o
CC s390x-softmmu/hw/s390x/sclpquiesce.o
CC s390x-softmmu/hw/s390x/sclpcpu.o
CC ppc-softmmu/target/ppc/arch_dump.o
CC ppcemb-softmmu/trace/generated-helpers.o
CC s390x-softmmu/hw/s390x/ipl.o
CC ppc-softmmu/target/ppc/kvm-stub.o
CC ppc-softmmu/target/ppc/dfp_helper.o
LINK ppcemb-softmmu/qemu-system-ppcemb
CC s390x-softmmu/hw/s390x/css.o
CC s390x-softmmu/hw/s390x/s390-virtio-ccw.o
CC ppc-softmmu/target/ppc/excp_helper.o
CC s390x-softmmu/hw/s390x/3270-ccw.o
CC s390x-softmmu/hw/s390x/virtio-ccw.o
CC ppc-softmmu/target/ppc/fpu_helper.o
CC ppc-softmmu/target/ppc/int_helper.o
CC s390x-softmmu/hw/s390x/css-bridge.o
CC s390x-softmmu/hw/s390x/ccw-device.o
CC s390x-softmmu/hw/s390x/s390-pci-bus.o
CC ppc-softmmu/target/ppc/timebase_helper.o
CC s390x-softmmu/hw/s390x/s390-pci-inst.o
CC ppc-softmmu/target/ppc/misc_helper.o
CC s390x-softmmu/hw/s390x/s390-skeys.o
CC s390x-softmmu/hw/s390x/s390-stattrib.o
CC s390x-softmmu/hw/s390x/s390-skeys-kvm.o
CC ppc-softmmu/target/ppc/mem_helper.o
CC ppc-softmmu/target/ppc/gdbstub.o
CC s390x-softmmu/hw/s390x/s390-stattrib-kvm.o
CC s390x-softmmu/hw/s390x/s390-ccw.o
CC s390x-softmmu/target/s390x/cpu.o
GEN trace/generated-helpers.c
CC s390x-softmmu/target/s390x/cpu_models.o
CC ppc-softmmu/trace/control-target.o
CC s390x-softmmu/target/s390x/cpu_features.o
CC ppc-softmmu/gdbstub-xml.o
CC s390x-softmmu/target/s390x/gdbstub.o
CC s390x-softmmu/target/s390x/interrupt.o
CC s390x-softmmu/target/s390x/helper.o
CC s390x-softmmu/target/s390x/translate.o
CC ppc-softmmu/trace/generated-helpers.o
CC s390x-softmmu/target/s390x/cc_helper.o
CC s390x-softmmu/target/s390x/excp_helper.o
LINK ppc-softmmu/qemu-system-ppc
CC s390x-softmmu/target/s390x/fpu_helper.o
CC s390x-softmmu/target/s390x/int_helper.o
CC s390x-softmmu/target/s390x/mem_helper.o
CC s390x-softmmu/target/s390x/misc_helper.o
CC s390x-softmmu/target/s390x/machine.o
CC s390x-softmmu/target/s390x/ioinst.o
CC s390x-softmmu/target/s390x/arch_dump.o
CC s390x-softmmu/target/s390x/mmu_helper.o
CC s390x-softmmu/target/s390x/diag.o
CC s390x-softmmu/target/s390x/kvm.o
GEN trace/generated-helpers.c
CC s390x-softmmu/trace/control-target.o
CC s390x-softmmu/gdbstub-xml.o
CC s390x-softmmu/trace/generated-helpers.o
LINK s390x-softmmu/qemu-system-s390x
=== OUTPUT END ===
Test command exited with code: 2
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@freelists.org
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [Qemu-devel] [PATCH v3 0/5] target-ppc/spapr: Add FWNMI support in QEMU for PowerKVM guests
2017-08-16 9:11 [Qemu-devel] [PATCH v3 0/5] target-ppc/spapr: Add FWNMI support in QEMU for PowerKVM guests Aravinda Prasad
` (5 preceding siblings ...)
2017-08-16 9:29 ` [Qemu-devel] [PATCH v3 0/5] target-ppc/spapr: Add FWNMI support in QEMU for PowerKVM guests no-reply
@ 2017-08-16 9:40 ` no-reply
2017-08-17 3:35 ` Sam Bobroff
7 siblings, 0 replies; 31+ messages in thread
From: no-reply @ 2017-08-16 9:40 UTC (permalink / raw)
To: aravinda
Cc: famz, qemu-ppc, qemu-devel, david, aik, benh, paulus, sam.bobroff
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 150287457293.9760.17827532208744487789.stgit@aravinda
Subject: [Qemu-devel] [PATCH v3 0/5] target-ppc/spapr: Add FWNMI support in QEMU for PowerKVM guests
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
total=$(git log --oneline $BASE.. | wc -l)
failed=0
git config --local diff.renamelimit 0
git config --local diff.renames True
commits="$(git log --format=%H --reverse $BASE..)"
for c in $commits; do
echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..."
if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then
failed=1
echo
fi
n=$((n+1))
done
exit $failed
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
* [new tag] patchew/1502874842-4191-1-git-send-email-wang.yong155@zte.com.cn -> patchew/1502874842-4191-1-git-send-email-wang.yong155@zte.com.cn
Switched to a new branch 'test'
0fa29fb816 ppc: spapr: Enable FWNMI capability
f6f423710e target/ppc: Handle NMI guest exit
966e015980 Wrapper function to wait on condition for the main loop mutex
3438e95e3b ppc: spapr: Handle "ibm, nmi-register" and "ibm, nmi-interlock" RTAS calls
d00f1dcac0 ppc: spapr: Register and handle HCALL to receive updated RTAS region
=== OUTPUT BEGIN ===
Checking PATCH 1/5: ppc: spapr: Register and handle HCALL to receive updated RTAS region...
Checking PATCH 2/5: ppc: spapr: Handle "ibm, nmi-register" and "ibm, nmi-interlock" RTAS calls...
Checking PATCH 3/5: Wrapper function to wait on condition for the main loop mutex...
Checking PATCH 4/5: target/ppc: Handle NMI guest exit...
Checking PATCH 5/5: ppc: spapr: Enable FWNMI capability...
ERROR: externs should be avoided in .c files
#24: FILE: hw/ppc/spapr_rtas.c:50:
+extern int cap_fwnmi;
total: 1 errors, 0 warnings, 44 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
=== OUTPUT END ===
Test command exited with code: 1
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@freelists.org
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [Qemu-devel] [PATCH v3 1/5] ppc: spapr: Register and handle HCALL to receive updated RTAS region
2017-08-16 9:12 ` [Qemu-devel] [PATCH v3 1/5] ppc: spapr: Register and handle HCALL to receive updated RTAS region Aravinda Prasad
@ 2017-08-17 1:34 ` David Gibson
2017-08-17 10:27 ` Nikunj A Dadhania
2017-08-21 9:42 ` Aravinda Prasad
0 siblings, 2 replies; 31+ messages in thread
From: David Gibson @ 2017-08-17 1:34 UTC (permalink / raw)
To: Aravinda Prasad
Cc: qemu-ppc, qemu-devel, aik, mahesh, benh, paulus, sam.bobroff
[-- Attachment #1: Type: text/plain, Size: 3213 bytes --]
On Wed, Aug 16, 2017 at 02:42:13PM +0530, Aravinda Prasad wrote:
> Receive updates from SLOF about the updated rtas-base.
> A separate patch for SLOF [1] adds functionality to invoke
> a private HCALL whenever OS issues instantiate-rtas with
> a new rtas-base.
>
> This is required as QEMU needs to know the updated rtas-base
> as it allocates error reporting structure in RTAS space upon
> a machine check exception.
>
> [1] https://lists.ozlabs.org/pipermail/linuxppc-dev/2014-August/120386.html
>
> Signed-off-by: Aravinda Prasad <aravinda@linux.vnet.ibm.com>
> Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Actually, I take back this R-b, see below.
In any case I'm not willing to apply the patches which depend on this
until the corresponding SLOF update is merged as well.
> ---
> hw/ppc/spapr_hcall.c | 8 ++++++++
> include/hw/ppc/spapr.h | 4 +++-
> 2 files changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
> index 72ea5a8..e66c72e 100644
> --- a/hw/ppc/spapr_hcall.c
> +++ b/hw/ppc/spapr_hcall.c
> @@ -1062,6 +1062,13 @@ static target_ulong h_rtas(PowerPCCPU *cpu, sPAPRMachineState *spapr,
> nret, rtas_r3 + 12 + 4*nargs);
> }
>
> +static target_ulong h_rtas_update(PowerPCCPU *cpu, sPAPRMachineState *spapr,
> + target_ulong opcode, target_ulong *args)
> +{
> + spapr->rtas_addr = args[0];
> + return 0;
> +}
> +
> static target_ulong h_logical_load(PowerPCCPU *cpu, sPAPRMachineState *spapr,
> target_ulong opcode, target_ulong *args)
> {
> @@ -1717,6 +1724,7 @@ static void hypercall_register_types(void)
>
> /* qemu/KVM-PPC specific hcalls */
> spapr_register_hypercall(KVMPPC_H_RTAS, h_rtas);
> + spapr_register_hypercall(KVMPPC_H_RTAS_UPDATE, h_rtas_update);
>
> /* ibm,client-architecture-support support */
> spapr_register_hypercall(KVMPPC_H_CAS, h_client_architecture_support);
> diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
> index 2a303a7..46012b3 100644
> --- a/include/hw/ppc/spapr.h
> +++ b/include/hw/ppc/spapr.h
> @@ -90,6 +90,7 @@ struct sPAPRMachineState {
>
> hwaddr rma_size;
> int vrma_adjust;
> + hwaddr rtas_addr;
This can now change at runtime, which means it needs to be migrated -
that's not happening in your patches yet.
> ssize_t rtas_size;
> void *rtas_blob;
> long kernel_size;
> @@ -399,7 +400,8 @@ struct sPAPRMachineState {
> #define KVMPPC_H_LOGICAL_MEMOP (KVMPPC_HCALL_BASE + 0x1)
> /* Client Architecture support */
> #define KVMPPC_H_CAS (KVMPPC_HCALL_BASE + 0x2)
> -#define KVMPPC_HCALL_MAX KVMPPC_H_CAS
> +#define KVMPPC_H_RTAS_UPDATE (KVMPPC_HCALL_BASE + 0x3)
> +#define KVMPPC_HCALL_MAX KVMPPC_H_RTAS_UPDATE
>
> typedef struct sPAPRDeviceTreeUpdateHeader {
> uint32_t version_id;
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [Qemu-devel] [PATCH v3 2/5] ppc: spapr: Handle "ibm, nmi-register" and "ibm, nmi-interlock" RTAS calls
2017-08-16 9:12 ` [Qemu-devel] [PATCH v3 2/5] ppc: spapr: Handle "ibm, nmi-register" and "ibm, nmi-interlock" RTAS calls Aravinda Prasad
@ 2017-08-17 1:39 ` David Gibson
2017-08-21 12:35 ` Aravinda Prasad
0 siblings, 1 reply; 31+ messages in thread
From: David Gibson @ 2017-08-17 1:39 UTC (permalink / raw)
To: Aravinda Prasad
Cc: qemu-ppc, qemu-devel, aik, mahesh, benh, paulus, sam.bobroff
[-- Attachment #1: Type: text/plain, Size: 6042 bytes --]
What's with the extra spaces in the subject line?
On Wed, Aug 16, 2017 at 02:42:21PM +0530, Aravinda Prasad wrote:
> This patch adds support in QEMU to handle "ibm,nmi-register"
> and "ibm,nmi-interlock" RTAS calls.
>
> The machine check notification address is saved when the
> OS issues "ibm,nmi-register" RTAS call.
>
> This patch also handles the case when multiple processors
> experience machine check at or about the same time by
> handling "ibm,nmi-interlock" call. In such cases, as per
> PAPR, subsequent processors serialize waiting for the first
> processor to issue the "ibm,nmi-interlock" call. The second
> processor waits till the first processor, which also
> received a machine check error, is done reading the error
> log. The first processor issues "ibm,nmi-interlock" call
> when the error log is consumed. This patch implements the
> releasing part of the error-log while subsequent patch
> (which builds error log) handles the locking part.
>
> Signed-off-by: Aravinda Prasad <aravinda@linux.vnet.ibm.com>
> ---
> hw/ppc/spapr.c | 8 ++++++++
> hw/ppc/spapr_rtas.c | 35 +++++++++++++++++++++++++++++++++++
> include/hw/ppc/spapr.h | 10 +++++++++-
> 3 files changed, 52 insertions(+), 1 deletion(-)
>
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index 2a3e53d..0bb2c4a 100644
> --- a/hw/ppc/spapr.c
> +++ b/hw/ppc/spapr.c
> @@ -1441,6 +1441,11 @@ static void ppc_spapr_reset(void)
> first_ppc_cpu->env.nip = SPAPR_ENTRY_POINT;
>
> spapr->cas_reboot = false;
> +
> + spapr->mc_in_progress = false;
> + spapr->guest_machine_check_addr = 0;
> + qemu_cond_destroy(&spapr->mc_delivery_cond);
> + qemu_cond_init(&spapr->mc_delivery_cond);
> }
>
> static void spapr_create_nvram(sPAPRMachineState *spapr)
> @@ -2491,6 +2496,9 @@ static void ppc_spapr_init(MachineState *machine)
>
> kvmppc_spapr_enable_inkernel_multitce();
> }
> +
> + spapr->mc_in_progress = false;
> + qemu_cond_init(&spapr->mc_delivery_cond);
> }
>
> static int spapr_kvm_type(const char *vm_type)
> diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c
> index 94a2799..2f3c47b 100644
> --- a/hw/ppc/spapr_rtas.c
> +++ b/hw/ppc/spapr_rtas.c
> @@ -348,6 +348,37 @@ static void rtas_get_power_level(PowerPCCPU *cpu, sPAPRMachineState *spapr,
> rtas_st(rets, 1, 100);
> }
>
> +static void rtas_ibm_nmi_register(PowerPCCPU *cpu,
> + sPAPRMachineState *spapr,
> + uint32_t token, uint32_t nargs,
> + target_ulong args,
> + uint32_t nret, target_ulong rets)
> +{
> + spapr->guest_machine_check_addr = rtas_ld(args, 1);
> + rtas_st(rets, 0, RTAS_OUT_SUCCESS);
> +}
> +
> +static void rtas_ibm_nmi_interlock(PowerPCCPU *cpu,
> + sPAPRMachineState *spapr,
> + uint32_t token, uint32_t nargs,
> + target_ulong args,
> + uint32_t nret, target_ulong rets)
> +{
> + if (!spapr->guest_machine_check_addr) {
> + /* NMI register not called */
> + rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
> + } else {
> + /*
> + * VCPU issuing "ibm,nmi-interlock" is done with NMI handling,
> + * hence unset mc_in_progress.
> + */
> + spapr->mc_in_progress = false;
> + qemu_cond_signal(&spapr->mc_delivery_cond);
> + rtas_st(rets, 0, RTAS_OUT_SUCCESS);
> + }
> +}
> +
> +
> static struct rtas_call {
> const char *name;
> spapr_rtas_fn fn;
> @@ -489,6 +520,10 @@ static void core_rtas_register_types(void)
> rtas_set_power_level);
> spapr_rtas_register(RTAS_GET_POWER_LEVEL, "get-power-level",
> rtas_get_power_level);
> + spapr_rtas_register(RTAS_IBM_NMI_REGISTER, "ibm,nmi-register",
> + rtas_ibm_nmi_register);
> + spapr_rtas_register(RTAS_IBM_NMI_INTERLOCK, "ibm,nmi-interlock",
> + rtas_ibm_nmi_interlock);
> }
>
> type_init(core_rtas_register_types)
> diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
> index 46012b3..eee8d33 100644
> --- a/include/hw/ppc/spapr.h
> +++ b/include/hw/ppc/spapr.h
> @@ -123,6 +123,12 @@ struct sPAPRMachineState {
> * occurs during the unplug process. */
> QTAILQ_HEAD(, sPAPRDIMMState) pending_dimm_unplugs;
>
> + /* State related to "ibm,nmi-register" and "ibm,nmi-interlock" calls */
> + target_ulong guest_machine_check_addr;
> + bool mc_in_progress;
> + int mc_cpu;
mc_cpu isn't actually used yet in this patch. In any case it and
mc_in_progress could probably be folded together, no?
These values will also need to be migrated, AFAICT.
> + QemuCond mc_delivery_cond;
> +
> /*< public >*/
> char *kvm_type;
> MemoryHotplugState hotplug_memory;
> @@ -519,8 +525,10 @@ target_ulong spapr_hypercall(PowerPCCPU *cpu, target_ulong opcode,
> #define RTAS_IBM_CREATE_PE_DMA_WINDOW (RTAS_TOKEN_BASE + 0x27)
> #define RTAS_IBM_REMOVE_PE_DMA_WINDOW (RTAS_TOKEN_BASE + 0x28)
> #define RTAS_IBM_RESET_PE_DMA_WINDOW (RTAS_TOKEN_BASE + 0x29)
> +#define RTAS_IBM_NMI_REGISTER (RTAS_TOKEN_BASE + 0x2A)
> +#define RTAS_IBM_NMI_INTERLOCK (RTAS_TOKEN_BASE + 0x2B)
>
> -#define RTAS_TOKEN_MAX (RTAS_TOKEN_BASE + 0x2A)
> +#define RTAS_TOKEN_MAX (RTAS_TOKEN_BASE + 0x2C)
>
> /* RTAS ibm,get-system-parameter token values */
> #define RTAS_SYSPARM_SPLPAR_CHARACTERISTICS 20
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [Qemu-devel] [PATCH v3 4/5] target/ppc: Handle NMI guest exit
2017-08-16 9:12 ` [Qemu-devel] [PATCH v3 4/5] target/ppc: Handle NMI guest exit Aravinda Prasad
@ 2017-08-17 1:57 ` David Gibson
2017-08-21 12:30 ` Aravinda Prasad
0 siblings, 1 reply; 31+ messages in thread
From: David Gibson @ 2017-08-17 1:57 UTC (permalink / raw)
To: Aravinda Prasad
Cc: qemu-ppc, qemu-devel, aik, mahesh, benh, paulus, sam.bobroff
[-- Attachment #1: Type: text/plain, Size: 9085 bytes --]
On Wed, Aug 16, 2017 at 02:42:39PM +0530, Aravinda Prasad wrote:
> Memory error such as bit flips that cannot be corrected
> by hardware are passed on to the kernel for handling.
> If the memory address in error belongs to guest then
> guest kernel is responsible for taking suitable action.
> Patch [1] enhances KVM to exit guest with exit reason
> set to KVM_EXIT_NMI in such cases.
>
> This patch handles KVM_EXIT_NMI exit. If the guest OS
> has registered the machine check handling routine by
> calling "ibm,nmi-register", then the handler builds
> the error log and invokes the registered handler else
> invokes the handler at 0x200.
>
> [1] https://www.spinics.net/lists/kvm-ppc/msg12637.html
> (e20bbd3d and related commits)
>
> Signed-off-by: Aravinda Prasad <aravinda@linux.vnet.ibm.com>
> ---
> hw/ppc/spapr.c | 4 ++
> target/ppc/kvm.c | 86 ++++++++++++++++++++++++++++++++++++++++++++++++++
> target/ppc/kvm_ppc.h | 81 +++++++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 171 insertions(+)
>
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index 0bb2c4a..6cc3f69 100644
> --- a/hw/ppc/spapr.c
> +++ b/hw/ppc/spapr.c
> @@ -2346,6 +2346,10 @@ static void ppc_spapr_init(MachineState *machine)
> error_report("Could not get size of LPAR rtas '%s'", filename);
> exit(1);
> }
> +
> + /* Resize blob to accommodate error log. */
> + spapr->rtas_size = RTAS_ERRLOG_OFFSET + sizeof(struct RtasMCELog);
> +
> spapr->rtas_blob = g_malloc(spapr->rtas_size);
> if (load_image_size(filename, spapr->rtas_blob, spapr->rtas_size) < 0) {
> error_report("Could not load LPAR rtas '%s'", filename);
> diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
> index 8571379..73f64ed 100644
> --- a/target/ppc/kvm.c
> +++ b/target/ppc/kvm.c
> @@ -1782,6 +1782,11 @@ int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
> ret = 0;
> break;
>
> + case KVM_EXIT_NMI:
> + DPRINTF("handle NMI exception\n");
> + ret = kvm_handle_nmi(cpu);
> + break;
> +
> default:
> fprintf(stderr, "KVM: unknown exit reason %d\n", run->exit_reason);
> ret = -1;
> @@ -2704,6 +2709,87 @@ int kvm_arch_msi_data_to_gsi(uint32_t data)
> return data & 0xffff;
> }
>
> +int kvm_handle_nmi(PowerPCCPU *cpu)
So you only handle NMIs with KVM. Wouldn't it make sense to also
handle them for TCG (where they can be triggered with the "nmi"
command on the monitor).
> +{
> + struct RtasMCELog mc_log;
> + CPUPPCState *env = &cpu->env;
> + sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
> + PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
> + target_ulong msr = 0;
> +
> + cpu_synchronize_state(CPU(cpu));
> +
> + /*
> + * Properly set bits in MSR before we invoke the handler.
> + * SRR0/1, DAR and DSISR are properly set by KVM
> + */
> + if (!(*pcc->interrupts_big_endian)(cpu)) {
> + msr |= (1ULL << MSR_LE);
> + }
> +
> + if (env->msr && (1ULL << MSR_SF)) {
> + msr |= (1ULL << MSR_SF);
> + }
> +
> + msr |= (1ULL << MSR_ME);
> + env->msr = msr;
> +
> + if (!spapr->guest_machine_check_addr) {
> + /*
> + * If OS has not registered with "ibm,nmi-register"
> + * jump to 0x200
> + */
> + env->nip = 0x200;
> + return 0;
> + }
> +
> + while (spapr->mc_in_progress) {
> + /*
> + * Check whether the same CPU got machine check error
> + * while still handling the mc error (i.e., before
> + * that CPU called "ibm,nmi-interlock"
> + */
> + if (spapr->mc_cpu == cpu->cpu_dt_id) {
> + qemu_system_guest_panicked(NULL);
> + }
> + qemu_cond_wait_iothread(&spapr->mc_delivery_cond);
> + }
> + spapr->mc_in_progress = true;
> + spapr->mc_cpu = cpu->cpu_dt_id;
This will be merging against 2.11 and there are changes to the use of
cpu_dt_id in the ppc-for-2.11 tree which you'll need to rebase on top
of.
> + /* Set error log fields */
> + mc_log.r3 = env->gpr[3];
> + mc_log.err_log.byte0 = 0;
> + mc_log.err_log.byte1 =
> + (RTAS_SEVERITY_ERROR_SYNC << RTAS_ELOG_SEVERITY_SHIFT);
> + mc_log.err_log.byte1 |=
> + (RTAS_DISP_NOT_RECOVERED << RTAS_ELOG_DISPOSITION_SHIFT);
> + mc_log.err_log.byte2 =
> + (RTAS_INITIATOR_MEMORY << RTAS_ELOG_INITIATOR_SHIFT);
> + mc_log.err_log.byte2 |= RTAS_TARGET_MEMORY;
> +
> + if (env->spr[SPR_DSISR] & P7_DSISR_MC_UE) {
> + mc_log.err_log.byte3 = RTAS_TYPE_ECC_UNCORR;
> + } else {
> + mc_log.err_log.byte3 = 0;
> + }
> +
> + /* Handle all Host/Guest LE/BE combinations */
> + if (env->msr & (1ULL << MSR_LE)) {
> + mc_log.r3 = cpu_to_le64(mc_log.r3);
> + } else {
> + mc_log.r3 = cpu_to_be64(mc_log.r3);
> + }
So, the r3 field is guest order, but the rest is fixed BE order, is
that right?
> + cpu_physical_memory_write(spapr->rtas_addr + RTAS_ERRLOG_OFFSET,
> + &mc_log, sizeof(mc_log));
> +
You never set extended_log_length, so it doesn't look like the whole
structure is initialized.
> + env->nip = spapr->guest_machine_check_addr;
> + env->gpr[3] = spapr->rtas_addr + RTAS_ERRLOG_OFFSET;
> + return 0;
> +}
> +
> int kvmppc_enable_hwrng(void)
> {
> if (!kvm_enabled() || !kvm_check_extension(kvm_state, KVM_CAP_PPC_HWRNG)) {
> diff --git a/target/ppc/kvm_ppc.h b/target/ppc/kvm_ppc.h
> index 6bc6fb3..bc8e3ce 100644
> --- a/target/ppc/kvm_ppc.h
> +++ b/target/ppc/kvm_ppc.h
> @@ -70,6 +70,87 @@ void kvmppc_update_sdr1(target_ulong sdr1);
>
> bool kvmppc_is_mem_backend_page_size_ok(const char *obj_path);
>
> +int kvm_handle_nmi(PowerPCCPU *cpu);
> +
> +/* Offset from rtas-base where error log is placed */
> +#define RTAS_ERRLOG_OFFSET 0x200
> +
> +#define RTAS_ELOG_SEVERITY_SHIFT 0x5
> +#define RTAS_ELOG_DISPOSITION_SHIFT 0x3
> +#define RTAS_ELOG_INITIATOR_SHIFT 0x4
> +
> +/*
> + * Only required RTAS event severity, disposition, initiator
> + * target and type are copied from arch/powerpc/include/asm/rtas.h
> + */
> +
> +/* RTAS event severity */
> +#define RTAS_SEVERITY_ERROR_SYNC 0x3
> +
> +/* RTAS event disposition */
> +#define RTAS_DISP_NOT_RECOVERED 0x2
> +
> +/* RTAS event initiator */
> +#define RTAS_INITIATOR_MEMORY 0x4
> +
> +/* RTAS event target */
> +#define RTAS_TARGET_MEMORY 0x4
> +
> +/* RTAS event type */
> +#define RTAS_TYPE_ECC_UNCORR 0x09
> +
> +/*
> + * Currently KVM only passes on the uncorrected machine
> + * check memory error to guest. Other machine check errors
> + * such as SLB multi-hit and TLB multi-hit are recovered
> + * in KVM and are not passed on to guest.
> + *
> + * DSISR Bit for uncorrected machine check error. Based
> + * on arch/powerpc/include/asm/mce.h
> + */
> +#define PPC_BIT(bit) (0x8000000000000000ULL >> bit)
> +#define P7_DSISR_MC_UE (PPC_BIT(48)) /* P8 too */
> +
> +/* Adopted from kernel source arch/powerpc/include/asm/rtas.h */
> +struct rtas_error_log {
There are already structures for rtas error logs in
hw/ppc/spapr_events.c; those should be re-used. You can probably
share some code to transfer log entries to the guest with correct
endianness as well.
> + /* Byte 0 */
> + uint8_t byte0; /* Architectural version */
> +
> + /* Byte 1 */
> + uint8_t byte1;
> + /* XXXXXXXX
> + * XXX 3: Severity level of error
> + * XX 2: Degree of recovery
> + * X 1: Extended log present?
> + * XX 2: Reserved
> + */
> +
> + /* Byte 2 */
> + uint8_t byte2;
> + /* XXXXXXXX
> + * XXXX 4: Initiator of event
> + * XXXX 4: Target of failed operation
> + */
> + uint8_t byte3; /* General event or error*/
> + __be32 extended_log_length; /* length in bytes */
> + unsigned char buffer[1]; /* Start of extended log */
> + /* Variable length. */
> +};
> +
> +/*
> + * Data format in RTAS-Blob
> + *
> + * This structure contains error information related to Machine
> + * Check exception. This is filled up and copied to rtas-blob
> + * upon machine check exception. The address of rtas-blob is
> + * passed on to OS registered machine check notification
> + * routines upon machine check exception
> + */
> +struct RtasMCELog {
> + target_ulong r3;
> + struct rtas_error_log err_log;
> +};
> +
> #else
>
> static inline uint32_t kvmppc_get_tbfreq(void)
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [Qemu-devel] [PATCH v3 5/5] ppc: spapr: Enable FWNMI capability
2017-08-16 9:12 ` [Qemu-devel] [PATCH v3 5/5] ppc: spapr: Enable FWNMI capability Aravinda Prasad
@ 2017-08-17 1:59 ` David Gibson
2017-08-21 10:50 ` Aravinda Prasad
0 siblings, 1 reply; 31+ messages in thread
From: David Gibson @ 2017-08-17 1:59 UTC (permalink / raw)
To: Aravinda Prasad
Cc: qemu-ppc, qemu-devel, aik, mahesh, benh, paulus, sam.bobroff
[-- Attachment #1: Type: text/plain, Size: 3086 bytes --]
On Wed, Aug 16, 2017 at 02:42:48PM +0530, Aravinda Prasad wrote:
> Enable the KVM capability KVM_CAP_PPC_FWNMI so that
> the KVM causes guest exit with NMI as exit reason
> when it encounters a machine check exception on the
> address belonging to a guest. Without this capability
> enabled, KVM redirects machine check exceptions to
> guest's 0x200 vector.
>
> Signed-off-by: Aravinda Prasad <aravinda@linux.vnet.ibm.com>
> ---
> hw/ppc/spapr_rtas.c | 17 +++++++++++++++++
> target/ppc/kvm.c | 2 ++
> 2 files changed, 19 insertions(+)
>
> diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c
> index 2f3c47b..c2a361a 100644
> --- a/hw/ppc/spapr_rtas.c
> +++ b/hw/ppc/spapr_rtas.c
> @@ -47,6 +47,8 @@
> #include "trace.h"
> #include "hw/ppc/fdt.h"
>
> +extern int cap_fwnmi;
Ew. as the style checker will tell you, bare externs in .c files are
frowned upon. And the cap_* variables xertainly shouldn't be exported
from kvm.c.
> static void rtas_display_character(PowerPCCPU *cpu, sPAPRMachineState *spapr,
> uint32_t token, uint32_t nargs,
> target_ulong args,
> @@ -354,7 +356,22 @@ static void rtas_ibm_nmi_register(PowerPCCPU *cpu,
> target_ulong args,
> uint32_t nret, target_ulong rets)
> {
> + int ret;
> + CPUState *cs = CPU(cpu);
> +
> + if (!cap_fwnmi) {
> + rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
> + return;
> + }
> +
> spapr->guest_machine_check_addr = rtas_ld(args, 1);
> +
> + ret = kvm_vcpu_enable_cap(cs, KVM_CAP_PPC_FWNMI, 0);
> + if (ret < 0) {
> + rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
> + return;
> + }
> +
Congratulations, you broke build on an x86 host. Things that directly
call KVM need to go in kvm.c with suitable stubs for non-kvm builds.
> rtas_st(rets, 0, RTAS_OUT_SUCCESS);
> }
>
> diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
> index 73f64ed..ca1ffa6 100644
> --- a/target/ppc/kvm.c
> +++ b/target/ppc/kvm.c
> @@ -90,6 +90,7 @@ static int cap_htm; /* Hardware transactional memory support */
> static int cap_mmu_radix;
> static int cap_mmu_hash_v3;
> static int cap_resize_hpt;
> +int cap_fwnmi;
>
> static uint32_t debug_inst_opcode;
>
> @@ -147,6 +148,7 @@ int kvm_arch_init(MachineState *ms, KVMState *s)
> cap_mmu_radix = kvm_vm_check_extension(s, KVM_CAP_PPC_MMU_RADIX);
> cap_mmu_hash_v3 = kvm_vm_check_extension(s, KVM_CAP_PPC_MMU_HASH_V3);
> cap_resize_hpt = kvm_vm_check_extension(s, KVM_CAP_SPAPR_RESIZE_HPT);
> + cap_fwnmi = kvm_check_extension(s, KVM_CAP_PPC_FWNMI);
>
> if (!cap_interrupt_level) {
> fprintf(stderr, "KVM: Couldn't find level irq capability. Expect the "
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [Qemu-devel] [PATCH v3 0/5] target-ppc/spapr: Add FWNMI support in QEMU for PowerKVM guests
2017-08-16 9:11 [Qemu-devel] [PATCH v3 0/5] target-ppc/spapr: Add FWNMI support in QEMU for PowerKVM guests Aravinda Prasad
` (6 preceding siblings ...)
2017-08-16 9:40 ` no-reply
@ 2017-08-17 3:35 ` Sam Bobroff
2017-08-21 9:10 ` Aravinda Prasad
7 siblings, 1 reply; 31+ messages in thread
From: Sam Bobroff @ 2017-08-17 3:35 UTC (permalink / raw)
To: Aravinda Prasad; +Cc: qemu-ppc, qemu-devel, david, aik, mahesh, benh, paulus
On Wed, Aug 16, 2017 at 02:41:59PM +0530, Aravinda Prasad wrote:
> This series of patches adds support for FWNMI in PowerKVM guests.
>
> Memory error such as bit flips that cannot be corrected
> by hardware is passed on to the kernel for handling
> by raising machine check exception (an NMI). Upon such
> machine check exception, if the address in error belongs
> to guest then KVM causes a guest exit with KVM_EXIT_NMI
> exit reason.
>
> This patch series adds functionality to pass on such
> machine check exception to the guest kernel by suitably
> handling KVM_EXIT_NMI exit and building the error log.
>
> The KVM changes are now part of the upstream kernel
> (commit e20bbd3d). This series contain QEMU changes.
[snip]
Hi,
I'm concerned that this implementation may introduce a problem with
kexec. If a VM registers an NMI handler, then kexecs to a new kernel
and an NMI is received before the new kernel has registered it's
handler, won't QEMU cause the guest to jump to the old, now invalid,
handler address? Is this worth worrying about?
Cheers,
Sam.
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [Qemu-devel] [PATCH v3 1/5] ppc: spapr: Register and handle HCALL to receive updated RTAS region
2017-08-17 1:34 ` David Gibson
@ 2017-08-17 10:27 ` Nikunj A Dadhania
2017-08-21 9:42 ` Aravinda Prasad
1 sibling, 0 replies; 31+ messages in thread
From: Nikunj A Dadhania @ 2017-08-17 10:27 UTC (permalink / raw)
To: David Gibson, Aravinda Prasad
Cc: benh, aik, qemu-devel, qemu-ppc, paulus, sam.bobroff
David Gibson <david@gibson.dropbear.id.au> writes:
> On Wed, Aug 16, 2017 at 02:42:13PM +0530, Aravinda Prasad wrote:
>> Receive updates from SLOF about the updated rtas-base.
>> A separate patch for SLOF [1] adds functionality to invoke
>> a private HCALL whenever OS issues instantiate-rtas with
>> a new rtas-base.
>>
>> This is required as QEMU needs to know the updated rtas-base
>> as it allocates error reporting structure in RTAS space upon
>> a machine check exception.
>>
>> [1] https://lists.ozlabs.org/pipermail/linuxppc-dev/2014-August/120386.html
>>
>> Signed-off-by: Aravinda Prasad <aravinda@linux.vnet.ibm.com>
>> Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
>
> Actually, I take back this R-b, see below.
>
> In any case I'm not willing to apply the patches which depend on this
> until the corresponding SLOF update is merged as well.
We already have this sitting around in SLOF for a while
https://git.qemu.org/gitweb.cgi?p=SLOF.git;a=commit;f=lib/libhvcall/libhvcall.h;h=f9a60de30492863811c2cdf6f28988c9e8a2c3d9
Regards
Nikunj
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [Qemu-devel] [PATCH v3 0/5] target-ppc/spapr: Add FWNMI support in QEMU for PowerKVM guests
2017-08-17 3:35 ` Sam Bobroff
@ 2017-08-21 9:10 ` Aravinda Prasad
2017-08-23 0:43 ` David Gibson
0 siblings, 1 reply; 31+ messages in thread
From: Aravinda Prasad @ 2017-08-21 9:10 UTC (permalink / raw)
To: Sam Bobroff; +Cc: qemu-ppc, qemu-devel, david, aik, mahesh, benh, paulus
On Thursday 17 August 2017 09:05 AM, Sam Bobroff wrote:
> On Wed, Aug 16, 2017 at 02:41:59PM +0530, Aravinda Prasad wrote:
>> This series of patches adds support for FWNMI in PowerKVM guests.
>>
>> Memory error such as bit flips that cannot be corrected
>> by hardware is passed on to the kernel for handling
>> by raising machine check exception (an NMI). Upon such
>> machine check exception, if the address in error belongs
>> to guest then KVM causes a guest exit with KVM_EXIT_NMI
>> exit reason.
>>
>> This patch series adds functionality to pass on such
>> machine check exception to the guest kernel by suitably
>> handling KVM_EXIT_NMI exit and building the error log.
>>
>> The KVM changes are now part of the upstream kernel
>> (commit e20bbd3d). This series contain QEMU changes.
>
> [snip]
>
> Hi,
>
> I'm concerned that this implementation may introduce a problem with
> kexec. If a VM registers an NMI handler, then kexecs to a new kernel
> and an NMI is received before the new kernel has registered it's
> handler, won't QEMU cause the guest to jump to the old, now invalid,
> handler address? Is this worth worrying about?
I think there is a small time window till the kexec kernel registers a
new handler during which NMI can branch to the old invalid address.
Two points of interest. First, I did not find any "ibm,nmi-unregister"
call. Hence, once the VM registers for NMI it cannot unregister it.
Second, if kexec is triggered due to VM crash, then the guest will not
get the opportunity to unregister NMI even in case something similar to
"ibm,nmi-unregister" is available.
Not sure if this is worth handling as machine check NMIs are rare, and
getting a machine check NMI during that small time window is very rare.
Regards,
Aravinda
>
> Cheers,
> Sam.
>
--
Regards,
Aravinda
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [Qemu-devel] [PATCH v3 1/5] ppc: spapr: Register and handle HCALL to receive updated RTAS region
2017-08-17 1:34 ` David Gibson
2017-08-17 10:27 ` Nikunj A Dadhania
@ 2017-08-21 9:42 ` Aravinda Prasad
2017-08-22 3:33 ` David Gibson
1 sibling, 1 reply; 31+ messages in thread
From: Aravinda Prasad @ 2017-08-21 9:42 UTC (permalink / raw)
To: David Gibson, Nikunj A. Dadhania
Cc: qemu-ppc, qemu-devel, aik, mahesh, benh, paulus, sam.bobroff
On Thursday 17 August 2017 07:04 AM, David Gibson wrote:
> On Wed, Aug 16, 2017 at 02:42:13PM +0530, Aravinda Prasad wrote:
>> Receive updates from SLOF about the updated rtas-base.
>> A separate patch for SLOF [1] adds functionality to invoke
>> a private HCALL whenever OS issues instantiate-rtas with
>> a new rtas-base.
>>
>> This is required as QEMU needs to know the updated rtas-base
>> as it allocates error reporting structure in RTAS space upon
>> a machine check exception.
>>
>> [1] https://lists.ozlabs.org/pipermail/linuxppc-dev/2014-August/120386.html
>>
>> Signed-off-by: Aravinda Prasad <aravinda@linux.vnet.ibm.com>
>> Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
>
> Actually, I take back this R-b, see below.
>
> In any case I'm not willing to apply the patches which depend on this
> until the corresponding SLOF update is merged as well.
As Nikunj mentioned, SLOF updates are already merged.
>
>> ---
>> hw/ppc/spapr_hcall.c | 8 ++++++++
>> include/hw/ppc/spapr.h | 4 +++-
>> 2 files changed, 11 insertions(+), 1 deletion(-)
>>
>> diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
>> index 72ea5a8..e66c72e 100644
>> --- a/hw/ppc/spapr_hcall.c
>> +++ b/hw/ppc/spapr_hcall.c
>> @@ -1062,6 +1062,13 @@ static target_ulong h_rtas(PowerPCCPU *cpu, sPAPRMachineState *spapr,
>> nret, rtas_r3 + 12 + 4*nargs);
>> }
>>
>> +static target_ulong h_rtas_update(PowerPCCPU *cpu, sPAPRMachineState *spapr,
>> + target_ulong opcode, target_ulong *args)
>> +{
>> + spapr->rtas_addr = args[0];
>> + return 0;
>> +}
>> +
>> static target_ulong h_logical_load(PowerPCCPU *cpu, sPAPRMachineState *spapr,
>> target_ulong opcode, target_ulong *args)
>> {
>> @@ -1717,6 +1724,7 @@ static void hypercall_register_types(void)
>>
>> /* qemu/KVM-PPC specific hcalls */
>> spapr_register_hypercall(KVMPPC_H_RTAS, h_rtas);
>> + spapr_register_hypercall(KVMPPC_H_RTAS_UPDATE, h_rtas_update);
>>
>> /* ibm,client-architecture-support support */
>> spapr_register_hypercall(KVMPPC_H_CAS, h_client_architecture_support);
>> diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
>> index 2a303a7..46012b3 100644
>> --- a/include/hw/ppc/spapr.h
>> +++ b/include/hw/ppc/spapr.h
>> @@ -90,6 +90,7 @@ struct sPAPRMachineState {
>>
>> hwaddr rma_size;
>> int vrma_adjust;
>> + hwaddr rtas_addr;
>
> This can now change at runtime, which means it needs to be migrated -
> that's not happening in your patches yet.
Yes. Need a bit of help in understanding the migration process.
As rtas_addr is updated by SLOF, I think we need to modify SLOF to issue
KVMPPC_H_RTAS_UPDATE HCALL with the new rtas_addr during migration. But
I am not sure if SLOF is notified of migrations.
Regards,
Aravinda
>
>> ssize_t rtas_size;
>> void *rtas_blob;
>> long kernel_size;
>> @@ -399,7 +400,8 @@ struct sPAPRMachineState {
>> #define KVMPPC_H_LOGICAL_MEMOP (KVMPPC_HCALL_BASE + 0x1)
>> /* Client Architecture support */
>> #define KVMPPC_H_CAS (KVMPPC_HCALL_BASE + 0x2)
>> -#define KVMPPC_HCALL_MAX KVMPPC_H_CAS
>> +#define KVMPPC_H_RTAS_UPDATE (KVMPPC_HCALL_BASE + 0x3)
>> +#define KVMPPC_HCALL_MAX KVMPPC_H_RTAS_UPDATE
>>
>> typedef struct sPAPRDeviceTreeUpdateHeader {
>> uint32_t version_id;
>>
>
--
Regards,
Aravinda
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [Qemu-devel] [PATCH v3 5/5] ppc: spapr: Enable FWNMI capability
2017-08-17 1:59 ` David Gibson
@ 2017-08-21 10:50 ` Aravinda Prasad
0 siblings, 0 replies; 31+ messages in thread
From: Aravinda Prasad @ 2017-08-21 10:50 UTC (permalink / raw)
To: David Gibson; +Cc: qemu-ppc, qemu-devel, aik, mahesh, benh, paulus, sam.bobroff
On Thursday 17 August 2017 07:29 AM, David Gibson wrote:
> On Wed, Aug 16, 2017 at 02:42:48PM +0530, Aravinda Prasad wrote:
>> Enable the KVM capability KVM_CAP_PPC_FWNMI so that
>> the KVM causes guest exit with NMI as exit reason
>> when it encounters a machine check exception on the
>> address belonging to a guest. Without this capability
>> enabled, KVM redirects machine check exceptions to
>> guest's 0x200 vector.
>>
>> Signed-off-by: Aravinda Prasad <aravinda@linux.vnet.ibm.com>
>> ---
>> hw/ppc/spapr_rtas.c | 17 +++++++++++++++++
>> target/ppc/kvm.c | 2 ++
>> 2 files changed, 19 insertions(+)
>>
>> diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c
>> index 2f3c47b..c2a361a 100644
>> --- a/hw/ppc/spapr_rtas.c
>> +++ b/hw/ppc/spapr_rtas.c
>> @@ -47,6 +47,8 @@
>> #include "trace.h"
>> #include "hw/ppc/fdt.h"
>>
>> +extern int cap_fwnmi;
>
> Ew. as the style checker will tell you, bare externs in .c files are
> frowned upon. And the cap_* variables xertainly shouldn't be exported
> from kvm.c.
Noted.
>
>> static void rtas_display_character(PowerPCCPU *cpu, sPAPRMachineState *spapr,
>> uint32_t token, uint32_t nargs,
>> target_ulong args,
>> @@ -354,7 +356,22 @@ static void rtas_ibm_nmi_register(PowerPCCPU *cpu,
>> target_ulong args,
>> uint32_t nret, target_ulong rets)
>> {
>> + int ret;
>> + CPUState *cs = CPU(cpu);
>> +
>> + if (!cap_fwnmi) {
>> + rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
>> + return;
>> + }
>> +
>> spapr->guest_machine_check_addr = rtas_ld(args, 1);
>> +
>> + ret = kvm_vcpu_enable_cap(cs, KVM_CAP_PPC_FWNMI, 0);
>> + if (ret < 0) {
>> + rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
>> + return;
>> + }
>> +
>
> Congratulations, you broke build on an x86 host. Things that directly
> call KVM need to go in kvm.c with suitable stubs for non-kvm builds.
Sure.
Regards,
Aravinda
>
>> rtas_st(rets, 0, RTAS_OUT_SUCCESS);
>> }
>>
>> diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
>> index 73f64ed..ca1ffa6 100644
>> --- a/target/ppc/kvm.c
>> +++ b/target/ppc/kvm.c
>> @@ -90,6 +90,7 @@ static int cap_htm; /* Hardware transactional memory support */
>> static int cap_mmu_radix;
>> static int cap_mmu_hash_v3;
>> static int cap_resize_hpt;
>> +int cap_fwnmi;
>>
>> static uint32_t debug_inst_opcode;
>>
>> @@ -147,6 +148,7 @@ int kvm_arch_init(MachineState *ms, KVMState *s)
>> cap_mmu_radix = kvm_vm_check_extension(s, KVM_CAP_PPC_MMU_RADIX);
>> cap_mmu_hash_v3 = kvm_vm_check_extension(s, KVM_CAP_PPC_MMU_HASH_V3);
>> cap_resize_hpt = kvm_vm_check_extension(s, KVM_CAP_SPAPR_RESIZE_HPT);
>> + cap_fwnmi = kvm_check_extension(s, KVM_CAP_PPC_FWNMI);
>>
>> if (!cap_interrupt_level) {
>> fprintf(stderr, "KVM: Couldn't find level irq capability. Expect the "
>>
>
--
Regards,
Aravinda
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [Qemu-devel] [PATCH v3 4/5] target/ppc: Handle NMI guest exit
2017-08-17 1:57 ` David Gibson
@ 2017-08-21 12:30 ` Aravinda Prasad
2017-08-23 8:39 ` David Gibson
0 siblings, 1 reply; 31+ messages in thread
From: Aravinda Prasad @ 2017-08-21 12:30 UTC (permalink / raw)
To: David Gibson; +Cc: qemu-ppc, qemu-devel, aik, mahesh, benh, paulus, sam.bobroff
On Thursday 17 August 2017 07:27 AM, David Gibson wrote:
> On Wed, Aug 16, 2017 at 02:42:39PM +0530, Aravinda Prasad wrote:
>> Memory error such as bit flips that cannot be corrected
>> by hardware are passed on to the kernel for handling.
>> If the memory address in error belongs to guest then
>> guest kernel is responsible for taking suitable action.
>> Patch [1] enhances KVM to exit guest with exit reason
>> set to KVM_EXIT_NMI in such cases.
>>
>> This patch handles KVM_EXIT_NMI exit. If the guest OS
>> has registered the machine check handling routine by
>> calling "ibm,nmi-register", then the handler builds
>> the error log and invokes the registered handler else
>> invokes the handler at 0x200.
>>
>> [1] https://www.spinics.net/lists/kvm-ppc/msg12637.html
>> (e20bbd3d and related commits)
>>
>> Signed-off-by: Aravinda Prasad <aravinda@linux.vnet.ibm.com>
>> ---
>> hw/ppc/spapr.c | 4 ++
>> target/ppc/kvm.c | 86 ++++++++++++++++++++++++++++++++++++++++++++++++++
>> target/ppc/kvm_ppc.h | 81 +++++++++++++++++++++++++++++++++++++++++++++++
>> 3 files changed, 171 insertions(+)
>>
>> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
>> index 0bb2c4a..6cc3f69 100644
>> --- a/hw/ppc/spapr.c
>> +++ b/hw/ppc/spapr.c
>> @@ -2346,6 +2346,10 @@ static void ppc_spapr_init(MachineState *machine)
>> error_report("Could not get size of LPAR rtas '%s'", filename);
>> exit(1);
>> }
>> +
>> + /* Resize blob to accommodate error log. */
>> + spapr->rtas_size = RTAS_ERRLOG_OFFSET + sizeof(struct RtasMCELog);
>> +
>> spapr->rtas_blob = g_malloc(spapr->rtas_size);
>> if (load_image_size(filename, spapr->rtas_blob, spapr->rtas_size) < 0) {
>> error_report("Could not load LPAR rtas '%s'", filename);
>> diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
>> index 8571379..73f64ed 100644
>> --- a/target/ppc/kvm.c
>> +++ b/target/ppc/kvm.c
>> @@ -1782,6 +1782,11 @@ int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
>> ret = 0;
>> break;
>>
>> + case KVM_EXIT_NMI:
>> + DPRINTF("handle NMI exception\n");
>> + ret = kvm_handle_nmi(cpu);
>> + break;
>> +
>> default:
>> fprintf(stderr, "KVM: unknown exit reason %d\n", run->exit_reason);
>> ret = -1;
>> @@ -2704,6 +2709,87 @@ int kvm_arch_msi_data_to_gsi(uint32_t data)
>> return data & 0xffff;
>> }
>>
>> +int kvm_handle_nmi(PowerPCCPU *cpu)
>
> So you only handle NMIs with KVM. Wouldn't it make sense to also
> handle them for TCG (where they can be triggered with the "nmi"
> command on the monitor).
For TCG it is already handled in spapr_nmi() which ultimately branches
to guest's 0x200 vector. Even with KVM when KVM_CAP_PPC_FWNMI is not
enabled we branch to guest's 0x200 vector. Should TCG behave as if
KVM_CAP_PPC_FWNMI is not enabled?
>
>> +{
>> + struct RtasMCELog mc_log;
>> + CPUPPCState *env = &cpu->env;
>> + sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
>> + PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
>> + target_ulong msr = 0;
>> +
>> + cpu_synchronize_state(CPU(cpu));
>> +
>> + /*
>> + * Properly set bits in MSR before we invoke the handler.
>> + * SRR0/1, DAR and DSISR are properly set by KVM
>> + */
>> + if (!(*pcc->interrupts_big_endian)(cpu)) {
>> + msr |= (1ULL << MSR_LE);
>> + }
>> +
>> + if (env->msr && (1ULL << MSR_SF)) {
>> + msr |= (1ULL << MSR_SF);
>> + }
>> +
>> + msr |= (1ULL << MSR_ME);
>> + env->msr = msr;
>> +
>> + if (!spapr->guest_machine_check_addr) {
>> + /*
>> + * If OS has not registered with "ibm,nmi-register"
>> + * jump to 0x200
>> + */
>> + env->nip = 0x200;
>> + return 0;
>> + }
>> +
>> + while (spapr->mc_in_progress) {
>> + /*
>> + * Check whether the same CPU got machine check error
>> + * while still handling the mc error (i.e., before
>> + * that CPU called "ibm,nmi-interlock"
>> + */
>> + if (spapr->mc_cpu == cpu->cpu_dt_id) {
>> + qemu_system_guest_panicked(NULL);
>> + }
>> + qemu_cond_wait_iothread(&spapr->mc_delivery_cond);
>> + }
>> + spapr->mc_in_progress = true;
>> + spapr->mc_cpu = cpu->cpu_dt_id;
>
> This will be merging against 2.11 and there are changes to the use of
> cpu_dt_id in the ppc-for-2.11 tree which you'll need to rebase on top
> of.
ok.
>
>> + /* Set error log fields */
>> + mc_log.r3 = env->gpr[3];
>> + mc_log.err_log.byte0 = 0;
>> + mc_log.err_log.byte1 =
>> + (RTAS_SEVERITY_ERROR_SYNC << RTAS_ELOG_SEVERITY_SHIFT);
>> + mc_log.err_log.byte1 |=
>> + (RTAS_DISP_NOT_RECOVERED << RTAS_ELOG_DISPOSITION_SHIFT);
>> + mc_log.err_log.byte2 =
>> + (RTAS_INITIATOR_MEMORY << RTAS_ELOG_INITIATOR_SHIFT);
>> + mc_log.err_log.byte2 |= RTAS_TARGET_MEMORY;
>> +
>> + if (env->spr[SPR_DSISR] & P7_DSISR_MC_UE) {
>> + mc_log.err_log.byte3 = RTAS_TYPE_ECC_UNCORR;
>> + } else {
>> + mc_log.err_log.byte3 = 0;
>> + }
>> +
>> + /* Handle all Host/Guest LE/BE combinations */
>> + if (env->msr & (1ULL << MSR_LE)) {
>> + mc_log.r3 = cpu_to_le64(mc_log.r3);
>> + } else {
>> + mc_log.r3 = cpu_to_be64(mc_log.r3);
>> + }
>
> So, the r3 field is guest order, but the rest is fixed BE order, is
> that right?
Yes, r3 field is guest order. For the rest it does not matter as the
these fields are just single bytes.
>
>
>> + cpu_physical_memory_write(spapr->rtas_addr + RTAS_ERRLOG_OFFSET,
>> + &mc_log, sizeof(mc_log));
>> +
>
> You never set extended_log_length, so it doesn't look like the whole
> structure is initialized.
According to PAPR, extended_log_length is valid only for version number
0x06 (the "byte0" member represents the version number). We don't use
extended event log and hence the version number is set to 0.
>
>> + env->nip = spapr->guest_machine_check_addr;
>> + env->gpr[3] = spapr->rtas_addr + RTAS_ERRLOG_OFFSET;
>
>
>
>> + return 0;
>> +}
>> +
>> int kvmppc_enable_hwrng(void)
>> {
>> if (!kvm_enabled() || !kvm_check_extension(kvm_state, KVM_CAP_PPC_HWRNG)) {
>> diff --git a/target/ppc/kvm_ppc.h b/target/ppc/kvm_ppc.h
>> index 6bc6fb3..bc8e3ce 100644
>> --- a/target/ppc/kvm_ppc.h
>> +++ b/target/ppc/kvm_ppc.h
>> @@ -70,6 +70,87 @@ void kvmppc_update_sdr1(target_ulong sdr1);
>>
>> bool kvmppc_is_mem_backend_page_size_ok(const char *obj_path);
>>
>> +int kvm_handle_nmi(PowerPCCPU *cpu);
>> +
>> +/* Offset from rtas-base where error log is placed */
>> +#define RTAS_ERRLOG_OFFSET 0x200
>> +
>> +#define RTAS_ELOG_SEVERITY_SHIFT 0x5
>> +#define RTAS_ELOG_DISPOSITION_SHIFT 0x3
>> +#define RTAS_ELOG_INITIATOR_SHIFT 0x4
>> +
>> +/*
>> + * Only required RTAS event severity, disposition, initiator
>> + * target and type are copied from arch/powerpc/include/asm/rtas.h
>> + */
>> +
>> +/* RTAS event severity */
>> +#define RTAS_SEVERITY_ERROR_SYNC 0x3
>> +
>> +/* RTAS event disposition */
>> +#define RTAS_DISP_NOT_RECOVERED 0x2
>> +
>> +/* RTAS event initiator */
>> +#define RTAS_INITIATOR_MEMORY 0x4
>> +
>> +/* RTAS event target */
>> +#define RTAS_TARGET_MEMORY 0x4
>> +
>> +/* RTAS event type */
>> +#define RTAS_TYPE_ECC_UNCORR 0x09
>> +
>> +/*
>> + * Currently KVM only passes on the uncorrected machine
>> + * check memory error to guest. Other machine check errors
>> + * such as SLB multi-hit and TLB multi-hit are recovered
>> + * in KVM and are not passed on to guest.
>> + *
>> + * DSISR Bit for uncorrected machine check error. Based
>> + * on arch/powerpc/include/asm/mce.h
>> + */
>> +#define PPC_BIT(bit) (0x8000000000000000ULL >> bit)
>> +#define P7_DSISR_MC_UE (PPC_BIT(48)) /* P8 too */
>> +
>> +/* Adopted from kernel source arch/powerpc/include/asm/rtas.h */
>> +struct rtas_error_log {
>
> There are already structures for rtas error logs in
> hw/ppc/spapr_events.c; those should be re-used. You can probably
> share some code to transfer log entries to the guest with correct
> endianness as well.
Sure. I will reuse. With those structures we need to take care of
endianness as the log is defined as two uint32_t members not individual
bytes.
struct rtas_error_log {
uint32_t summary;
uint32_t extended_length;
} QEMU_PACKED;
Regards,
Aravinda
>
>> + /* Byte 0 */
>> + uint8_t byte0; /* Architectural version */
>> +
>> + /* Byte 1 */
>> + uint8_t byte1;
>> + /* XXXXXXXX
>> + * XXX 3: Severity level of error
>> + * XX 2: Degree of recovery
>> + * X 1: Extended log present?
>> + * XX 2: Reserved
>> + */
>> +
>> + /* Byte 2 */
>> + uint8_t byte2;
>> + /* XXXXXXXX
>> + * XXXX 4: Initiator of event
>> + * XXXX 4: Target of failed operation
>> + */
>> + uint8_t byte3; /* General event or error*/
>> + __be32 extended_log_length; /* length in bytes */
>> + unsigned char buffer[1]; /* Start of extended log */
>> + /* Variable length. */
>> +};
>> +
>> +/*
>> + * Data format in RTAS-Blob
>> + *
>> + * This structure contains error information related to Machine
>> + * Check exception. This is filled up and copied to rtas-blob
>> + * upon machine check exception. The address of rtas-blob is
>> + * passed on to OS registered machine check notification
>> + * routines upon machine check exception
>> + */
>> +struct RtasMCELog {
>> + target_ulong r3;
>> + struct rtas_error_log err_log;
>> +};
>> +
>> #else
>>
>> static inline uint32_t kvmppc_get_tbfreq(void)
>>
>
--
Regards,
Aravinda
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [Qemu-devel] [PATCH v3 2/5] ppc: spapr: Handle "ibm, nmi-register" and "ibm, nmi-interlock" RTAS calls
2017-08-17 1:39 ` David Gibson
@ 2017-08-21 12:35 ` Aravinda Prasad
2017-08-22 2:08 ` David Gibson
0 siblings, 1 reply; 31+ messages in thread
From: Aravinda Prasad @ 2017-08-21 12:35 UTC (permalink / raw)
To: David Gibson; +Cc: qemu-ppc, qemu-devel, aik, mahesh, benh, paulus, sam.bobroff
On Thursday 17 August 2017 07:09 AM, David Gibson wrote:
> What's with the extra spaces in the subject line?
I don't see any. Can you pls point out?
>
> On Wed, Aug 16, 2017 at 02:42:21PM +0530, Aravinda Prasad wrote:
>> This patch adds support in QEMU to handle "ibm,nmi-register"
>> and "ibm,nmi-interlock" RTAS calls.
>>
>> The machine check notification address is saved when the
>> OS issues "ibm,nmi-register" RTAS call.
>>
>> This patch also handles the case when multiple processors
>> experience machine check at or about the same time by
>> handling "ibm,nmi-interlock" call. In such cases, as per
>> PAPR, subsequent processors serialize waiting for the first
>> processor to issue the "ibm,nmi-interlock" call. The second
>> processor waits till the first processor, which also
>> received a machine check error, is done reading the error
>> log. The first processor issues "ibm,nmi-interlock" call
>> when the error log is consumed. This patch implements the
>> releasing part of the error-log while subsequent patch
>> (which builds error log) handles the locking part.
>>
>> Signed-off-by: Aravinda Prasad <aravinda@linux.vnet.ibm.com>
>> ---
>> hw/ppc/spapr.c | 8 ++++++++
>> hw/ppc/spapr_rtas.c | 35 +++++++++++++++++++++++++++++++++++
>> include/hw/ppc/spapr.h | 10 +++++++++-
>> 3 files changed, 52 insertions(+), 1 deletion(-)
>>
>> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
>> index 2a3e53d..0bb2c4a 100644
>> --- a/hw/ppc/spapr.c
>> +++ b/hw/ppc/spapr.c
>> @@ -1441,6 +1441,11 @@ static void ppc_spapr_reset(void)
>> first_ppc_cpu->env.nip = SPAPR_ENTRY_POINT;
>>
>> spapr->cas_reboot = false;
>> +
>> + spapr->mc_in_progress = false;
>> + spapr->guest_machine_check_addr = 0;
>> + qemu_cond_destroy(&spapr->mc_delivery_cond);
>> + qemu_cond_init(&spapr->mc_delivery_cond);
>> }
>>
>> static void spapr_create_nvram(sPAPRMachineState *spapr)
>> @@ -2491,6 +2496,9 @@ static void ppc_spapr_init(MachineState *machine)
>>
>> kvmppc_spapr_enable_inkernel_multitce();
>> }
>> +
>> + spapr->mc_in_progress = false;
>> + qemu_cond_init(&spapr->mc_delivery_cond);
>> }
>>
>> static int spapr_kvm_type(const char *vm_type)
>> diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c
>> index 94a2799..2f3c47b 100644
>> --- a/hw/ppc/spapr_rtas.c
>> +++ b/hw/ppc/spapr_rtas.c
>> @@ -348,6 +348,37 @@ static void rtas_get_power_level(PowerPCCPU *cpu, sPAPRMachineState *spapr,
>> rtas_st(rets, 1, 100);
>> }
>>
>> +static void rtas_ibm_nmi_register(PowerPCCPU *cpu,
>> + sPAPRMachineState *spapr,
>> + uint32_t token, uint32_t nargs,
>> + target_ulong args,
>> + uint32_t nret, target_ulong rets)
>> +{
>> + spapr->guest_machine_check_addr = rtas_ld(args, 1);
>> + rtas_st(rets, 0, RTAS_OUT_SUCCESS);
>> +}
>> +
>> +static void rtas_ibm_nmi_interlock(PowerPCCPU *cpu,
>> + sPAPRMachineState *spapr,
>> + uint32_t token, uint32_t nargs,
>> + target_ulong args,
>> + uint32_t nret, target_ulong rets)
>> +{
>> + if (!spapr->guest_machine_check_addr) {
>> + /* NMI register not called */
>> + rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
>> + } else {
>> + /*
>> + * VCPU issuing "ibm,nmi-interlock" is done with NMI handling,
>> + * hence unset mc_in_progress.
>> + */
>> + spapr->mc_in_progress = false;
>> + qemu_cond_signal(&spapr->mc_delivery_cond);
>> + rtas_st(rets, 0, RTAS_OUT_SUCCESS);
>> + }
>> +}
>> +
>> +
>> static struct rtas_call {
>> const char *name;
>> spapr_rtas_fn fn;
>> @@ -489,6 +520,10 @@ static void core_rtas_register_types(void)
>> rtas_set_power_level);
>> spapr_rtas_register(RTAS_GET_POWER_LEVEL, "get-power-level",
>> rtas_get_power_level);
>> + spapr_rtas_register(RTAS_IBM_NMI_REGISTER, "ibm,nmi-register",
>> + rtas_ibm_nmi_register);
>> + spapr_rtas_register(RTAS_IBM_NMI_INTERLOCK, "ibm,nmi-interlock",
>> + rtas_ibm_nmi_interlock);
>> }
>>
>> type_init(core_rtas_register_types)
>> diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
>> index 46012b3..eee8d33 100644
>> --- a/include/hw/ppc/spapr.h
>> +++ b/include/hw/ppc/spapr.h
>> @@ -123,6 +123,12 @@ struct sPAPRMachineState {
>> * occurs during the unplug process. */
>> QTAILQ_HEAD(, sPAPRDIMMState) pending_dimm_unplugs;
>>
>> + /* State related to "ibm,nmi-register" and "ibm,nmi-interlock" calls */
>> + target_ulong guest_machine_check_addr;
>> + bool mc_in_progress;
>> + int mc_cpu;
>
> mc_cpu isn't actually used yet in this patch. In any case it and
> mc_in_progress could probably be folded together, no?
It is possible to fold mc_cpu and mc_in_progress together with the
convention that if it is set to -1 mc is not in progress otherwise it is
set to the CPU handling the mc.
>
> These values will also need to be migrated, AFAICT.
I am thinking of how to handle the migration when machine check handling
is in progress. Probably wait for machine check handling to complete
before migrating as the error could be irrelevant once migrated to a new
hardware. If that is the case we don't need to migrate these values.
Regards,
Aravinda
>
>> + QemuCond mc_delivery_cond;
>> +
>> /*< public >*/
>> char *kvm_type;
>> MemoryHotplugState hotplug_memory;
>> @@ -519,8 +525,10 @@ target_ulong spapr_hypercall(PowerPCCPU *cpu, target_ulong opcode,
>> #define RTAS_IBM_CREATE_PE_DMA_WINDOW (RTAS_TOKEN_BASE + 0x27)
>> #define RTAS_IBM_REMOVE_PE_DMA_WINDOW (RTAS_TOKEN_BASE + 0x28)
>> #define RTAS_IBM_RESET_PE_DMA_WINDOW (RTAS_TOKEN_BASE + 0x29)
>> +#define RTAS_IBM_NMI_REGISTER (RTAS_TOKEN_BASE + 0x2A)
>> +#define RTAS_IBM_NMI_INTERLOCK (RTAS_TOKEN_BASE + 0x2B)
>>
>> -#define RTAS_TOKEN_MAX (RTAS_TOKEN_BASE + 0x2A)
>> +#define RTAS_TOKEN_MAX (RTAS_TOKEN_BASE + 0x2C)
>>
>> /* RTAS ibm,get-system-parameter token values */
>> #define RTAS_SYSPARM_SPLPAR_CHARACTERISTICS 20
>>
>
--
Regards,
Aravinda
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [Qemu-devel] [PATCH v3 2/5] ppc: spapr: Handle "ibm, nmi-register" and "ibm, nmi-interlock" RTAS calls
2017-08-21 12:35 ` Aravinda Prasad
@ 2017-08-22 2:08 ` David Gibson
2017-08-22 7:12 ` Aravinda Prasad
2017-09-21 9:09 ` Aravinda Prasad
0 siblings, 2 replies; 31+ messages in thread
From: David Gibson @ 2017-08-22 2:08 UTC (permalink / raw)
To: Aravinda Prasad
Cc: qemu-ppc, qemu-devel, aik, mahesh, benh, paulus, sam.bobroff
[-- Attachment #1: Type: text/plain, Size: 7256 bytes --]
On Mon, Aug 21, 2017 at 06:05:34PM +0530, Aravinda Prasad wrote:
>
>
> On Thursday 17 August 2017 07:09 AM, David Gibson wrote:
> > What's with the extra spaces in the subject line?
>
> I don't see any. Can you pls point out?
I see "ibm, nmi-register" and "ibm, nmi-interlock"
>
> >
> > On Wed, Aug 16, 2017 at 02:42:21PM +0530, Aravinda Prasad wrote:
> >> This patch adds support in QEMU to handle "ibm,nmi-register"
> >> and "ibm,nmi-interlock" RTAS calls.
> >>
> >> The machine check notification address is saved when the
> >> OS issues "ibm,nmi-register" RTAS call.
> >>
> >> This patch also handles the case when multiple processors
> >> experience machine check at or about the same time by
> >> handling "ibm,nmi-interlock" call. In such cases, as per
> >> PAPR, subsequent processors serialize waiting for the first
> >> processor to issue the "ibm,nmi-interlock" call. The second
> >> processor waits till the first processor, which also
> >> received a machine check error, is done reading the error
> >> log. The first processor issues "ibm,nmi-interlock" call
> >> when the error log is consumed. This patch implements the
> >> releasing part of the error-log while subsequent patch
> >> (which builds error log) handles the locking part.
> >>
> >> Signed-off-by: Aravinda Prasad <aravinda@linux.vnet.ibm.com>
> >> ---
> >> hw/ppc/spapr.c | 8 ++++++++
> >> hw/ppc/spapr_rtas.c | 35 +++++++++++++++++++++++++++++++++++
> >> include/hw/ppc/spapr.h | 10 +++++++++-
> >> 3 files changed, 52 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> >> index 2a3e53d..0bb2c4a 100644
> >> --- a/hw/ppc/spapr.c
> >> +++ b/hw/ppc/spapr.c
> >> @@ -1441,6 +1441,11 @@ static void ppc_spapr_reset(void)
> >> first_ppc_cpu->env.nip = SPAPR_ENTRY_POINT;
> >>
> >> spapr->cas_reboot = false;
> >> +
> >> + spapr->mc_in_progress = false;
> >> + spapr->guest_machine_check_addr = 0;
> >> + qemu_cond_destroy(&spapr->mc_delivery_cond);
> >> + qemu_cond_init(&spapr->mc_delivery_cond);
> >> }
> >>
> >> static void spapr_create_nvram(sPAPRMachineState *spapr)
> >> @@ -2491,6 +2496,9 @@ static void ppc_spapr_init(MachineState *machine)
> >>
> >> kvmppc_spapr_enable_inkernel_multitce();
> >> }
> >> +
> >> + spapr->mc_in_progress = false;
> >> + qemu_cond_init(&spapr->mc_delivery_cond);
> >> }
> >>
> >> static int spapr_kvm_type(const char *vm_type)
> >> diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c
> >> index 94a2799..2f3c47b 100644
> >> --- a/hw/ppc/spapr_rtas.c
> >> +++ b/hw/ppc/spapr_rtas.c
> >> @@ -348,6 +348,37 @@ static void rtas_get_power_level(PowerPCCPU *cpu, sPAPRMachineState *spapr,
> >> rtas_st(rets, 1, 100);
> >> }
> >>
> >> +static void rtas_ibm_nmi_register(PowerPCCPU *cpu,
> >> + sPAPRMachineState *spapr,
> >> + uint32_t token, uint32_t nargs,
> >> + target_ulong args,
> >> + uint32_t nret, target_ulong rets)
> >> +{
> >> + spapr->guest_machine_check_addr = rtas_ld(args, 1);
> >> + rtas_st(rets, 0, RTAS_OUT_SUCCESS);
> >> +}
> >> +
> >> +static void rtas_ibm_nmi_interlock(PowerPCCPU *cpu,
> >> + sPAPRMachineState *spapr,
> >> + uint32_t token, uint32_t nargs,
> >> + target_ulong args,
> >> + uint32_t nret, target_ulong rets)
> >> +{
> >> + if (!spapr->guest_machine_check_addr) {
> >> + /* NMI register not called */
> >> + rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
> >> + } else {
> >> + /*
> >> + * VCPU issuing "ibm,nmi-interlock" is done with NMI handling,
> >> + * hence unset mc_in_progress.
> >> + */
> >> + spapr->mc_in_progress = false;
> >> + qemu_cond_signal(&spapr->mc_delivery_cond);
> >> + rtas_st(rets, 0, RTAS_OUT_SUCCESS);
> >> + }
> >> +}
> >> +
> >> +
> >> static struct rtas_call {
> >> const char *name;
> >> spapr_rtas_fn fn;
> >> @@ -489,6 +520,10 @@ static void core_rtas_register_types(void)
> >> rtas_set_power_level);
> >> spapr_rtas_register(RTAS_GET_POWER_LEVEL, "get-power-level",
> >> rtas_get_power_level);
> >> + spapr_rtas_register(RTAS_IBM_NMI_REGISTER, "ibm,nmi-register",
> >> + rtas_ibm_nmi_register);
> >> + spapr_rtas_register(RTAS_IBM_NMI_INTERLOCK, "ibm,nmi-interlock",
> >> + rtas_ibm_nmi_interlock);
> >> }
> >>
> >> type_init(core_rtas_register_types)
> >> diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
> >> index 46012b3..eee8d33 100644
> >> --- a/include/hw/ppc/spapr.h
> >> +++ b/include/hw/ppc/spapr.h
> >> @@ -123,6 +123,12 @@ struct sPAPRMachineState {
> >> * occurs during the unplug process. */
> >> QTAILQ_HEAD(, sPAPRDIMMState) pending_dimm_unplugs;
> >>
> >> + /* State related to "ibm,nmi-register" and "ibm,nmi-interlock" calls */
> >> + target_ulong guest_machine_check_addr;
> >> + bool mc_in_progress;
> >> + int mc_cpu;
> >
> > mc_cpu isn't actually used yet in this patch. In any case it and
> > mc_in_progress could probably be folded together, no?
>
> It is possible to fold mc_cpu and mc_in_progress together with the
> convention that if it is set to -1 mc is not in progress otherwise it is
> set to the CPU handling the mc.
>
> >
> > These values will also need to be migrated, AFAICT.
>
> I am thinking of how to handle the migration when machine check handling
> is in progress. Probably wait for machine check handling to complete
> before migrating as the error could be irrelevant once migrated to a new
> hardware. If that is the case we don't need to migrate these values.
Ok.
>
> Regards,
> Aravinda
>
> >
> >> + QemuCond mc_delivery_cond;
> >> +
> >> /*< public >*/
> >> char *kvm_type;
> >> MemoryHotplugState hotplug_memory;
> >> @@ -519,8 +525,10 @@ target_ulong spapr_hypercall(PowerPCCPU *cpu, target_ulong opcode,
> >> #define RTAS_IBM_CREATE_PE_DMA_WINDOW (RTAS_TOKEN_BASE + 0x27)
> >> #define RTAS_IBM_REMOVE_PE_DMA_WINDOW (RTAS_TOKEN_BASE + 0x28)
> >> #define RTAS_IBM_RESET_PE_DMA_WINDOW (RTAS_TOKEN_BASE + 0x29)
> >> +#define RTAS_IBM_NMI_REGISTER (RTAS_TOKEN_BASE + 0x2A)
> >> +#define RTAS_IBM_NMI_INTERLOCK (RTAS_TOKEN_BASE + 0x2B)
> >>
> >> -#define RTAS_TOKEN_MAX (RTAS_TOKEN_BASE + 0x2A)
> >> +#define RTAS_TOKEN_MAX (RTAS_TOKEN_BASE + 0x2C)
> >>
> >> /* RTAS ibm,get-system-parameter token values */
> >> #define RTAS_SYSPARM_SPLPAR_CHARACTERISTICS 20
> >>
> >
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [Qemu-devel] [PATCH v3 1/5] ppc: spapr: Register and handle HCALL to receive updated RTAS region
2017-08-21 9:42 ` Aravinda Prasad
@ 2017-08-22 3:33 ` David Gibson
2017-08-22 7:16 ` Aravinda Prasad
0 siblings, 1 reply; 31+ messages in thread
From: David Gibson @ 2017-08-22 3:33 UTC (permalink / raw)
To: Aravinda Prasad
Cc: Nikunj A. Dadhania, qemu-ppc, qemu-devel, aik, mahesh, benh,
paulus, sam.bobroff
[-- Attachment #1: Type: text/plain, Size: 3884 bytes --]
On Mon, Aug 21, 2017 at 03:12:49PM +0530, Aravinda Prasad wrote:
>
>
> On Thursday 17 August 2017 07:04 AM, David Gibson wrote:
> > On Wed, Aug 16, 2017 at 02:42:13PM +0530, Aravinda Prasad wrote:
> >> Receive updates from SLOF about the updated rtas-base.
> >> A separate patch for SLOF [1] adds functionality to invoke
> >> a private HCALL whenever OS issues instantiate-rtas with
> >> a new rtas-base.
> >>
> >> This is required as QEMU needs to know the updated rtas-base
> >> as it allocates error reporting structure in RTAS space upon
> >> a machine check exception.
> >>
> >> [1] https://lists.ozlabs.org/pipermail/linuxppc-dev/2014-August/120386.html
> >>
> >> Signed-off-by: Aravinda Prasad <aravinda@linux.vnet.ibm.com>
> >> Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
> >
> > Actually, I take back this R-b, see below.
> >
> > In any case I'm not willing to apply the patches which depend on this
> > until the corresponding SLOF update is merged as well.
>
> As Nikunj mentioned, SLOF updates are already merged.
In qemu as well as SLOF master, ok, good. Commit message could do
with updating to reflect that.
> >> hw/ppc/spapr_hcall.c | 8 ++++++++
> >> include/hw/ppc/spapr.h | 4 +++-
> >> 2 files changed, 11 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
> >> index 72ea5a8..e66c72e 100644
> >> --- a/hw/ppc/spapr_hcall.c
> >> +++ b/hw/ppc/spapr_hcall.c
> >> @@ -1062,6 +1062,13 @@ static target_ulong h_rtas(PowerPCCPU *cpu, sPAPRMachineState *spapr,
> >> nret, rtas_r3 + 12 + 4*nargs);
> >> }
> >>
> >> +static target_ulong h_rtas_update(PowerPCCPU *cpu, sPAPRMachineState *spapr,
> >> + target_ulong opcode, target_ulong *args)
> >> +{
> >> + spapr->rtas_addr = args[0];
> >> + return 0;
> >> +}
> >> +
> >> static target_ulong h_logical_load(PowerPCCPU *cpu, sPAPRMachineState *spapr,
> >> target_ulong opcode, target_ulong *args)
> >> {
> >> @@ -1717,6 +1724,7 @@ static void hypercall_register_types(void)
> >>
> >> /* qemu/KVM-PPC specific hcalls */
> >> spapr_register_hypercall(KVMPPC_H_RTAS, h_rtas);
> >> + spapr_register_hypercall(KVMPPC_H_RTAS_UPDATE, h_rtas_update);
> >>
> >> /* ibm,client-architecture-support support */
> >> spapr_register_hypercall(KVMPPC_H_CAS, h_client_architecture_support);
> >> diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
> >> index 2a303a7..46012b3 100644
> >> --- a/include/hw/ppc/spapr.h
> >> +++ b/include/hw/ppc/spapr.h
> >> @@ -90,6 +90,7 @@ struct sPAPRMachineState {
> >>
> >> hwaddr rma_size;
> >> int vrma_adjust;
> >> + hwaddr rtas_addr;
> >
> > This can now change at runtime, which means it needs to be migrated -
> > that's not happening in your patches yet.
>
> Yes. Need a bit of help in understanding the migration process.
>
> As rtas_addr is updated by SLOF, I think we need to modify SLOF to issue
> KVMPPC_H_RTAS_UPDATE HCALL with the new rtas_addr during migration. But
> I am not sure if SLOF is notified of migrations.
Uh.. no. By the time you're migrating chances are SLOF isn't even
running any more, and it wouldn't make sense for it to be aware of
migration anyway.
Instead we need to add the rtas_addr field to the vmstate information
for the spapr machine object. However, we can't just add it plain,
because that would break backwards migration. Instead we'll need to
add another sub-vmstate which will migrate rtas_addr if it differs
from the default value.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [Qemu-devel] [PATCH v3 2/5] ppc: spapr: Handle "ibm, nmi-register" and "ibm, nmi-interlock" RTAS calls
2017-08-22 2:08 ` David Gibson
@ 2017-08-22 7:12 ` Aravinda Prasad
2017-09-21 9:09 ` Aravinda Prasad
1 sibling, 0 replies; 31+ messages in thread
From: Aravinda Prasad @ 2017-08-22 7:12 UTC (permalink / raw)
To: David Gibson; +Cc: qemu-ppc, qemu-devel, aik, mahesh, benh, paulus, sam.bobroff
On Tuesday 22 August 2017 07:38 AM, David Gibson wrote:
> On Mon, Aug 21, 2017 at 06:05:34PM +0530, Aravinda Prasad wrote:
>>
>>
>> On Thursday 17 August 2017 07:09 AM, David Gibson wrote:
>>> What's with the extra spaces in the subject line?
>>
>> I don't see any. Can you pls point out?
>
> I see "ibm, nmi-register" and "ibm, nmi-interlock"
Ah.. space after comma. Will correct it.
Regards,
Aravinda
>
>>
>>>
>>> On Wed, Aug 16, 2017 at 02:42:21PM +0530, Aravinda Prasad wrote:
>>>> This patch adds support in QEMU to handle "ibm,nmi-register"
>>>> and "ibm,nmi-interlock" RTAS calls.
>>>>
>>>> The machine check notification address is saved when the
>>>> OS issues "ibm,nmi-register" RTAS call.
>>>>
>>>> This patch also handles the case when multiple processors
>>>> experience machine check at or about the same time by
>>>> handling "ibm,nmi-interlock" call. In such cases, as per
>>>> PAPR, subsequent processors serialize waiting for the first
>>>> processor to issue the "ibm,nmi-interlock" call. The second
>>>> processor waits till the first processor, which also
>>>> received a machine check error, is done reading the error
>>>> log. The first processor issues "ibm,nmi-interlock" call
>>>> when the error log is consumed. This patch implements the
>>>> releasing part of the error-log while subsequent patch
>>>> (which builds error log) handles the locking part.
>>>>
>>>> Signed-off-by: Aravinda Prasad <aravinda@linux.vnet.ibm.com>
>>>> ---
>>>> hw/ppc/spapr.c | 8 ++++++++
>>>> hw/ppc/spapr_rtas.c | 35 +++++++++++++++++++++++++++++++++++
>>>> include/hw/ppc/spapr.h | 10 +++++++++-
>>>> 3 files changed, 52 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
>>>> index 2a3e53d..0bb2c4a 100644
>>>> --- a/hw/ppc/spapr.c
>>>> +++ b/hw/ppc/spapr.c
>>>> @@ -1441,6 +1441,11 @@ static void ppc_spapr_reset(void)
>>>> first_ppc_cpu->env.nip = SPAPR_ENTRY_POINT;
>>>>
>>>> spapr->cas_reboot = false;
>>>> +
>>>> + spapr->mc_in_progress = false;
>>>> + spapr->guest_machine_check_addr = 0;
>>>> + qemu_cond_destroy(&spapr->mc_delivery_cond);
>>>> + qemu_cond_init(&spapr->mc_delivery_cond);
>>>> }
>>>>
>>>> static void spapr_create_nvram(sPAPRMachineState *spapr)
>>>> @@ -2491,6 +2496,9 @@ static void ppc_spapr_init(MachineState *machine)
>>>>
>>>> kvmppc_spapr_enable_inkernel_multitce();
>>>> }
>>>> +
>>>> + spapr->mc_in_progress = false;
>>>> + qemu_cond_init(&spapr->mc_delivery_cond);
>>>> }
>>>>
>>>> static int spapr_kvm_type(const char *vm_type)
>>>> diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c
>>>> index 94a2799..2f3c47b 100644
>>>> --- a/hw/ppc/spapr_rtas.c
>>>> +++ b/hw/ppc/spapr_rtas.c
>>>> @@ -348,6 +348,37 @@ static void rtas_get_power_level(PowerPCCPU *cpu, sPAPRMachineState *spapr,
>>>> rtas_st(rets, 1, 100);
>>>> }
>>>>
>>>> +static void rtas_ibm_nmi_register(PowerPCCPU *cpu,
>>>> + sPAPRMachineState *spapr,
>>>> + uint32_t token, uint32_t nargs,
>>>> + target_ulong args,
>>>> + uint32_t nret, target_ulong rets)
>>>> +{
>>>> + spapr->guest_machine_check_addr = rtas_ld(args, 1);
>>>> + rtas_st(rets, 0, RTAS_OUT_SUCCESS);
>>>> +}
>>>> +
>>>> +static void rtas_ibm_nmi_interlock(PowerPCCPU *cpu,
>>>> + sPAPRMachineState *spapr,
>>>> + uint32_t token, uint32_t nargs,
>>>> + target_ulong args,
>>>> + uint32_t nret, target_ulong rets)
>>>> +{
>>>> + if (!spapr->guest_machine_check_addr) {
>>>> + /* NMI register not called */
>>>> + rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
>>>> + } else {
>>>> + /*
>>>> + * VCPU issuing "ibm,nmi-interlock" is done with NMI handling,
>>>> + * hence unset mc_in_progress.
>>>> + */
>>>> + spapr->mc_in_progress = false;
>>>> + qemu_cond_signal(&spapr->mc_delivery_cond);
>>>> + rtas_st(rets, 0, RTAS_OUT_SUCCESS);
>>>> + }
>>>> +}
>>>> +
>>>> +
>>>> static struct rtas_call {
>>>> const char *name;
>>>> spapr_rtas_fn fn;
>>>> @@ -489,6 +520,10 @@ static void core_rtas_register_types(void)
>>>> rtas_set_power_level);
>>>> spapr_rtas_register(RTAS_GET_POWER_LEVEL, "get-power-level",
>>>> rtas_get_power_level);
>>>> + spapr_rtas_register(RTAS_IBM_NMI_REGISTER, "ibm,nmi-register",
>>>> + rtas_ibm_nmi_register);
>>>> + spapr_rtas_register(RTAS_IBM_NMI_INTERLOCK, "ibm,nmi-interlock",
>>>> + rtas_ibm_nmi_interlock);
>>>> }
>>>>
>>>> type_init(core_rtas_register_types)
>>>> diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
>>>> index 46012b3..eee8d33 100644
>>>> --- a/include/hw/ppc/spapr.h
>>>> +++ b/include/hw/ppc/spapr.h
>>>> @@ -123,6 +123,12 @@ struct sPAPRMachineState {
>>>> * occurs during the unplug process. */
>>>> QTAILQ_HEAD(, sPAPRDIMMState) pending_dimm_unplugs;
>>>>
>>>> + /* State related to "ibm,nmi-register" and "ibm,nmi-interlock" calls */
>>>> + target_ulong guest_machine_check_addr;
>>>> + bool mc_in_progress;
>>>> + int mc_cpu;
>>>
>>> mc_cpu isn't actually used yet in this patch. In any case it and
>>> mc_in_progress could probably be folded together, no?
>>
>> It is possible to fold mc_cpu and mc_in_progress together with the
>> convention that if it is set to -1 mc is not in progress otherwise it is
>> set to the CPU handling the mc.
>>
>>>
>>> These values will also need to be migrated, AFAICT.
>>
>> I am thinking of how to handle the migration when machine check handling
>> is in progress. Probably wait for machine check handling to complete
>> before migrating as the error could be irrelevant once migrated to a new
>> hardware. If that is the case we don't need to migrate these values.
>
> Ok.
>
>>
>> Regards,
>> Aravinda
>>
>>>
>>>> + QemuCond mc_delivery_cond;
>>>> +
>>>> /*< public >*/
>>>> char *kvm_type;
>>>> MemoryHotplugState hotplug_memory;
>>>> @@ -519,8 +525,10 @@ target_ulong spapr_hypercall(PowerPCCPU *cpu, target_ulong opcode,
>>>> #define RTAS_IBM_CREATE_PE_DMA_WINDOW (RTAS_TOKEN_BASE + 0x27)
>>>> #define RTAS_IBM_REMOVE_PE_DMA_WINDOW (RTAS_TOKEN_BASE + 0x28)
>>>> #define RTAS_IBM_RESET_PE_DMA_WINDOW (RTAS_TOKEN_BASE + 0x29)
>>>> +#define RTAS_IBM_NMI_REGISTER (RTAS_TOKEN_BASE + 0x2A)
>>>> +#define RTAS_IBM_NMI_INTERLOCK (RTAS_TOKEN_BASE + 0x2B)
>>>>
>>>> -#define RTAS_TOKEN_MAX (RTAS_TOKEN_BASE + 0x2A)
>>>> +#define RTAS_TOKEN_MAX (RTAS_TOKEN_BASE + 0x2C)
>>>>
>>>> /* RTAS ibm,get-system-parameter token values */
>>>> #define RTAS_SYSPARM_SPLPAR_CHARACTERISTICS 20
>>>>
>>>
>>
>
--
Regards,
Aravinda
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [Qemu-devel] [PATCH v3 1/5] ppc: spapr: Register and handle HCALL to receive updated RTAS region
2017-08-22 3:33 ` David Gibson
@ 2017-08-22 7:16 ` Aravinda Prasad
0 siblings, 0 replies; 31+ messages in thread
From: Aravinda Prasad @ 2017-08-22 7:16 UTC (permalink / raw)
To: David Gibson
Cc: Nikunj A. Dadhania, qemu-ppc, qemu-devel, aik, mahesh, benh,
paulus, sam.bobroff
On Tuesday 22 August 2017 09:03 AM, David Gibson wrote:
> On Mon, Aug 21, 2017 at 03:12:49PM +0530, Aravinda Prasad wrote:
>>
>>
>> On Thursday 17 August 2017 07:04 AM, David Gibson wrote:
>>> On Wed, Aug 16, 2017 at 02:42:13PM +0530, Aravinda Prasad wrote:
>>>> Receive updates from SLOF about the updated rtas-base.
>>>> A separate patch for SLOF [1] adds functionality to invoke
>>>> a private HCALL whenever OS issues instantiate-rtas with
>>>> a new rtas-base.
>>>>
>>>> This is required as QEMU needs to know the updated rtas-base
>>>> as it allocates error reporting structure in RTAS space upon
>>>> a machine check exception.
>>>>
>>>> [1] https://lists.ozlabs.org/pipermail/linuxppc-dev/2014-August/120386.html
>>>>
>>>> Signed-off-by: Aravinda Prasad <aravinda@linux.vnet.ibm.com>
>>>> Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
>>>
>>> Actually, I take back this R-b, see below.
>>>
>>> In any case I'm not willing to apply the patches which depend on this
>>> until the corresponding SLOF update is merged as well.
>>
>> As Nikunj mentioned, SLOF updates are already merged.
>
> In qemu as well as SLOF master, ok, good. Commit message could do
> with updating to reflect that.
Will update.
>
>>>> hw/ppc/spapr_hcall.c | 8 ++++++++
>>>> include/hw/ppc/spapr.h | 4 +++-
>>>> 2 files changed, 11 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
>>>> index 72ea5a8..e66c72e 100644
>>>> --- a/hw/ppc/spapr_hcall.c
>>>> +++ b/hw/ppc/spapr_hcall.c
>>>> @@ -1062,6 +1062,13 @@ static target_ulong h_rtas(PowerPCCPU *cpu, sPAPRMachineState *spapr,
>>>> nret, rtas_r3 + 12 + 4*nargs);
>>>> }
>>>>
>>>> +static target_ulong h_rtas_update(PowerPCCPU *cpu, sPAPRMachineState *spapr,
>>>> + target_ulong opcode, target_ulong *args)
>>>> +{
>>>> + spapr->rtas_addr = args[0];
>>>> + return 0;
>>>> +}
>>>> +
>>>> static target_ulong h_logical_load(PowerPCCPU *cpu, sPAPRMachineState *spapr,
>>>> target_ulong opcode, target_ulong *args)
>>>> {
>>>> @@ -1717,6 +1724,7 @@ static void hypercall_register_types(void)
>>>>
>>>> /* qemu/KVM-PPC specific hcalls */
>>>> spapr_register_hypercall(KVMPPC_H_RTAS, h_rtas);
>>>> + spapr_register_hypercall(KVMPPC_H_RTAS_UPDATE, h_rtas_update);
>>>>
>>>> /* ibm,client-architecture-support support */
>>>> spapr_register_hypercall(KVMPPC_H_CAS, h_client_architecture_support);
>>>> diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
>>>> index 2a303a7..46012b3 100644
>>>> --- a/include/hw/ppc/spapr.h
>>>> +++ b/include/hw/ppc/spapr.h
>>>> @@ -90,6 +90,7 @@ struct sPAPRMachineState {
>>>>
>>>> hwaddr rma_size;
>>>> int vrma_adjust;
>>>> + hwaddr rtas_addr;
>>>
>>> This can now change at runtime, which means it needs to be migrated -
>>> that's not happening in your patches yet.
>>
>> Yes. Need a bit of help in understanding the migration process.
>>
>> As rtas_addr is updated by SLOF, I think we need to modify SLOF to issue
>> KVMPPC_H_RTAS_UPDATE HCALL with the new rtas_addr during migration. But
>> I am not sure if SLOF is notified of migrations.
>
> Uh.. no. By the time you're migrating chances are SLOF isn't even
> running any more, and it wouldn't make sense for it to be aware of
> migration anyway.
>
> Instead we need to add the rtas_addr field to the vmstate information
> for the spapr machine object. However, we can't just add it plain,
> because that would break backwards migration. Instead we'll need to
> add another sub-vmstate which will migrate rtas_addr if it differs
> from the default value.
>
ok.
--
Regards,
Aravinda
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [Qemu-devel] [PATCH v3 0/5] target-ppc/spapr: Add FWNMI support in QEMU for PowerKVM guests
2017-08-21 9:10 ` Aravinda Prasad
@ 2017-08-23 0:43 ` David Gibson
0 siblings, 0 replies; 31+ messages in thread
From: David Gibson @ 2017-08-23 0:43 UTC (permalink / raw)
To: Aravinda Prasad
Cc: Sam Bobroff, qemu-ppc, qemu-devel, aik, mahesh, benh, paulus
[-- Attachment #1: Type: text/plain, Size: 2451 bytes --]
On Mon, Aug 21, 2017 at 02:40:17PM +0530, Aravinda Prasad wrote:
>
>
> On Thursday 17 August 2017 09:05 AM, Sam Bobroff wrote:
> > On Wed, Aug 16, 2017 at 02:41:59PM +0530, Aravinda Prasad wrote:
> >> This series of patches adds support for FWNMI in PowerKVM guests.
> >>
> >> Memory error such as bit flips that cannot be corrected
> >> by hardware is passed on to the kernel for handling
> >> by raising machine check exception (an NMI). Upon such
> >> machine check exception, if the address in error belongs
> >> to guest then KVM causes a guest exit with KVM_EXIT_NMI
> >> exit reason.
> >>
> >> This patch series adds functionality to pass on such
> >> machine check exception to the guest kernel by suitably
> >> handling KVM_EXIT_NMI exit and building the error log.
> >>
> >> The KVM changes are now part of the upstream kernel
> >> (commit e20bbd3d). This series contain QEMU changes.
> >
> > [snip]
> >
> > Hi,
> >
> > I'm concerned that this implementation may introduce a problem with
> > kexec. If a VM registers an NMI handler, then kexecs to a new kernel
> > and an NMI is received before the new kernel has registered it's
> > handler, won't QEMU cause the guest to jump to the old, now invalid,
> > handler address? Is this worth worrying about?
>
> I think there is a small time window till the kexec kernel registers a
> new handler during which NMI can branch to the old invalid address.
>
> Two points of interest. First, I did not find any "ibm,nmi-unregister"
> call. Hence, once the VM registers for NMI it cannot unregister it.
> Second, if kexec is triggered due to VM crash, then the guest will not
> get the opportunity to unregister NMI even in case something similar to
> "ibm,nmi-unregister" is available.
>
> Not sure if this is worth handling as machine check NMIs are rare, and
> getting a machine check NMI during that small time window is very
> rare.
I tend to agree. PAPR basically doesn't let us fix this, so crossing
our fingers and hoping not get an NMI in the window is about the best
we can do.
We could potentially define a way to unregister (e.g. passing 0,0 or
0x100,0x200 to nmi-register, maybe), but that can be an enhancement
for another day.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [Qemu-devel] [PATCH v3 4/5] target/ppc: Handle NMI guest exit
2017-08-21 12:30 ` Aravinda Prasad
@ 2017-08-23 8:39 ` David Gibson
2017-09-08 8:09 ` [Qemu-devel] [Qemu-ppc] " Aravinda Prasad
0 siblings, 1 reply; 31+ messages in thread
From: David Gibson @ 2017-08-23 8:39 UTC (permalink / raw)
To: Aravinda Prasad
Cc: qemu-ppc, qemu-devel, aik, mahesh, benh, paulus, sam.bobroff
[-- Attachment #1: Type: text/plain, Size: 3459 bytes --]
On Mon, Aug 21, 2017 at 06:00:52PM +0530, Aravinda Prasad wrote:
>
>
> On Thursday 17 August 2017 07:27 AM, David Gibson wrote:
> > On Wed, Aug 16, 2017 at 02:42:39PM +0530, Aravinda Prasad wrote:
> >> Memory error such as bit flips that cannot be corrected
> >> by hardware are passed on to the kernel for handling.
> >> If the memory address in error belongs to guest then
> >> guest kernel is responsible for taking suitable action.
> >> Patch [1] enhances KVM to exit guest with exit reason
> >> set to KVM_EXIT_NMI in such cases.
> >>
> >> This patch handles KVM_EXIT_NMI exit. If the guest OS
> >> has registered the machine check handling routine by
> >> calling "ibm,nmi-register", then the handler builds
> >> the error log and invokes the registered handler else
> >> invokes the handler at 0x200.
> >>
> >> [1] https://www.spinics.net/lists/kvm-ppc/msg12637.html
> >> (e20bbd3d and related commits)
> >>
> >> Signed-off-by: Aravinda Prasad <aravinda@linux.vnet.ibm.com>
> >> ---
> >> hw/ppc/spapr.c | 4 ++
> >> target/ppc/kvm.c | 86 ++++++++++++++++++++++++++++++++++++++++++++++++++
> >> target/ppc/kvm_ppc.h | 81 +++++++++++++++++++++++++++++++++++++++++++++++
> >> 3 files changed, 171 insertions(+)
> >>
> >> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> >> index 0bb2c4a..6cc3f69 100644
> >> --- a/hw/ppc/spapr.c
> >> +++ b/hw/ppc/spapr.c
> >> @@ -2346,6 +2346,10 @@ static void ppc_spapr_init(MachineState *machine)
> >> error_report("Could not get size of LPAR rtas '%s'", filename);
> >> exit(1);
> >> }
> >> +
> >> + /* Resize blob to accommodate error log. */
> >> + spapr->rtas_size = RTAS_ERRLOG_OFFSET + sizeof(struct RtasMCELog);
> >> +
> >> spapr->rtas_blob = g_malloc(spapr->rtas_size);
> >> if (load_image_size(filename, spapr->rtas_blob, spapr->rtas_size) < 0) {
> >> error_report("Could not load LPAR rtas '%s'", filename);
> >> diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
> >> index 8571379..73f64ed 100644
> >> --- a/target/ppc/kvm.c
> >> +++ b/target/ppc/kvm.c
> >> @@ -1782,6 +1782,11 @@ int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
> >> ret = 0;
> >> break;
> >>
> >> + case KVM_EXIT_NMI:
> >> + DPRINTF("handle NMI exception\n");
> >> + ret = kvm_handle_nmi(cpu);
> >> + break;
> >> +
> >> default:
> >> fprintf(stderr, "KVM: unknown exit reason %d\n", run->exit_reason);
> >> ret = -1;
> >> @@ -2704,6 +2709,87 @@ int kvm_arch_msi_data_to_gsi(uint32_t data)
> >> return data & 0xffff;
> >> }
> >>
> >> +int kvm_handle_nmi(PowerPCCPU *cpu)
> >
> > So you only handle NMIs with KVM. Wouldn't it make sense to also
> > handle them for TCG (where they can be triggered with the "nmi"
> > command on the monitor).
>
> For TCG it is already handled in spapr_nmi() which ultimately branches
> to guest's 0x200 vector. Even with KVM when KVM_CAP_PPC_FWNMI is not
> enabled we branch to guest's 0x200 vector. Should TCG behave as if
> KVM_CAP_PPC_FWNMI is not enabled?
No, we should implement the FWNMI feature for TCG, which means it
needs to respect the address given by nmi-register.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [Qemu-devel] [Qemu-ppc] [PATCH v3 4/5] target/ppc: Handle NMI guest exit
2017-08-23 8:39 ` David Gibson
@ 2017-09-08 8:09 ` Aravinda Prasad
2017-09-10 3:22 ` David Gibson
0 siblings, 1 reply; 31+ messages in thread
From: Aravinda Prasad @ 2017-09-08 8:09 UTC (permalink / raw)
To: David Gibson; +Cc: benh, mahesh, qemu-devel, qemu-ppc, paulus, sam.bobroff
On Wednesday 23 August 2017 02:09 PM, David Gibson wrote:
> On Mon, Aug 21, 2017 at 06:00:52PM +0530, Aravinda Prasad wrote:
>>
>>
>> On Thursday 17 August 2017 07:27 AM, David Gibson wrote:
>>> On Wed, Aug 16, 2017 at 02:42:39PM +0530, Aravinda Prasad wrote:
>>>> Memory error such as bit flips that cannot be corrected
>>>> by hardware are passed on to the kernel for handling.
>>>> If the memory address in error belongs to guest then
>>>> guest kernel is responsible for taking suitable action.
>>>> Patch [1] enhances KVM to exit guest with exit reason
>>>> set to KVM_EXIT_NMI in such cases.
>>>>
>>>> This patch handles KVM_EXIT_NMI exit. If the guest OS
>>>> has registered the machine check handling routine by
>>>> calling "ibm,nmi-register", then the handler builds
>>>> the error log and invokes the registered handler else
>>>> invokes the handler at 0x200.
>>>>
>>>> [1] https://www.spinics.net/lists/kvm-ppc/msg12637.html
>>>> (e20bbd3d and related commits)
>>>>
>>>> Signed-off-by: Aravinda Prasad <aravinda@linux.vnet.ibm.com>
>>>> ---
>>>> hw/ppc/spapr.c | 4 ++
>>>> target/ppc/kvm.c | 86 ++++++++++++++++++++++++++++++++++++++++++++++++++
>>>> target/ppc/kvm_ppc.h | 81 +++++++++++++++++++++++++++++++++++++++++++++++
>>>> 3 files changed, 171 insertions(+)
>>>>
>>>> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
>>>> index 0bb2c4a..6cc3f69 100644
>>>> --- a/hw/ppc/spapr.c
>>>> +++ b/hw/ppc/spapr.c
>>>> @@ -2346,6 +2346,10 @@ static void ppc_spapr_init(MachineState *machine)
>>>> error_report("Could not get size of LPAR rtas '%s'", filename);
>>>> exit(1);
>>>> }
>>>> +
>>>> + /* Resize blob to accommodate error log. */
>>>> + spapr->rtas_size = RTAS_ERRLOG_OFFSET + sizeof(struct RtasMCELog);
>>>> +
>>>> spapr->rtas_blob = g_malloc(spapr->rtas_size);
>>>> if (load_image_size(filename, spapr->rtas_blob, spapr->rtas_size) < 0) {
>>>> error_report("Could not load LPAR rtas '%s'", filename);
>>>> diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
>>>> index 8571379..73f64ed 100644
>>>> --- a/target/ppc/kvm.c
>>>> +++ b/target/ppc/kvm.c
>>>> @@ -1782,6 +1782,11 @@ int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
>>>> ret = 0;
>>>> break;
>>>>
>>>> + case KVM_EXIT_NMI:
>>>> + DPRINTF("handle NMI exception\n");
>>>> + ret = kvm_handle_nmi(cpu);
>>>> + break;
>>>> +
>>>> default:
>>>> fprintf(stderr, "KVM: unknown exit reason %d\n", run->exit_reason);
>>>> ret = -1;
>>>> @@ -2704,6 +2709,87 @@ int kvm_arch_msi_data_to_gsi(uint32_t data)
>>>> return data & 0xffff;
>>>> }
>>>>
>>>> +int kvm_handle_nmi(PowerPCCPU *cpu)
>>>
>>> So you only handle NMIs with KVM. Wouldn't it make sense to also
>>> handle them for TCG (where they can be triggered with the "nmi"
>>> command on the monitor).
>>
>> For TCG it is already handled in spapr_nmi() which ultimately branches
>> to guest's 0x200 vector. Even with KVM when KVM_CAP_PPC_FWNMI is not
>> enabled we branch to guest's 0x200 vector. Should TCG behave as if
>> KVM_CAP_PPC_FWNMI is not enabled?
>
> No, we should implement the FWNMI feature for TCG, which means it
> needs to respect the address given by nmi-register.
I have couple of questions regarding supporting NMIs triggered through
"nmi" command from the monitor.
1. The FWNNMI builds an error log upon machine check that includes the
effective address that triggered the machine check and places the error
log in RTAS blob. Hence, we need to build error log for the NMI
triggered via the monitor "nmi" command. What should be the effective
address and the other values of the error log in this case? Should "nmi"
command be enhanced to take these arguments (as of now it does not take
any arguments)?
2. On Power architecture "nmi" monitor command triggers NMI on all the
CPUs, while the NMI due to hardware error is triggered only on the CPU
that accessed the bad memory region. Triggering NMI on all the CPUs
could be a problem as it cause kernel panic if the CPU was in kernel
space at that time or kills the process running on that CPU if it was in
userspace.
--
Regards,
Aravinda
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [Qemu-devel] [Qemu-ppc] [PATCH v3 4/5] target/ppc: Handle NMI guest exit
2017-09-08 8:09 ` [Qemu-devel] [Qemu-ppc] " Aravinda Prasad
@ 2017-09-10 3:22 ` David Gibson
0 siblings, 0 replies; 31+ messages in thread
From: David Gibson @ 2017-09-10 3:22 UTC (permalink / raw)
To: Aravinda Prasad; +Cc: benh, mahesh, qemu-devel, qemu-ppc, paulus, sam.bobroff
[-- Attachment #1: Type: text/plain, Size: 5197 bytes --]
On Fri, Sep 08, 2017 at 01:39:37PM +0530, Aravinda Prasad wrote:
>
>
> On Wednesday 23 August 2017 02:09 PM, David Gibson wrote:
> > On Mon, Aug 21, 2017 at 06:00:52PM +0530, Aravinda Prasad wrote:
> >>
> >>
> >> On Thursday 17 August 2017 07:27 AM, David Gibson wrote:
> >>> On Wed, Aug 16, 2017 at 02:42:39PM +0530, Aravinda Prasad wrote:
> >>>> Memory error such as bit flips that cannot be corrected
> >>>> by hardware are passed on to the kernel for handling.
> >>>> If the memory address in error belongs to guest then
> >>>> guest kernel is responsible for taking suitable action.
> >>>> Patch [1] enhances KVM to exit guest with exit reason
> >>>> set to KVM_EXIT_NMI in such cases.
> >>>>
> >>>> This patch handles KVM_EXIT_NMI exit. If the guest OS
> >>>> has registered the machine check handling routine by
> >>>> calling "ibm,nmi-register", then the handler builds
> >>>> the error log and invokes the registered handler else
> >>>> invokes the handler at 0x200.
> >>>>
> >>>> [1] https://www.spinics.net/lists/kvm-ppc/msg12637.html
> >>>> (e20bbd3d and related commits)
> >>>>
> >>>> Signed-off-by: Aravinda Prasad <aravinda@linux.vnet.ibm.com>
> >>>> ---
> >>>> hw/ppc/spapr.c | 4 ++
> >>>> target/ppc/kvm.c | 86 ++++++++++++++++++++++++++++++++++++++++++++++++++
> >>>> target/ppc/kvm_ppc.h | 81 +++++++++++++++++++++++++++++++++++++++++++++++
> >>>> 3 files changed, 171 insertions(+)
> >>>>
> >>>> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> >>>> index 0bb2c4a..6cc3f69 100644
> >>>> --- a/hw/ppc/spapr.c
> >>>> +++ b/hw/ppc/spapr.c
> >>>> @@ -2346,6 +2346,10 @@ static void ppc_spapr_init(MachineState *machine)
> >>>> error_report("Could not get size of LPAR rtas '%s'", filename);
> >>>> exit(1);
> >>>> }
> >>>> +
> >>>> + /* Resize blob to accommodate error log. */
> >>>> + spapr->rtas_size = RTAS_ERRLOG_OFFSET + sizeof(struct RtasMCELog);
> >>>> +
> >>>> spapr->rtas_blob = g_malloc(spapr->rtas_size);
> >>>> if (load_image_size(filename, spapr->rtas_blob, spapr->rtas_size) < 0) {
> >>>> error_report("Could not load LPAR rtas '%s'", filename);
> >>>> diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
> >>>> index 8571379..73f64ed 100644
> >>>> --- a/target/ppc/kvm.c
> >>>> +++ b/target/ppc/kvm.c
> >>>> @@ -1782,6 +1782,11 @@ int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
> >>>> ret = 0;
> >>>> break;
> >>>>
> >>>> + case KVM_EXIT_NMI:
> >>>> + DPRINTF("handle NMI exception\n");
> >>>> + ret = kvm_handle_nmi(cpu);
> >>>> + break;
> >>>> +
> >>>> default:
> >>>> fprintf(stderr, "KVM: unknown exit reason %d\n", run->exit_reason);
> >>>> ret = -1;
> >>>> @@ -2704,6 +2709,87 @@ int kvm_arch_msi_data_to_gsi(uint32_t data)
> >>>> return data & 0xffff;
> >>>> }
> >>>>
> >>>> +int kvm_handle_nmi(PowerPCCPU *cpu)
> >>>
> >>> So you only handle NMIs with KVM. Wouldn't it make sense to also
> >>> handle them for TCG (where they can be triggered with the "nmi"
> >>> command on the monitor).
> >>
> >> For TCG it is already handled in spapr_nmi() which ultimately branches
> >> to guest's 0x200 vector. Even with KVM when KVM_CAP_PPC_FWNMI is not
> >> enabled we branch to guest's 0x200 vector. Should TCG behave as if
> >> KVM_CAP_PPC_FWNMI is not enabled?
> >
> > No, we should implement the FWNMI feature for TCG, which means it
> > needs to respect the address given by nmi-register.
>
> I have couple of questions regarding supporting NMIs triggered through
> "nmi" command from the monitor.
>
> 1. The FWNNMI builds an error log upon machine check that includes the
> effective address that triggered the machine check and places the error
> log in RTAS blob. Hence, we need to build error log for the NMI
> triggered via the monitor "nmi" command. What should be the effective
> address and the other values of the error log in this case? Should "nmi"
> command be enhanced to take these arguments (as of now it does not take
> any arguments)?
Ah! That's something I hadn't realised - sounds like FWNMI is only
designed to handle synchronous machine checks, whereas the monitor
command (obviously) generates asynchronous checks.
In that case it's probably reasonable that the monitor command doesn't
go through the FWNMI path. However, it would be nice to make it a bit
more obvious, by updating some of the comments and commit messages in
the FWNMI code to emphasise that it's only for synchronous checks.
> 2. On Power architecture "nmi" monitor command triggers NMI on all the
> CPUs, while the NMI due to hardware error is triggered only on the CPU
> that accessed the bad memory region. Triggering NMI on all the CPUs
> could be a problem as it cause kernel panic if the CPU was in kernel
> space at that time or kills the process running on that CPU if it was in
> userspace.
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [Qemu-devel] [PATCH v3 2/5] ppc: spapr: Handle "ibm, nmi-register" and "ibm, nmi-interlock" RTAS calls
2017-08-22 2:08 ` David Gibson
2017-08-22 7:12 ` Aravinda Prasad
@ 2017-09-21 9:09 ` Aravinda Prasad
2017-09-27 7:15 ` David Gibson
1 sibling, 1 reply; 31+ messages in thread
From: Aravinda Prasad @ 2017-09-21 9:09 UTC (permalink / raw)
To: David Gibson; +Cc: qemu-ppc, qemu-devel, aik, mahesh, benh, paulus, sam.bobroff
On Tuesday 22 August 2017 07:38 AM, David Gibson wrote:
[ . . . ]
>>>> diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
>>>> index 46012b3..eee8d33 100644
>>>> --- a/include/hw/ppc/spapr.h
>>>> +++ b/include/hw/ppc/spapr.h
>>>> @@ -123,6 +123,12 @@ struct sPAPRMachineState {
>>>> * occurs during the unplug process. */
>>>> QTAILQ_HEAD(, sPAPRDIMMState) pending_dimm_unplugs;
>>>>
>>>> + /* State related to "ibm,nmi-register" and "ibm,nmi-interlock" calls */
>>>> + target_ulong guest_machine_check_addr;
>>>> + bool mc_in_progress;
>>>> + int mc_cpu;
>>>
>>> mc_cpu isn't actually used yet in this patch. In any case it and
>>> mc_in_progress could probably be folded together, no?
>>
>> It is possible to fold mc_cpu and mc_in_progress together with the
>> convention that if it is set to -1 mc is not in progress otherwise it is
>> set to the CPU handling the mc.
>>
>>>
>>> These values will also need to be migrated, AFAICT.
>>
>> I am thinking of how to handle the migration when machine check handling
>> is in progress. Probably wait for machine check handling to complete
>> before migrating as the error could be irrelevant once migrated to a new
>> hardware. If that is the case we don't need to migrate these values.
>
> Ok.
This is what I think about handling machine check during migration based
on my understanding of the VM migration code.
There are two possibilities here. First, migration can be initiated
while the machine check handling is in progress. Second, A machine check
error can happen when the migration is in progress.
To handle the first case we can add migrate_add_blocker() call when we
start handling the machine check error and issue migrate_del_blocker()
when done. I think this should solve the issue.
The second case is bit tricky. The migration has already started and
hence migrate_add_blocker() call will fail. We also cannot wait till the
completion of the migration to handle machine check error as the VM's
data could be corrupt.
Machine check errors should not be an issue when the migration is in the
RAM copy phase as VM is still active with vCPUs running. The problem is
when we hit a machine check when the migration is about to complete. For
example,
1. vCPU2 hits a machine check error during migration.
2. KVM causes VM exit on vCPU2 and the NIP of vCPU2 is changed to the
guest registered machine check handler.
3. The migration_completion() issues vm_stop() and hence either vCPU2 is
never scheduled again on the source hardware or vCPU2 is preempted while
executing the machine check handler.
4. vCPU2 is resumed on the target hardware and either starts or
continues processing the machine check error. This could be a problem as
these errors are specific to the source hardware. For instance, when the
the guest issues memory poisoning upon such error, a clean page on the
target hardware is poisoned while the corrupt page on source hardware is
not poisoned.
The second case of hitting machine check during the final phase of
migration is rare but wanted to check what others think about it.
Regards,
Aravinda
>
>>
>> Regards,
>> Aravinda
>>
>>>
>>>> + QemuCond mc_delivery_cond;
>>>> +
>>>> /*< public >*/
>>>> char *kvm_type;
>>>> MemoryHotplugState hotplug_memory;
>>>> @@ -519,8 +525,10 @@ target_ulong spapr_hypercall(PowerPCCPU *cpu, target_ulong opcode,
>>>> #define RTAS_IBM_CREATE_PE_DMA_WINDOW (RTAS_TOKEN_BASE + 0x27)
>>>> #define RTAS_IBM_REMOVE_PE_DMA_WINDOW (RTAS_TOKEN_BASE + 0x28)
>>>> #define RTAS_IBM_RESET_PE_DMA_WINDOW (RTAS_TOKEN_BASE + 0x29)
>>>> +#define RTAS_IBM_NMI_REGISTER (RTAS_TOKEN_BASE + 0x2A)
>>>> +#define RTAS_IBM_NMI_INTERLOCK (RTAS_TOKEN_BASE + 0x2B)
>>>>
>>>> -#define RTAS_TOKEN_MAX (RTAS_TOKEN_BASE + 0x2A)
>>>> +#define RTAS_TOKEN_MAX (RTAS_TOKEN_BASE + 0x2C)
>>>>
>>>> /* RTAS ibm,get-system-parameter token values */
>>>> #define RTAS_SYSPARM_SPLPAR_CHARACTERISTICS 20
>>>>
>>>
>>
>
--
Regards,
Aravinda
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [Qemu-devel] [PATCH v3 2/5] ppc: spapr: Handle "ibm, nmi-register" and "ibm, nmi-interlock" RTAS calls
2017-09-21 9:09 ` Aravinda Prasad
@ 2017-09-27 7:15 ` David Gibson
2017-09-27 11:53 ` Aravinda Prasad
0 siblings, 1 reply; 31+ messages in thread
From: David Gibson @ 2017-09-27 7:15 UTC (permalink / raw)
To: Aravinda Prasad
Cc: qemu-ppc, qemu-devel, aik, mahesh, benh, paulus, sam.bobroff
[-- Attachment #1: Type: text/plain, Size: 4494 bytes --]
On Thu, Sep 21, 2017 at 02:39:06PM +0530, Aravinda Prasad wrote:
>
>
> On Tuesday 22 August 2017 07:38 AM, David Gibson wrote:
>
> [ . . . ]
>
> >>>> diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
> >>>> index 46012b3..eee8d33 100644
> >>>> --- a/include/hw/ppc/spapr.h
> >>>> +++ b/include/hw/ppc/spapr.h
> >>>> @@ -123,6 +123,12 @@ struct sPAPRMachineState {
> >>>> * occurs during the unplug process. */
> >>>> QTAILQ_HEAD(, sPAPRDIMMState) pending_dimm_unplugs;
> >>>>
> >>>> + /* State related to "ibm,nmi-register" and "ibm,nmi-interlock" calls */
> >>>> + target_ulong guest_machine_check_addr;
> >>>> + bool mc_in_progress;
> >>>> + int mc_cpu;
> >>>
> >>> mc_cpu isn't actually used yet in this patch. In any case it and
> >>> mc_in_progress could probably be folded together, no?
> >>
> >> It is possible to fold mc_cpu and mc_in_progress together with the
> >> convention that if it is set to -1 mc is not in progress otherwise it is
> >> set to the CPU handling the mc.
> >>
> >>>
> >>> These values will also need to be migrated, AFAICT.
> >>
> >> I am thinking of how to handle the migration when machine check handling
> >> is in progress. Probably wait for machine check handling to complete
> >> before migrating as the error could be irrelevant once migrated to a new
> >> hardware. If that is the case we don't need to migrate these values.
> >
> > Ok.
>
> This is what I think about handling machine check during migration based
> on my understanding of the VM migration code.
>
> There are two possibilities here. First, migration can be initiated
> while the machine check handling is in progress. Second, A machine check
> error can happen when the migration is in progress.
>
> To handle the first case we can add migrate_add_blocker() call when we
> start handling the machine check error and issue migrate_del_blocker()
> when done. I think this should solve the issue.
>
> The second case is bit tricky. The migration has already started and
> hence migrate_add_blocker() call will fail. We also cannot wait till the
> completion of the migration to handle machine check error as the VM's
> data could be corrupt.
>
> Machine check errors should not be an issue when the migration is in the
> RAM copy phase as VM is still active with vCPUs running. The problem is
> when we hit a machine check when the migration is about to complete. For
> example,
>
> 1. vCPU2 hits a machine check error during migration.
>
> 2. KVM causes VM exit on vCPU2 and the NIP of vCPU2 is changed to the
> guest registered machine check handler.
>
> 3. The migration_completion() issues vm_stop() and hence either vCPU2 is
> never scheduled again on the source hardware or vCPU2 is preempted while
> executing the machine check handler.
>
> 4. vCPU2 is resumed on the target hardware and either starts or
> continues processing the machine check error. This could be a problem as
> these errors are specific to the source hardware. For instance, when the
> the guest issues memory poisoning upon such error, a clean page on the
> target hardware is poisoned while the corrupt page on source hardware is
> not poisoned.
>
> The second case of hitting machine check during the final phase of
> migration is rare but wanted to check what others think about it.
So, I've had a bit of a think about this. I don't recall if these
fwnmi machine checks are expected on guest RAM, or guest IO addresses.
1) If RAM
What exactly is the guest's notification for? Even without
migration, the host's free to move guest memory around in host
memory, so it seems any hardware level poking should be done on the
host side.
Is it just to notify the guest that we weren't able to fully recover
on the host side and that page may contain corrupted data? If
that's so then it seems resuming the handling on the destination is
still right. It may be new good RAM, but the contents we migrated
could still be corrupt from the machine check event on the source.
2) If IO
AFAICT this could only happen with VFIO passthrough devices.. but it
shouldn't be possible to migrate if there are any of those.
Or have I missed something..
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [Qemu-devel] [PATCH v3 2/5] ppc: spapr: Handle "ibm, nmi-register" and "ibm, nmi-interlock" RTAS calls
2017-09-27 7:15 ` David Gibson
@ 2017-09-27 11:53 ` Aravinda Prasad
2017-09-28 3:58 ` David Gibson
0 siblings, 1 reply; 31+ messages in thread
From: Aravinda Prasad @ 2017-09-27 11:53 UTC (permalink / raw)
To: David Gibson; +Cc: qemu-ppc, qemu-devel, aik, mahesh, benh, paulus, sam.bobroff
On Wednesday 27 September 2017 12:45 PM, David Gibson wrote:
> On Thu, Sep 21, 2017 at 02:39:06PM +0530, Aravinda Prasad wrote:
>>
>>
>> On Tuesday 22 August 2017 07:38 AM, David Gibson wrote:
>>
>> [ . . . ]
>>
>>>>>> diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
>>>>>> index 46012b3..eee8d33 100644
>>>>>> --- a/include/hw/ppc/spapr.h
>>>>>> +++ b/include/hw/ppc/spapr.h
>>>>>> @@ -123,6 +123,12 @@ struct sPAPRMachineState {
>>>>>> * occurs during the unplug process. */
>>>>>> QTAILQ_HEAD(, sPAPRDIMMState) pending_dimm_unplugs;
>>>>>>
>>>>>> + /* State related to "ibm,nmi-register" and "ibm,nmi-interlock" calls */
>>>>>> + target_ulong guest_machine_check_addr;
>>>>>> + bool mc_in_progress;
>>>>>> + int mc_cpu;
>>>>>
>>>>> mc_cpu isn't actually used yet in this patch. In any case it and
>>>>> mc_in_progress could probably be folded together, no?
>>>>
>>>> It is possible to fold mc_cpu and mc_in_progress together with the
>>>> convention that if it is set to -1 mc is not in progress otherwise it is
>>>> set to the CPU handling the mc.
>>>>
>>>>>
>>>>> These values will also need to be migrated, AFAICT.
>>>>
>>>> I am thinking of how to handle the migration when machine check handling
>>>> is in progress. Probably wait for machine check handling to complete
>>>> before migrating as the error could be irrelevant once migrated to a new
>>>> hardware. If that is the case we don't need to migrate these values.
>>>
>>> Ok.
>>
>> This is what I think about handling machine check during migration based
>> on my understanding of the VM migration code.
>>
>> There are two possibilities here. First, migration can be initiated
>> while the machine check handling is in progress. Second, A machine check
>> error can happen when the migration is in progress.
>>
>> To handle the first case we can add migrate_add_blocker() call when we
>> start handling the machine check error and issue migrate_del_blocker()
>> when done. I think this should solve the issue.
>>
>> The second case is bit tricky. The migration has already started and
>> hence migrate_add_blocker() call will fail. We also cannot wait till the
>> completion of the migration to handle machine check error as the VM's
>> data could be corrupt.
>>
>> Machine check errors should not be an issue when the migration is in the
>> RAM copy phase as VM is still active with vCPUs running. The problem is
>> when we hit a machine check when the migration is about to complete. For
>> example,
>>
>> 1. vCPU2 hits a machine check error during migration.
>>
>> 2. KVM causes VM exit on vCPU2 and the NIP of vCPU2 is changed to the
>> guest registered machine check handler.
>>
>> 3. The migration_completion() issues vm_stop() and hence either vCPU2 is
>> never scheduled again on the source hardware or vCPU2 is preempted while
>> executing the machine check handler.
>>
>> 4. vCPU2 is resumed on the target hardware and either starts or
>> continues processing the machine check error. This could be a problem as
>> these errors are specific to the source hardware. For instance, when the
>> the guest issues memory poisoning upon such error, a clean page on the
>> target hardware is poisoned while the corrupt page on source hardware is
>> not poisoned.
>>
>> The second case of hitting machine check during the final phase of
>> migration is rare but wanted to check what others think about it.
>
> So, I've had a bit of a think about this. I don't recall if these
> fwnmi machine checks are expected on guest RAM, or guest IO addresses.
It is expected on guest RAM. I am not sure about guest IO address.
>
> 1) If RAM
>
> What exactly is the guest's notification for? Even without
> migration, the host's free to move guest memory around in host
> memory, so it seems any hardware level poking should be done on the
> host side.
If the error is a correctable error, then host takes care of it by
moving the page to a different location, the guest need not be and will
not be notified. Guest will be notified if host is not able to fully
recover. Hence we hit FWNMI in guest when RAM errors are not recovered
by the host.
>
> Is it just to notify the guest that we weren't able to fully recover
> on the host side and that page may contain corrupted data? If
> that's so then it seems resuming the handling on the destination is
> still right. It may be new good RAM, but the contents we migrated
> could still be corrupt from the machine check event on the source.
Yes. This is what I am doing in my v5 patch set which I am about to
post. Additionally I block migration when processing machine check errors.
>
> 2) If IO
>
> AFAICT this could only happen with VFIO passthrough devices.. but it
> shouldn't be possible to migrate if there are any of those.
>
I am not very sure about IO errors.
Regards,
Aravinda
> Or have I missed something..
>
--
Regards,
Aravinda
^ permalink raw reply [flat|nested] 31+ messages in thread
* Re: [Qemu-devel] [PATCH v3 2/5] ppc: spapr: Handle "ibm, nmi-register" and "ibm, nmi-interlock" RTAS calls
2017-09-27 11:53 ` Aravinda Prasad
@ 2017-09-28 3:58 ` David Gibson
0 siblings, 0 replies; 31+ messages in thread
From: David Gibson @ 2017-09-28 3:58 UTC (permalink / raw)
To: Aravinda Prasad
Cc: qemu-ppc, qemu-devel, aik, mahesh, benh, paulus, sam.bobroff
[-- Attachment #1: Type: text/plain, Size: 5575 bytes --]
On Wed, Sep 27, 2017 at 05:23:51PM +0530, Aravinda Prasad wrote:
>
>
> On Wednesday 27 September 2017 12:45 PM, David Gibson wrote:
> > On Thu, Sep 21, 2017 at 02:39:06PM +0530, Aravinda Prasad wrote:
> >>
> >>
> >> On Tuesday 22 August 2017 07:38 AM, David Gibson wrote:
> >>
> >> [ . . . ]
> >>
> >>>>>> diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
> >>>>>> index 46012b3..eee8d33 100644
> >>>>>> --- a/include/hw/ppc/spapr.h
> >>>>>> +++ b/include/hw/ppc/spapr.h
> >>>>>> @@ -123,6 +123,12 @@ struct sPAPRMachineState {
> >>>>>> * occurs during the unplug process. */
> >>>>>> QTAILQ_HEAD(, sPAPRDIMMState) pending_dimm_unplugs;
> >>>>>>
> >>>>>> + /* State related to "ibm,nmi-register" and "ibm,nmi-interlock" calls */
> >>>>>> + target_ulong guest_machine_check_addr;
> >>>>>> + bool mc_in_progress;
> >>>>>> + int mc_cpu;
> >>>>>
> >>>>> mc_cpu isn't actually used yet in this patch. In any case it and
> >>>>> mc_in_progress could probably be folded together, no?
> >>>>
> >>>> It is possible to fold mc_cpu and mc_in_progress together with the
> >>>> convention that if it is set to -1 mc is not in progress otherwise it is
> >>>> set to the CPU handling the mc.
> >>>>
> >>>>>
> >>>>> These values will also need to be migrated, AFAICT.
> >>>>
> >>>> I am thinking of how to handle the migration when machine check handling
> >>>> is in progress. Probably wait for machine check handling to complete
> >>>> before migrating as the error could be irrelevant once migrated to a new
> >>>> hardware. If that is the case we don't need to migrate these values.
> >>>
> >>> Ok.
> >>
> >> This is what I think about handling machine check during migration based
> >> on my understanding of the VM migration code.
> >>
> >> There are two possibilities here. First, migration can be initiated
> >> while the machine check handling is in progress. Second, A machine check
> >> error can happen when the migration is in progress.
> >>
> >> To handle the first case we can add migrate_add_blocker() call when we
> >> start handling the machine check error and issue migrate_del_blocker()
> >> when done. I think this should solve the issue.
> >>
> >> The second case is bit tricky. The migration has already started and
> >> hence migrate_add_blocker() call will fail. We also cannot wait till the
> >> completion of the migration to handle machine check error as the VM's
> >> data could be corrupt.
> >>
> >> Machine check errors should not be an issue when the migration is in the
> >> RAM copy phase as VM is still active with vCPUs running. The problem is
> >> when we hit a machine check when the migration is about to complete. For
> >> example,
> >>
> >> 1. vCPU2 hits a machine check error during migration.
> >>
> >> 2. KVM causes VM exit on vCPU2 and the NIP of vCPU2 is changed to the
> >> guest registered machine check handler.
> >>
> >> 3. The migration_completion() issues vm_stop() and hence either vCPU2 is
> >> never scheduled again on the source hardware or vCPU2 is preempted while
> >> executing the machine check handler.
> >>
> >> 4. vCPU2 is resumed on the target hardware and either starts or
> >> continues processing the machine check error. This could be a problem as
> >> these errors are specific to the source hardware. For instance, when the
> >> the guest issues memory poisoning upon such error, a clean page on the
> >> target hardware is poisoned while the corrupt page on source hardware is
> >> not poisoned.
> >>
> >> The second case of hitting machine check during the final phase of
> >> migration is rare but wanted to check what others think about it.
> >
> > So, I've had a bit of a think about this. I don't recall if these
> > fwnmi machine checks are expected on guest RAM, or guest IO addresses.
>
> It is expected on guest RAM. I am not sure about guest IO address.
>
> >
> > 1) If RAM
> >
> > What exactly is the guest's notification for? Even without
> > migration, the host's free to move guest memory around in host
> > memory, so it seems any hardware level poking should be done on the
> > host side.
>
> If the error is a correctable error, then host takes care of it by
> moving the page to a different location, the guest need not be and will
> not be notified. Guest will be notified if host is not able to fully
> recover. Hence we hit FWNMI in guest when RAM errors are not recovered
> by the host.
Ok.
> > Is it just to notify the guest that we weren't able to fully recover
> > on the host side and that page may contain corrupted data? If
> > that's so then it seems resuming the handling on the destination is
> > still right. It may be new good RAM, but the contents we migrated
> > could still be corrupt from the machine check event on the source.
>
> Yes. This is what I am doing in my v5 patch set which I am about to
> post. Additionally I block migration when processing machine check errors.
>
> >
> > 2) If IO
> >
> > AFAICT this could only happen with VFIO passthrough devices.. but it
> > shouldn't be possible to migrate if there are any of those.
> >
>
> I am not very sure about IO errors.
Ok. It sounds like that's not the primary case you're interested, so
I guess we can ignore it for now.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 31+ messages in thread
end of thread, other threads:[~2017-09-28 4:13 UTC | newest]
Thread overview: 31+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2017-08-16 9:11 [Qemu-devel] [PATCH v3 0/5] target-ppc/spapr: Add FWNMI support in QEMU for PowerKVM guests Aravinda Prasad
2017-08-16 9:12 ` [Qemu-devel] [PATCH v3 1/5] ppc: spapr: Register and handle HCALL to receive updated RTAS region Aravinda Prasad
2017-08-17 1:34 ` David Gibson
2017-08-17 10:27 ` Nikunj A Dadhania
2017-08-21 9:42 ` Aravinda Prasad
2017-08-22 3:33 ` David Gibson
2017-08-22 7:16 ` Aravinda Prasad
2017-08-16 9:12 ` [Qemu-devel] [PATCH v3 2/5] ppc: spapr: Handle "ibm, nmi-register" and "ibm, nmi-interlock" RTAS calls Aravinda Prasad
2017-08-17 1:39 ` David Gibson
2017-08-21 12:35 ` Aravinda Prasad
2017-08-22 2:08 ` David Gibson
2017-08-22 7:12 ` Aravinda Prasad
2017-09-21 9:09 ` Aravinda Prasad
2017-09-27 7:15 ` David Gibson
2017-09-27 11:53 ` Aravinda Prasad
2017-09-28 3:58 ` David Gibson
2017-08-16 9:12 ` [Qemu-devel] [PATCH v3 3/5] Wrapper function to wait on condition for the main loop mutex Aravinda Prasad
2017-08-16 9:12 ` [Qemu-devel] [PATCH v3 4/5] target/ppc: Handle NMI guest exit Aravinda Prasad
2017-08-17 1:57 ` David Gibson
2017-08-21 12:30 ` Aravinda Prasad
2017-08-23 8:39 ` David Gibson
2017-09-08 8:09 ` [Qemu-devel] [Qemu-ppc] " Aravinda Prasad
2017-09-10 3:22 ` David Gibson
2017-08-16 9:12 ` [Qemu-devel] [PATCH v3 5/5] ppc: spapr: Enable FWNMI capability Aravinda Prasad
2017-08-17 1:59 ` David Gibson
2017-08-21 10:50 ` Aravinda Prasad
2017-08-16 9:29 ` [Qemu-devel] [PATCH v3 0/5] target-ppc/spapr: Add FWNMI support in QEMU for PowerKVM guests no-reply
2017-08-16 9:40 ` no-reply
2017-08-17 3:35 ` Sam Bobroff
2017-08-21 9:10 ` Aravinda Prasad
2017-08-23 0:43 ` David Gibson
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