From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51680) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dnZce-0000FR-0u for qemu-devel@nongnu.org; Thu, 31 Aug 2017 20:15:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dnZcc-0004gj-MF for qemu-devel@nongnu.org; Thu, 31 Aug 2017 20:15:44 -0400 From: John Snow Date: Thu, 31 Aug 2017 20:14:56 -0400 Message-Id: <20170901001502.29915-4-jsnow@redhat.com> In-Reply-To: <20170901001502.29915-1-jsnow@redhat.com> References: <20170901001502.29915-1-jsnow@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH v3 3/9] IDE: add tracing for data ports List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-block@nongnu.org Cc: eblake@redhat.com, qemu-devel@nongnu.org, stefanha@redhat.com, f4bug@amsat.org, John Snow To be used sparingly, but still interesting in the case of small firmwares designed to reproduce bugs in QEMU IDE. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: John Snow --- hw/ide/core.c | 12 +++++++++++- hw/ide/trace-events | 5 +++++ 2 files changed, 16 insertions(+), 1 deletion(-) diff --git a/hw/ide/core.c b/hw/ide/core.c index cb250e6..82a19b1 100644 --- a/hw/ide/core.c +++ b/hw/ide/core.c @@ -2259,6 +2259,8 @@ void ide_data_writew(void *opaque, uint32_t addr, u= int32_t val) IDEState *s =3D idebus_active_if(bus); uint8_t *p; =20 + trace_ide_data_writew(addr, val, bus, s); + /* PIO data access allowed only when DRQ bit is set. The result of a= write * during PIO out is indeterminate, just ignore it. */ if (!(s->status & DRQ_STAT) || ide_is_pio_out(s)) { @@ -2304,6 +2306,8 @@ uint32_t ide_data_readw(void *opaque, uint32_t addr= ) s->status &=3D ~DRQ_STAT; s->end_transfer_func(s); } + + trace_ide_data_readw(addr, ret, bus, s); return ret; } =20 @@ -2313,6 +2317,8 @@ void ide_data_writel(void *opaque, uint32_t addr, u= int32_t val) IDEState *s =3D idebus_active_if(bus); uint8_t *p; =20 + trace_ide_data_writel(addr, val, bus, s); + /* PIO data access allowed only when DRQ bit is set. The result of a= write * during PIO out is indeterminate, just ignore it. */ if (!(s->status & DRQ_STAT) || ide_is_pio_out(s)) { @@ -2343,7 +2349,8 @@ uint32_t ide_data_readl(void *opaque, uint32_t addr= ) /* PIO data access allowed only when DRQ bit is set. The result of a= read * during PIO in is indeterminate, return 0 and don't move forward. = */ if (!(s->status & DRQ_STAT) || !ide_is_pio_out(s)) { - return 0; + ret =3D 0; + goto out; } =20 p =3D s->data_ptr; @@ -2358,6 +2365,9 @@ uint32_t ide_data_readl(void *opaque, uint32_t addr= ) s->status &=3D ~DRQ_STAT; s->end_transfer_func(s); } + +out: + trace_ide_data_readl(addr, ret, bus, s); return ret; } =20 diff --git a/hw/ide/trace-events b/hw/ide/trace-events index bff8f39..17bc6f1 100644 --- a/hw/ide/trace-events +++ b/hw/ide/trace-events @@ -6,6 +6,11 @@ ide_ioport_read(uint32_t addr, const char *reg, uint32_t= val, void *bus, void *s ide_ioport_write(uint32_t addr, const char *reg, uint32_t val, void *bus= , void *s) "IDE PIO wr @ 0x%"PRIx32" (%s); val 0x%02"PRIx32"; bus %p IDES= tate %p" ide_status_read(uint32_t addr, uint32_t val, void *bus, void *s) = "IDE PIO rd @ 0x%"PRIx32" (Alt Status); val 0x%02"PRIx32"; bus= %p; IDEState %p" ide_cmd_write(uint32_t addr, uint32_t val, void *bus) = "IDE PIO wr @ 0x%"PRIx32" (Device Control); val 0x%02"PRIx32";= bus %p" +# Warning: verbose +ide_data_readw(uint32_t addr, uint32_t val, void *bus, void *s) = "IDE PIO rd @ 0x%"PRIx32" (Data: Word); val 0x%04"PRIx32"; bus= %p; IDEState %p" +ide_data_writew(uint32_t addr, uint32_t val, void *bus, void *s) = "IDE PIO wr @ 0x%"PRIx32" (Data: Word); val 0x%04"PRIx32"; bus= %p; IDEState %p" +ide_data_readl(uint32_t addr, uint32_t val, void *bus, void *s) = "IDE PIO rd @ 0x%"PRIx32" (Data: Long); val 0x%08"PRIx32"; bus= %p; IDEState %p" +ide_data_writel(uint32_t addr, uint32_t val, void *bus, void *s) = "IDE PIO wr @ 0x%"PRIx32" (Data: Long); val 0x%08"PRIx32"; bus= %p; IDEState %p" # misc ide_exec_cmd(void *bus, void *state, uint32_t cmd) "IDE exec cmd: bus %p= ; state %p; cmd 0x%02x" ide_cancel_dma_sync_buffered(void *fn, void *req) "invoking cb %p of buf= fered request %p with -ECANCELED" --=20 2.9.5