From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, "Lluís Vilanova" <vilanova@ac.upc.edu>,
"Richard Henderson" <rth@twiddle.net>
Subject: [Qemu-devel] [PULL 14/32] target/i386: [tcg] Port to generic translation framework
Date: Wed, 6 Sep 2017 09:05:54 -0700 [thread overview]
Message-ID: <20170906160612.22769-15-richard.henderson@linaro.org> (raw)
In-Reply-To: <20170906160612.22769-1-richard.henderson@linaro.org>
From: Lluís Vilanova <vilanova@ac.upc.edu>
Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Emilio G. Cota <cota@braap.org>
Tested-by: Emilio G. Cota <cota@braap.org>
Message-Id: <150002267714.22386.5095442346868988808.stgit@frigg.lan>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
target/i386/translate.c | 106 +++++++++---------------------------------------
1 file changed, 19 insertions(+), 87 deletions(-)
diff --git a/target/i386/translate.c b/target/i386/translate.c
index ad4b2735f4..de0c989763 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -8450,6 +8450,10 @@ static int i386_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cpu,
return max_insns;
}
+static void i386_tr_tb_start(DisasContextBase *db, CPUState *cpu)
+{
+}
+
static void i386_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu)
{
DisasContext *dc = container_of(dcbase, DisasContext, base);
@@ -8469,7 +8473,7 @@ static bool i386_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cpu,
/* The address covered by the breakpoint must be included in
[tb->pc, tb->pc + tb->size) in order to for it to be
properly cleared -- thus we increment the PC here so that
- the logic setting tb->size below does the right thing. */
+ the generic logic setting tb->size later does the right thing. */
dc->base.pc_next += 1;
return true;
} else {
@@ -8533,94 +8537,22 @@ static void i386_tr_disas_log(const DisasContextBase *dcbase,
log_target_disas(cpu, dc->base.pc_first, dc->base.tb->size, disas_flags);
}
-/* generate intermediate code for basic block 'tb'. */
-void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
-{
- DisasContext dc1, *dc = &dc1;
- int num_insns;
- int max_insns;
-
- /* generate intermediate code */
- dc->base.singlestep_enabled = cs->singlestep_enabled;
- dc->base.tb = tb;
- dc->base.is_jmp = DISAS_NEXT;
- dc->base.pc_first = tb->pc;
- dc->base.pc_next = dc->base.pc_first;
-
- max_insns = tb->cflags & CF_COUNT_MASK;
- if (max_insns == 0) {
- max_insns = CF_COUNT_MASK;
- }
- if (max_insns > TCG_MAX_INSNS) {
- max_insns = TCG_MAX_INSNS;
- }
- max_insns = i386_tr_init_disas_context(&dc->base, cs, max_insns);
-
- num_insns = 0;
- gen_tb_start(tb);
- for(;;) {
- i386_tr_insn_start(&dc->base, cs);
- num_insns++;
-
- if (unlikely(!QTAILQ_EMPTY(&cs->breakpoints))) {
- CPUBreakpoint *bp;
- QTAILQ_FOREACH(bp, &cs->breakpoints, entry) {
- if (bp->pc == dc->base.pc_next) {
- if (i386_tr_breakpoint_check(&dc->base, cs, bp)) {
- break;
- }
- }
- }
-
- if (dc->base.is_jmp == DISAS_NORETURN) {
- break;
- }
- }
-
- if (num_insns == max_insns && (tb->cflags & CF_LAST_IO)) {
- gen_io_start();
- }
-
- i386_tr_translate_insn(&dc->base, cs);
- /* stop translation if indicated */
- if (dc->base.is_jmp) {
- break;
- }
- /* if single step mode, we generate only one instruction and
- generate an exception */
- if (dc->base.singlestep_enabled) {
- dc->base.is_jmp = DISAS_TOO_MANY;
- break;
- }
- /* if too long translation, stop generation too */
- if (tcg_op_buf_full() ||
- num_insns >= max_insns) {
- dc->base.is_jmp = DISAS_TOO_MANY;
- break;
- }
- if (singlestep) {
- dc->base.is_jmp = DISAS_TOO_MANY;
- break;
- }
- }
- i386_tr_tb_stop(&dc->base, cs);
- if (tb->cflags & CF_LAST_IO)
- gen_io_end();
- gen_tb_end(tb, num_insns);
+static const TranslatorOps i386_tr_ops = {
+ .init_disas_context = i386_tr_init_disas_context,
+ .tb_start = i386_tr_tb_start,
+ .insn_start = i386_tr_insn_start,
+ .breakpoint_check = i386_tr_breakpoint_check,
+ .translate_insn = i386_tr_translate_insn,
+ .tb_stop = i386_tr_tb_stop,
+ .disas_log = i386_tr_disas_log,
+};
- tb->size = dc->base.pc_next - dc->base.pc_first;
- tb->icount = num_insns;
+/* generate intermediate code for basic block 'tb'. */
+void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb)
+{
+ DisasContext dc;
-#ifdef DEBUG_DISAS
- if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)
- && qemu_log_in_addr_range(dc->base.pc_first)) {
- qemu_log_lock();
- qemu_log("----------------\n");
- i386_tr_disas_log(&dc->base, cs);
- qemu_log("\n");
- qemu_log_unlock();
- }
-#endif
+ translator_loop(&i386_tr_ops, &dc.base, cpu, tb);
}
void restore_state_to_opc(CPUX86State *env, TranslationBlock *tb,
--
2.13.5
next prev parent reply other threads:[~2017-09-06 16:06 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-06 16:05 [Qemu-devel] [PULL 00/32] tcg generic translate loop Richard Henderson
2017-09-06 16:05 ` [Qemu-devel] [PULL 01/32] tcg: Add generic DISAS_NORETURN Richard Henderson
2017-09-06 16:05 ` [Qemu-devel] [PULL 02/32] target/i386: Use generic DISAS_* enumerators Richard Henderson
2017-09-06 16:05 ` [Qemu-devel] [PULL 03/32] target/arm: Use DISAS_NORETURN Richard Henderson
2017-09-06 16:05 ` [Qemu-devel] [PULL 04/32] target: [tcg] Use a generic enum for DISAS_ values Richard Henderson
2017-09-06 16:05 ` [Qemu-devel] [PULL 05/32] target/arm: Delay check for magic kernel page Richard Henderson
2017-09-06 16:05 ` [Qemu-devel] [PULL 06/32] tcg: Add generic translation framework Richard Henderson
2017-09-06 16:05 ` [Qemu-devel] [PULL 07/32] target/i386: [tcg] Port to DisasContextBase Richard Henderson
2017-09-06 16:05 ` [Qemu-devel] [PULL 08/32] target/i386: [tcg] Port to init_disas_context Richard Henderson
2017-09-06 16:05 ` [Qemu-devel] [PULL 09/32] target/i386: [tcg] Port to insn_start Richard Henderson
2017-09-06 16:05 ` [Qemu-devel] [PULL 10/32] target/i386: [tcg] Port to breakpoint_check Richard Henderson
2017-09-06 16:05 ` [Qemu-devel] [PULL 11/32] target/i386: [tcg] Port to translate_insn Richard Henderson
2017-09-06 16:05 ` [Qemu-devel] [PULL 12/32] target/i386: [tcg] Port to tb_stop Richard Henderson
2017-09-06 16:05 ` [Qemu-devel] [PULL 13/32] target/i386: [tcg] Port to disas_log Richard Henderson
2017-09-06 16:05 ` Richard Henderson [this message]
2017-09-06 16:05 ` [Qemu-devel] [PULL 15/32] target/arm: [tcg] Port to DisasContextBase Richard Henderson
2017-09-06 16:05 ` [Qemu-devel] [PULL 16/32] target/arm: [tcg] Port to init_disas_context Richard Henderson
2017-09-06 16:05 ` [Qemu-devel] [PULL 17/32] target/arm: [tcg, a64] " Richard Henderson
2017-09-06 16:05 ` [Qemu-devel] [PULL 18/32] target/arm: [tcg] Port to tb_start Richard Henderson
2017-09-06 16:05 ` [Qemu-devel] [PULL 19/32] target/arm: [tcg] Port to insn_start Richard Henderson
2017-09-06 16:06 ` [Qemu-devel] [PULL 20/32] target/arm: [tcg, a64] " Richard Henderson
2017-09-06 16:06 ` [Qemu-devel] [PULL 21/32] target/arm: [tcg, a64] Port to breakpoint_check Richard Henderson
2017-09-06 16:06 ` [Qemu-devel] [PULL 22/32] target/arm: [tcg] Port to translate_insn Richard Henderson
2017-09-06 16:06 ` [Qemu-devel] [PULL 23/32] target/arm: [tcg, a64] " Richard Henderson
2017-09-06 16:06 ` [Qemu-devel] [PULL 24/32] target/arm: [tcg] Port to tb_stop Richard Henderson
2017-09-06 16:06 ` [Qemu-devel] [PULL 25/32] target/arm: [tcg,a64] " Richard Henderson
2017-09-06 16:06 ` [Qemu-devel] [PULL 26/32] target/arm: [tcg] Port to disas_log Richard Henderson
2017-09-06 16:06 ` [Qemu-devel] [PULL 27/32] target/arm: [tcg,a64] " Richard Henderson
2017-09-06 16:06 ` [Qemu-devel] [PULL 28/32] target/arm: [tcg] Port to generic translation framework Richard Henderson
2017-09-12 16:12 ` Laurent Desnogues
2017-09-12 16:37 ` Richard Henderson
2017-09-06 16:06 ` [Qemu-devel] [PULL 29/32] target/arm: [a64] Move page and ss checks to init_disas_context Richard Henderson
2017-09-06 16:06 ` [Qemu-devel] [PULL 30/32] target/arm: Move ss check " Richard Henderson
2017-09-06 16:06 ` [Qemu-devel] [PULL 31/32] target/arm: Split out thumb_tr_translate_insn Richard Henderson
2017-09-06 16:06 ` [Qemu-devel] [PULL 32/32] target/arm: Perform per-insn cross-page check only for Thumb Richard Henderson
2017-09-07 14:25 ` [Qemu-devel] [PULL 00/32] tcg generic translate loop Peter Maydell
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