From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, Richard Henderson <rth@twiddle.net>
Subject: [Qemu-devel] [PULL 16/23] tcg/arm: Tighten tlb indexing offset test
Date: Thu, 7 Sep 2017 15:40:44 -0700 [thread overview]
Message-ID: <20170907224051.21518-17-richard.henderson@linaro.org> (raw)
In-Reply-To: <20170907224051.21518-1-richard.henderson@linaro.org>
From: Richard Henderson <rth@twiddle.net>
We are not going to use ldrd for loading the comparator
for 32-bit guests, so don't limit cmp_off to 8 bits then.
This eliminates one insn in the tlb load for some guests.
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
tcg/arm/tcg-target.inc.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c
index 66c369c239..6c12b169ce 100644
--- a/tcg/arm/tcg-target.inc.c
+++ b/tcg/arm/tcg-target.inc.c
@@ -1202,7 +1202,9 @@ static TCGReg tcg_out_tlb_read(TCGContext *s, TCGReg addrlo, TCGReg addrhi,
}
/* We checked that the offset is contained within 16 bits above. */
- if (add_off > 0xfff || (use_armv6_instructions && cmp_off > 0xff)) {
+ if (add_off > 0xfff
+ || (use_armv6_instructions && TARGET_LONG_BITS == 64
+ && cmp_off > 0xff)) {
tcg_out_dat_imm(s, COND_AL, ARITH_ADD, TCG_REG_R2, base,
(24 << 7) | (cmp_off >> 8));
base = TCG_REG_R2;
--
2.13.5
next prev parent reply other threads:[~2017-09-07 22:41 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-07 22:40 [Qemu-devel] [PULL 00/23] tcg constant pools and USE_DIRECT_JUMP cleanup Richard Henderson
2017-09-07 22:40 ` [Qemu-devel] [PULL 01/23] tcg: Move USE_DIRECT_JUMP discriminator to tcg/cpu/tcg-target.h Richard Henderson
2017-09-07 22:40 ` [Qemu-devel] [PULL 02/23] tcg: Rearrange ldst label tracking Richard Henderson
2017-09-07 22:40 ` [Qemu-devel] [PULL 03/23] tcg: Infrastructure for managing constant pools Richard Henderson
2017-09-07 22:40 ` [Qemu-devel] [PULL 04/23] tcg/i386: Store out-of-range call targets in constant pool Richard Henderson
2017-09-07 22:40 ` [Qemu-devel] [PULL 05/23] tcg/s390: Introduce TCG_REG_TB Richard Henderson
2017-09-07 22:40 ` [Qemu-devel] [PULL 06/23] tcg/s390: Fix sign of patch_reloc addend Richard Henderson
2017-09-07 22:40 ` [Qemu-devel] [PULL 07/23] tcg/s390: Use constant pool for movi Richard Henderson
2017-09-07 22:40 ` [Qemu-devel] [PULL 08/23] tcg/s390: Use constant pool for andi Richard Henderson
2017-09-07 22:40 ` [Qemu-devel] [PULL 09/23] tcg/s390: Use constant pool for ori Richard Henderson
2017-09-07 22:40 ` [Qemu-devel] [PULL 10/23] tcg/s390: Use constant pool for xori Richard Henderson
2017-09-07 22:40 ` [Qemu-devel] [PULL 11/23] tcg/s390: Use constant pool for cmpi Richard Henderson
2017-09-07 22:40 ` [Qemu-devel] [PULL 12/23] tcg/aarch64: Use constant pool for movi Richard Henderson
2017-09-07 22:40 ` [Qemu-devel] [PULL 13/23] tcg/sparc: Introduce TCG_REG_TB Richard Henderson
2017-09-07 22:40 ` [Qemu-devel] [PULL 14/23] tcg/sparc: Use constant pool for movi Richard Henderson
2017-09-07 22:40 ` [Qemu-devel] [PULL 15/23] tcg/arm: Improve tlb load for armv7 Richard Henderson
2017-09-07 22:40 ` Richard Henderson [this message]
2017-09-07 22:40 ` [Qemu-devel] [PULL 17/23] tcg/arm: Code rearrangement Richard Henderson
2017-09-07 22:40 ` [Qemu-devel] [PULL 18/23] tcg/arm: Extract INSN_NOP Richard Henderson
2017-09-07 22:40 ` [Qemu-devel] [PULL 19/23] tcg/arm: Use constant pool for movi Richard Henderson
2017-09-07 22:40 ` [Qemu-devel] [PULL 20/23] tcg/arm: Use constant pool for call Richard Henderson
2017-09-07 22:40 ` [Qemu-devel] [PULL 21/23] tcg/ppc: Change TCG_REG_RA to TCG_REG_TB Richard Henderson
2017-09-07 22:40 ` [Qemu-devel] [PULL 22/23] tcg/ppc: Look for shifted constants Richard Henderson
2017-09-07 22:40 ` [Qemu-devel] [PULL 23/23] tcg/ppc: Use constant pool for movi Richard Henderson
2017-09-08 11:56 ` [Qemu-devel] [PULL 00/23] tcg constant pools and USE_DIRECT_JUMP cleanup Peter Maydell
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