From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: alex.bennee@linaro.org, f4bug@amsat.org
Subject: [Qemu-devel] [PATCH v3 0/6] TCG vectorization and example conversion
Date: Fri, 15 Sep 2017 19:34:11 -0700 [thread overview]
Message-ID: <20170916023417.14599-1-richard.henderson@linaro.org> (raw)
Now addressing the complex vector op issue. I now expose TCGv_vec
to target front-ends, but opaque wrt the vector size. One can thus
compose vector operations, as demonstrated in target/arm/.
The actual host vector length now becomes an argument to the *_vec
opcodes. It's a little awkward, but does prevent an explosion of
opcode values.
All R-b dropped because all patches rewritten or heavily modified.
Whacha think?
r~
Richard Henderson (6):
tcg: Add types and operations for host vectors
tcg: Add vector expanders
target/arm: Align vector registers
target/arm: Use vector infrastructure for aa64 add/sub/logic
tcg/i386: Add vector operations
tcg/aarch64: Add vector operations
Makefile.target | 2 +-
accel/tcg/tcg-runtime.h | 24 ++
target/arm/cpu.h | 2 +-
tcg/aarch64/tcg-target.h | 20 +-
tcg/i386/tcg-target.h | 36 +-
tcg/tcg-gvec-desc.h | 49 +++
tcg/tcg-op-gvec.h | 143 ++++++++
tcg/tcg-op.h | 26 ++
tcg/tcg-opc.h | 37 ++
tcg/tcg.h | 34 ++
accel/tcg/tcg-runtime-gvec.c | 255 +++++++++++++
target/arm/translate-a64.c | 216 +++++++----
tcg/aarch64/tcg-target.inc.c | 340 ++++++++++++++---
tcg/i386/tcg-target.inc.c | 423 ++++++++++++++++++---
tcg/tcg-op-gvec.c | 853 +++++++++++++++++++++++++++++++++++++++++++
tcg/tcg-op.c | 234 ++++++++++++
tcg/tcg.c | 77 +++-
accel/tcg/Makefile.objs | 2 +-
tcg/README | 46 +++
19 files changed, 2651 insertions(+), 168 deletions(-)
create mode 100644 tcg/tcg-gvec-desc.h
create mode 100644 tcg/tcg-op-gvec.h
create mode 100644 accel/tcg/tcg-runtime-gvec.c
create mode 100644 tcg/tcg-op-gvec.c
--
2.13.5
next reply other threads:[~2017-09-16 2:34 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-16 2:34 Richard Henderson [this message]
2017-09-16 2:34 ` [Qemu-devel] [PATCH v3 1/6] tcg: Add types and operations for host vectors Richard Henderson
2017-09-26 19:28 ` Alex Bennée
2017-09-27 16:18 ` Richard Henderson
2017-09-16 2:34 ` [Qemu-devel] [PATCH v3 2/6] tcg: Add vector expanders Richard Henderson
2017-09-26 22:31 ` Alex Bennée
2017-09-16 2:34 ` [Qemu-devel] [PATCH v3 3/6] target/arm: Align vector registers Richard Henderson
2017-09-26 22:33 ` Alex Bennée
2017-09-16 2:34 ` [Qemu-devel] [PATCH v3 4/6] target/arm: Use vector infrastructure for aa64 add/sub/logic Richard Henderson
2017-09-26 23:12 ` Alex Bennée
2017-09-16 2:34 ` [Qemu-devel] [PATCH v3 5/6] tcg/i386: Add vector operations Richard Henderson
2017-09-16 2:34 ` [Qemu-devel] [PATCH v3 6/6] tcg/aarch64: " Richard Henderson
2017-09-16 2:35 ` [Qemu-devel] [PATCH v3 0/6] TCG vectorization and example conversion Richard Henderson
2017-09-26 22:58 ` no-reply
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