From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: Igor Mammedov <imammedo@redhat.com>,
Eduardo Habkost <ehabkost@redhat.com>,
Aurelien Jarno <aurelien@aurel32.net>,
Yongbok Kim <yongbok.kim@imgtec.com>,
Marcel Apfelbaum <marcel@redhat.com>
Cc: qemu-devel@nongnu.org, "Hervé Poussineau" <hpoussin@reactos.org>,
"James Hogan" <james.hogan@imgtec.com>,
"Thomas Huth" <thuth@redhat.com>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [Qemu-devel] [PATCH v4 6/6] mips: replace cpu_mips_init() with cpu_generic_init()
Date: Wed, 20 Sep 2017 16:49:34 -0300 [thread overview]
Message-ID: <20170920194934.23071-7-f4bug@amsat.org> (raw)
In-Reply-To: <20170920194934.23071-1-f4bug@amsat.org>
From: Igor Mammedov <imammedo@redhat.com>
now cpu_mips_init() reimplements subset of cpu_generic_init()
tasks, so just drop it and use cpu_generic_init() directly.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Hervé Poussineau <hpoussin@reactos.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
[PMD: use internal.h instead of cpu.h]
Tested-by: James Hogan <james.hogan@imgtec.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
---
target/mips/cpu.h | 3 +--
hw/mips/cps.c | 2 +-
hw/mips/mips_fulong2e.c | 2 +-
hw/mips/mips_jazz.c | 2 +-
hw/mips/mips_malta.c | 2 +-
hw/mips/mips_mipssim.c | 2 +-
hw/mips/mips_r4k.c | 2 +-
target/mips/translate.c | 17 -----------------
8 files changed, 7 insertions(+), 25 deletions(-)
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 2f81e0f950..66265e4eb6 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -737,10 +737,9 @@ enum {
*/
#define CPU_INTERRUPT_WAKE CPU_INTERRUPT_TGT_INT_0
-MIPSCPU *cpu_mips_init(const char *cpu_model);
int cpu_mips_signal_handler(int host_signum, void *pinfo, void *puc);
-#define cpu_init(cpu_model) CPU(cpu_mips_init(cpu_model))
+#define cpu_init(cpu_model) cpu_generic_init(TYPE_MIPS_CPU, cpu_model)
bool cpu_supports_cps_smp(const char *cpu_model);
bool cpu_supports_isa(const char *cpu_model, unsigned int isa);
void cpu_set_exception_base(int vp_index, target_ulong address);
diff --git a/hw/mips/cps.c b/hw/mips/cps.c
index 79d4c5e30a..fe5c630af6 100644
--- a/hw/mips/cps.c
+++ b/hw/mips/cps.c
@@ -71,7 +71,7 @@ static void mips_cps_realize(DeviceState *dev, Error **errp)
bool itu_present = false;
for (i = 0; i < s->num_vp; i++) {
- cpu = cpu_mips_init(s->cpu_model);
+ cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, s->cpu_model));
/* Init internal devices */
cpu_mips_irq_init_cpu(cpu);
diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c
index 439a3d7a66..75318680e1 100644
--- a/hw/mips/mips_fulong2e.c
+++ b/hw/mips/mips_fulong2e.c
@@ -280,7 +280,7 @@ static void mips_fulong2e_init(MachineState *machine)
if (cpu_model == NULL) {
cpu_model = "Loongson-2E";
}
- cpu = cpu_mips_init(cpu_model);
+ cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
env = &cpu->env;
qemu_register_reset(main_cpu_reset, cpu);
diff --git a/hw/mips/mips_jazz.c b/hw/mips/mips_jazz.c
index ae10670efd..7e6626dc88 100644
--- a/hw/mips/mips_jazz.c
+++ b/hw/mips/mips_jazz.c
@@ -151,7 +151,7 @@ static void mips_jazz_init(MachineState *machine,
if (cpu_model == NULL) {
cpu_model = "R4000";
}
- cpu = cpu_mips_init(cpu_model);
+ cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
env = &cpu->env;
qemu_register_reset(main_cpu_reset, cpu);
diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
index e87cd3230b..2adb9bcf89 100644
--- a/hw/mips/mips_malta.c
+++ b/hw/mips/mips_malta.c
@@ -931,7 +931,7 @@ static void create_cpu_without_cps(const char *cpu_model,
int i;
for (i = 0; i < smp_cpus; i++) {
- cpu = cpu_mips_init(cpu_model);
+ cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
/* Init internal devices */
cpu_mips_irq_init_cpu(cpu);
diff --git a/hw/mips/mips_mipssim.c b/hw/mips/mips_mipssim.c
index 49cd38d680..a092072e2a 100644
--- a/hw/mips/mips_mipssim.c
+++ b/hw/mips/mips_mipssim.c
@@ -163,7 +163,7 @@ mips_mipssim_init(MachineState *machine)
cpu_model = "24Kf";
#endif
}
- cpu = cpu_mips_init(cpu_model);
+ cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
env = &cpu->env;
reset_info = g_malloc0(sizeof(ResetData));
diff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.c
index 7efee94431..1272d4ef9d 100644
--- a/hw/mips/mips_r4k.c
+++ b/hw/mips/mips_r4k.c
@@ -193,7 +193,7 @@ void mips_r4k_init(MachineState *machine)
cpu_model = "24Kf";
#endif
}
- cpu = cpu_mips_init(cpu_model);
+ cpu = MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model));
env = &cpu->env;
reset_info = g_malloc0(sizeof(ResetData));
diff --git a/target/mips/translate.c b/target/mips/translate.c
index f7128bc91d..d16d879df7 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -20523,23 +20523,6 @@ void cpu_mips_realize_env(CPUMIPSState *env)
mvp_init(env, env->cpu_model);
}
-MIPSCPU *cpu_mips_init(const char *cpu_model)
-{
- ObjectClass *oc;
- MIPSCPU *cpu;
-
- oc = cpu_class_by_name(TYPE_MIPS_CPU, cpu_model);
- if (oc == NULL) {
- return NULL;
- }
-
- cpu = MIPS_CPU(object_new(object_class_get_name(oc)));
-
- object_property_set_bool(OBJECT(cpu), true, "realized", NULL);
-
- return cpu;
-}
-
bool cpu_supports_cps_smp(const char *cpu_model)
{
const mips_def_t *def = cpu_mips_find_by_name(cpu_model);
--
2.14.1
next prev parent reply other threads:[~2017-09-20 19:50 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-20 19:49 [Qemu-devel] [PATCH v4 0/6] QOMify MIPS cpu Philippe Mathieu-Daudé
2017-09-20 19:49 ` [Qemu-devel] [PATCH v4 1/6] mips: move hw/mips/cputimer.c to target/mips/ Philippe Mathieu-Daudé
2017-09-20 19:49 ` [Qemu-devel] [PATCH v4 2/6] mips: introduce internal.h and cleanup cpu.h Philippe Mathieu-Daudé
2017-09-20 19:49 ` [Qemu-devel] [PATCH v4 3/6] mips: split cpu_mips_realize_env() out of cpu_mips_init() Philippe Mathieu-Daudé
2017-09-20 19:49 ` [Qemu-devel] [PATCH v4 4/6] mips: call cpu_mips_realize_env() from mips_cpu_realizefn() Philippe Mathieu-Daudé
2017-09-20 19:49 ` [Qemu-devel] [PATCH v4 5/6] mips: MIPSCPU model subclasses Philippe Mathieu-Daudé
2017-09-20 19:49 ` Philippe Mathieu-Daudé [this message]
2017-09-20 19:59 ` [Qemu-devel] [PATCH v4 0/6] QOMify MIPS cpu no-reply
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