From: John Snow <jsnow@redhat.com>
To: qemu-block@nongnu.org
Cc: mark.cave-ayland@ilande.co.uk, qemu-devel@nongnu.org,
John Snow <jsnow@redhat.com>
Subject: [Qemu-devel] [PATCH 2/2] ide: generic ide_data_write
Date: Wed, 20 Sep 2017 21:20:37 -0400 [thread overview]
Message-ID: <20170921012037.553-3-jsnow@redhat.com> (raw)
In-Reply-To: <20170921012037.553-1-jsnow@redhat.com>
Signed-off-by: John Snow <jsnow@redhat.com>
---
hw/ide/core.c | 86 +++++++++++++++++++++--------------------------
hw/ide/trace-events | 3 +-
include/hw/ide/internal.h | 1 +
3 files changed, 40 insertions(+), 50 deletions(-)
diff --git a/hw/ide/core.c b/hw/ide/core.c
index 393f523..af49de5 100644
--- a/hw/ide/core.c
+++ b/hw/ide/core.c
@@ -2266,6 +2266,42 @@ static bool ide_is_pio_out(IDEState *s)
abort();
}
+void ide_data_write(void *opaque, uint32_t addr, short nbytes, uint32_t val)
+{
+ IDEBus *bus = opaque;
+ IDEState *s = idebus_active_if(bus);
+ uint8_t *p;
+
+ trace_ide_data_write(addr, nbytes, val, bus, s);
+
+ /* PIO data access allowed only when DRQ bit is set. The result of a write
+ * during PIO out is indeterminate, just ignore it. */
+ if (!(s->status & DRQ_STAT) || ide_is_pio_out(s)) {
+ return;
+ }
+
+ if (nbytes != 2 && nbytes != 4) {
+ return;
+ }
+
+ p = s->data_ptr;
+ if (p + nbytes > s->data_end) {
+ return;
+ }
+
+ if (nbytes == 2) {
+ *(uint16_t *)p = le16_to_cpu(val);
+ } else if (nbytes == 4) {
+ *(uint32_t *)p = le32_to_cpu(val);
+ }
+ p += nbytes;
+ s->data_ptr = p;
+ if (p >= s->data_end) {
+ s->status &= ~DRQ_STAT;
+ s->end_transfer_func(s);
+ }
+}
+
uint32_t ide_data_read(void *opaque, uint32_t addr, short nbytes)
{
IDEBus *bus = opaque;
@@ -2311,30 +2347,7 @@ uint32_t ide_data_read(void *opaque, uint32_t addr, short nbytes)
void ide_data_writew(void *opaque, uint32_t addr, uint32_t val)
{
- IDEBus *bus = opaque;
- IDEState *s = idebus_active_if(bus);
- uint8_t *p;
-
- trace_ide_data_writew(addr, val, bus, s);
-
- /* PIO data access allowed only when DRQ bit is set. The result of a write
- * during PIO out is indeterminate, just ignore it. */
- if (!(s->status & DRQ_STAT) || ide_is_pio_out(s)) {
- return;
- }
-
- p = s->data_ptr;
- if (p + 2 > s->data_end) {
- return;
- }
-
- *(uint16_t *)p = le16_to_cpu(val);
- p += 2;
- s->data_ptr = p;
- if (p >= s->data_end) {
- s->status &= ~DRQ_STAT;
- s->end_transfer_func(s);
- }
+ return ide_data_write(opaque, addr, 2, val);
}
uint32_t ide_data_readw(void *opaque, uint32_t addr)
@@ -2344,30 +2357,7 @@ uint32_t ide_data_readw(void *opaque, uint32_t addr)
void ide_data_writel(void *opaque, uint32_t addr, uint32_t val)
{
- IDEBus *bus = opaque;
- IDEState *s = idebus_active_if(bus);
- uint8_t *p;
-
- trace_ide_data_writel(addr, val, bus, s);
-
- /* PIO data access allowed only when DRQ bit is set. The result of a write
- * during PIO out is indeterminate, just ignore it. */
- if (!(s->status & DRQ_STAT) || ide_is_pio_out(s)) {
- return;
- }
-
- p = s->data_ptr;
- if (p + 4 > s->data_end) {
- return;
- }
-
- *(uint32_t *)p = le32_to_cpu(val);
- p += 4;
- s->data_ptr = p;
- if (p >= s->data_end) {
- s->status &= ~DRQ_STAT;
- s->end_transfer_func(s);
- }
+ return ide_data_write(opaque, addr, 4, val);
}
uint32_t ide_data_readl(void *opaque, uint32_t addr)
diff --git a/hw/ide/trace-events b/hw/ide/trace-events
index e42c428..e92c0bb 100644
--- a/hw/ide/trace-events
+++ b/hw/ide/trace-events
@@ -7,9 +7,8 @@ ide_ioport_write(uint32_t addr, const char *reg, uint32_t val, void *bus, void *
ide_status_read(uint32_t addr, uint32_t val, void *bus, void *s) "IDE PIO rd @ 0x%"PRIx32" (Alt Status); val 0x%02"PRIx32"; bus %p; IDEState %p"
ide_cmd_write(uint32_t addr, uint32_t val, void *bus) "IDE PIO wr @ 0x%"PRIx32" (Device Control); val 0x%02"PRIx32"; bus %p"
# Warning: verbose
-ide_data_writew(uint32_t addr, uint32_t val, void *bus, void *s) "IDE PIO wr @ 0x%"PRIx32" (Data: Word); val 0x%04"PRIx32"; bus %p; IDEState %p"
-ide_data_writel(uint32_t addr, uint32_t val, void *bus, void *s) "IDE PIO wr @ 0x%"PRIx32" (Data: Long); val 0x%08"PRIx32"; bus %p; IDEState %p"
ide_data_read(uint32_t addr, short nbytes, uint32_t val, void *bus, void *s) "IDE PIO rd @ 0x%"PRIx32" (Data: %d bytes); val 0x%08"PRIx32"; bus %p; IDEState %p"
+ide_data_write(uint32_t addr, short nbytes, uint32_t val, void *bus, void *s) "IDE PIO wr @ 0x%"PRIx32" (Data: %d bytes); val 0x%08"PRIx32"; bus %p; IDEState %p"
# misc
ide_exec_cmd(void *bus, void *state, uint32_t cmd) "IDE exec cmd: bus %p; state %p; cmd 0x%02x"
diff --git a/include/hw/ide/internal.h b/include/hw/ide/internal.h
index 3159c66..deb592d 100644
--- a/include/hw/ide/internal.h
+++ b/include/hw/ide/internal.h
@@ -598,6 +598,7 @@ void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val);
uint32_t ide_ioport_read(void *opaque, uint32_t addr1);
uint32_t ide_status_read(void *opaque, uint32_t addr);
void ide_cmd_write(void *opaque, uint32_t addr, uint32_t val);
+void ide_data_write(void *opaque, uint32_t addr, short nbytes, uint32_t val);
void ide_data_writew(void *opaque, uint32_t addr, uint32_t val);
void ide_data_writel(void *opaque, uint32_t addr, uint32_t val);
uint32_t ide_data_read(void *opaque, uint32_t addr, short nbytes);
--
2.9.5
prev parent reply other threads:[~2017-09-21 1:20 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-21 1:20 [Qemu-devel] [PATCH 0/2] IDE: combine portio r/w functions John Snow
2017-09-21 1:20 ` [Qemu-devel] [PATCH 1/2] ide: generic ide_data_read John Snow
2017-09-21 1:20 ` John Snow [this message]
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