From: Cornelia Huck <cohuck@redhat.com>
To: David Hildenbrand <david@redhat.com>
Cc: Thomas Huth <thuth@redhat.com>,
qemu-devel@nongnu.org,
Christian Borntraeger <borntraeger@de.ibm.com>,
Alexander Graf <agraf@suse.de>,
Richard Henderson <richard.henderson@linaro.org>
Subject: Re: [Qemu-devel] [PATCH RFC 2/3] s390x/tcg: low-address protection support
Date: Fri, 29 Sep 2017 13:27:17 +0200 [thread overview]
Message-ID: <20170929132717.23ecf350.cohuck@redhat.com> (raw)
In-Reply-To: <3d5ea6d8-b3bf-b1a5-b4a1-082ff49ae842@redhat.com>
On Thu, 28 Sep 2017 15:08:11 +0200
David Hildenbrand <david@redhat.com> wrote:
> On 28.09.2017 06:50, Thomas Huth wrote:
> > On 27.09.2017 19:00, David Hildenbrand wrote:
> >> This is a neat way to implement low address protection, whereby
> >> only the first 512 bytes of the first two pages (each 4096 bytes) of
> >> every address space are protected.
> >>
> >> Store a tec of 0 for the access exception, this is what is defined by
> >> Enhanced Suppression on Protection in case of a low address protection
> >> (Bit 61 set to 0, rest undefined).
> >>
> >> We have to make sure to to pass the access address, not the masked page
> >> address into mmu_translate*().
> >>
> >> Drop the check from testblock. So we can properly test this via
> >> kvm-unit-tests.
> >>
> >> This will check every access going through one of the MMUs.
> >>
> >> Signed-off-by: David Hildenbrand <david@redhat.com>
> >> ---
> >> target/s390x/excp_helper.c | 3 +-
> >> target/s390x/mem_helper.c | 8 ----
> >> target/s390x/mmu_helper.c | 96 +++++++++++++++++++++++++++++-----------------
> >> 3 files changed, 62 insertions(+), 45 deletions(-)
> > [...]
> >> diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c
> >> index 9daa0fd8e2..44a15449d2 100644
> >> --- a/target/s390x/mmu_helper.c
> >> +++ b/target/s390x/mmu_helper.c
> >> @@ -106,6 +106,37 @@ static void trigger_page_fault(CPUS390XState *env, target_ulong vaddr,
> >> trigger_access_exception(env, type, ilen, tec);
> >> }
> >>
> >> +/* check whether the address would be proteted by Low-Address Protection */
> >> +static bool is_low_address(uint64_t addr)
> >> +{
> >> + return addr < 512 || (addr >= 4096 && addr < 4607);
> >> +}
> >
> > I like the check from the kernel sources better:
> >
> > static inline int is_low_address(unsigned long ga)
> > {
> > /* Check for address ranges 0..511 and 4096..4607 */
> > return (ga & ~0x11fful) == 0;
> > }
> >
> > ... that might result in slightly faster code (depending on the
> > compiler, of course).
>
> I think that lim (readability) -> 0. Without that comment you're at
> first sight really clueless what this is about.
>
> My check exactly corresponds to the wording in the PoP (and smart
> compilers should be able to optimize).
>
> But I don't have a strong opinion on this micro optimization.
FWIW, I'd be happy with both, but has anyone actually looked at the
generated code?
next prev parent reply other threads:[~2017-09-29 11:27 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-27 17:00 [Qemu-devel] [PATCH RFC 0/3] s390x/tcg: LAP support using immediate TLB invalidation David Hildenbrand
2017-09-27 17:00 ` [Qemu-devel] [PATCH RFC 1/3] accel/tcg: allow to invalidate a write TLB entry immediately David Hildenbrand
2017-09-27 17:48 ` Richard Henderson
2017-09-27 18:50 ` David Hildenbrand
2017-10-16 7:24 ` David Hildenbrand
2017-10-16 18:06 ` Richard Henderson
2017-09-27 17:00 ` [Qemu-devel] [PATCH RFC 2/3] s390x/tcg: low-address protection support David Hildenbrand
2017-09-27 17:51 ` Richard Henderson
2017-09-28 4:50 ` Thomas Huth
2017-09-28 13:08 ` David Hildenbrand
2017-09-29 11:27 ` Cornelia Huck [this message]
2017-10-12 8:41 ` Thomas Huth
2017-10-16 7:20 ` David Hildenbrand
2017-09-27 17:00 ` [Qemu-devel] [PATCH RFC 3/3] s390x/tcg: make STFL store into the lowcore David Hildenbrand
2017-09-27 17:52 ` Richard Henderson
2017-09-27 18:46 ` David Hildenbrand
2017-09-28 4:23 ` Thomas Huth
2017-09-29 12:43 ` Cornelia Huck
2017-09-29 11:49 ` [Qemu-devel] [PATCH RFC 0/3] s390x/tcg: LAP support using immediate TLB invalidation Cornelia Huck
2017-09-29 12:09 ` David Hildenbrand
2017-09-29 12:13 ` Cornelia Huck
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