* [Qemu-devel] [PATCH] hw/gen_pcie_root_port: properly set
@ 2017-10-02 10:31 Marcel Apfelbaum
2017-10-02 21:49 ` Laszlo Ersek
0 siblings, 1 reply; 3+ messages in thread
From: Marcel Apfelbaum @ 2017-10-02 10:31 UTC (permalink / raw)
To: qemu-devel; +Cc: marcel, mst
IO_LIMIT and IO_BASE registers should not be writable if
gen_pcie_root_port's io-reserve property is set to 0.
The COMMAND register should have the IO flag read only.
Signed-off-by: Marcel Apfelbaum <marcel@redhat.com>
---
hw/pci-bridge/gen_pcie_root_port.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/hw/pci-bridge/gen_pcie_root_port.c b/hw/pci-bridge/gen_pcie_root_port.c
index ed03ffc764..ad4e6aa7ff 100644
--- a/hw/pci-bridge/gen_pcie_root_port.c
+++ b/hw/pci-bridge/gen_pcie_root_port.c
@@ -85,6 +85,13 @@ static void gen_rp_realize(DeviceState *dev, Error **errp)
rpc->parent_class.exit(d);
return;
}
+
+ if (!grp->io_reserve) {
+ pci_word_test_and_clear_mask(d->wmask + PCI_COMMAND,
+ PCI_COMMAND_IO);
+ d->wmask[PCI_IO_BASE] = 0;
+ d->wmask[PCI_IO_LIMIT] = 0;
+ }
}
static const VMStateDescription vmstate_rp_dev = {
--
2.13.5
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [Qemu-devel] [PATCH] hw/gen_pcie_root_port: properly set
2017-10-02 10:31 [Qemu-devel] [PATCH] hw/gen_pcie_root_port: properly set Marcel Apfelbaum
@ 2017-10-02 21:49 ` Laszlo Ersek
2017-10-03 12:29 ` Marcel Apfelbaum
0 siblings, 1 reply; 3+ messages in thread
From: Laszlo Ersek @ 2017-10-02 21:49 UTC (permalink / raw)
To: Marcel Apfelbaum, qemu-devel; +Cc: mst
On 10/02/17 12:31, Marcel Apfelbaum wrote:
> IO_LIMIT and IO_BASE registers should not be writable if
> gen_pcie_root_port's io-reserve property is set to 0.
> The COMMAND register should have the IO flag read only.
>
>
> Signed-off-by: Marcel Apfelbaum <marcel@redhat.com>
> ---
> hw/pci-bridge/gen_pcie_root_port.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/hw/pci-bridge/gen_pcie_root_port.c b/hw/pci-bridge/gen_pcie_root_port.c
> index ed03ffc764..ad4e6aa7ff 100644
> --- a/hw/pci-bridge/gen_pcie_root_port.c
> +++ b/hw/pci-bridge/gen_pcie_root_port.c
> @@ -85,6 +85,13 @@ static void gen_rp_realize(DeviceState *dev, Error **errp)
> rpc->parent_class.exit(d);
> return;
> }
> +
> + if (!grp->io_reserve) {
> + pci_word_test_and_clear_mask(d->wmask + PCI_COMMAND,
> + PCI_COMMAND_IO);
> + d->wmask[PCI_IO_BASE] = 0;
> + d->wmask[PCI_IO_LIMIT] = 0;
> + }
> }
>
> static const VMStateDescription vmstate_rp_dev = {
>
The patch looks good to me (which doesn't mean much, honestly :) ), but
I think the subject line is truncated. You left off what exactly should
be set properly. (IO base, IO limit, and command registers, presumably.)
Thanks!
Laszlo
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [Qemu-devel] [PATCH] hw/gen_pcie_root_port: properly set
2017-10-02 21:49 ` Laszlo Ersek
@ 2017-10-03 12:29 ` Marcel Apfelbaum
0 siblings, 0 replies; 3+ messages in thread
From: Marcel Apfelbaum @ 2017-10-03 12:29 UTC (permalink / raw)
To: Laszlo Ersek, qemu-devel; +Cc: mst
On 03/10/2017 0:49, Laszlo Ersek wrote:
> On 10/02/17 12:31, Marcel Apfelbaum wrote:
>> IO_LIMIT and IO_BASE registers should not be writable if
>> gen_pcie_root_port's io-reserve property is set to 0.
>> The COMMAND register should have the IO flag read only.
>>
>>
>> Signed-off-by: Marcel Apfelbaum <marcel@redhat.com>
>> ---
>> hw/pci-bridge/gen_pcie_root_port.c | 7 +++++++
>> 1 file changed, 7 insertions(+)
>>
>> diff --git a/hw/pci-bridge/gen_pcie_root_port.c b/hw/pci-bridge/gen_pcie_root_port.c
>> index ed03ffc764..ad4e6aa7ff 100644
>> --- a/hw/pci-bridge/gen_pcie_root_port.c
>> +++ b/hw/pci-bridge/gen_pcie_root_port.c
>> @@ -85,6 +85,13 @@ static void gen_rp_realize(DeviceState *dev, Error **errp)
>> rpc->parent_class.exit(d);
>> return;
>> }
>> +
>> + if (!grp->io_reserve) {
>> + pci_word_test_and_clear_mask(d->wmask + PCI_COMMAND,
>> + PCI_COMMAND_IO);
>> + d->wmask[PCI_IO_BASE] = 0;
>> + d->wmask[PCI_IO_LIMIT] = 0;
>> + }
>> }
>>
>> static const VMStateDescription vmstate_rp_dev = {
>>
>
> The patch looks good to me (which doesn't mean much, honestly :) ), but
> I think the subject line is truncated. You left off what exactly should
> be set properly. (IO base, IO limit, and command registers, presumably.)
>
Strange, thanks for pointing it out.
I'll send a V2.
Thanks,
Marcel
> Thanks!
> Laszlo
>
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2017-10-03 12:29 UTC | newest]
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2017-10-02 10:31 [Qemu-devel] [PATCH] hw/gen_pcie_root_port: properly set Marcel Apfelbaum
2017-10-02 21:49 ` Laszlo Ersek
2017-10-03 12:29 ` Marcel Apfelbaum
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