From: Eduardo Habkost <ehabkost@redhat.com>
To: Alistair Francis <alistair.francis@xilinx.com>
Cc: qemu-devel@nongnu.org, alistair23@gmail.com, marcel@redhat.com,
imammedo@redhat.com, f4bug@amsat.org
Subject: Re: [Qemu-devel] [PATCH v1 3/5] xlnx-zcu102: Specify the valid CPUs
Date: Tue, 3 Oct 2017 17:36:54 -0300 [thread overview]
Message-ID: <20171003203654.GD4760@localhost.localdomain> (raw)
In-Reply-To: <2a93b997d0acd369f35d68981a23ba491443daf6.1507059418.git.alistair.francis@xilinx.com>
On Tue, Oct 03, 2017 at 01:05:13PM -0700, Alistair Francis wrote:
> List all possible valid CPU options.
>
> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
> ---
>
> hw/arm/xlnx-zcu102.c | 10 ++++++++++
> hw/arm/xlnx-zynqmp.c | 16 +++++++++-------
> include/hw/arm/xlnx-zynqmp.h | 1 +
> 3 files changed, 20 insertions(+), 7 deletions(-)
>
> diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c
> index 519a16ed98..039649e522 100644
> --- a/hw/arm/xlnx-zcu102.c
> +++ b/hw/arm/xlnx-zcu102.c
> @@ -98,6 +98,8 @@ static void xlnx_zynqmp_init(XlnxZCU102 *s, MachineState *machine)
> object_property_add_child(OBJECT(machine), "soc", OBJECT(&s->soc),
> &error_abort);
>
> + object_property_set_str(OBJECT(&s->soc), machine->cpu_type, "cpu-type",
> + &error_fatal);
Do you have plans to support other CPU types to xlnx_zynqmp in
the future? If not, I wouldn't bother adding the cpu-type
property and the extra boilerplate code if it's always going to
be set to cortex-a53.
> object_property_set_link(OBJECT(&s->soc), OBJECT(&s->ddr_ram),
> "ddr-ram", &error_abort);
> object_property_set_bool(OBJECT(&s->soc), s->secure, "secure",
> @@ -160,6 +162,10 @@ static void xlnx_zynqmp_init(XlnxZCU102 *s, MachineState *machine)
> arm_load_kernel(s->soc.boot_cpu_ptr, &xlnx_zcu102_binfo);
> }
>
> +const char *xlnx_zynqmp_valid_cpus[] = { ARM_CPU_TYPE_NAME("cortex-a53"),
> + NULL
> + };
> +
> static void xlnx_ep108_init(MachineState *machine)
> {
> XlnxZCU102 *s = EP108_MACHINE(machine);
> @@ -185,6 +191,8 @@ static void xlnx_ep108_machine_class_init(ObjectClass *oc, void *data)
> mc->block_default_type = IF_IDE;
> mc->units_per_default_bus = 1;
> mc->ignore_memory_transaction_failures = true;
> + mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a53");
> + mc->valid_cpu_types = xlnx_zynqmp_valid_cpus;
> }
>
> static const TypeInfo xlnx_ep108_machine_init_typeinfo = {
> @@ -240,6 +248,8 @@ static void xlnx_zcu102_machine_class_init(ObjectClass *oc, void *data)
> mc->block_default_type = IF_IDE;
> mc->units_per_default_bus = 1;
> mc->ignore_memory_transaction_failures = true;
> + mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a53");
> + mc->valid_cpu_types = xlnx_zynqmp_valid_cpus;
> }
>
> static const TypeInfo xlnx_zcu102_machine_init_typeinfo = {
> diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
> index 2b27daf51d..1bff099ec1 100644
> --- a/hw/arm/xlnx-zynqmp.c
> +++ b/hw/arm/xlnx-zynqmp.c
> @@ -133,13 +133,6 @@ static void xlnx_zynqmp_init(Object *obj)
> XlnxZynqMPState *s = XLNX_ZYNQMP(obj);
> int i;
>
> - for (i = 0; i < XLNX_ZYNQMP_NUM_APU_CPUS; i++) {
> - object_initialize(&s->apu_cpu[i], sizeof(s->apu_cpu[i]),
> - "cortex-a53-" TYPE_ARM_CPU);
> - object_property_add_child(obj, "apu-cpu[*]", OBJECT(&s->apu_cpu[i]),
> - &error_abort);
> - }
> -
> object_initialize(&s->gic, sizeof(s->gic), gic_class_name());
> qdev_set_parent_bus(DEVICE(&s->gic), sysbus_get_default());
>
> @@ -187,6 +180,14 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
> qemu_irq gic_spi[GIC_NUM_SPI_INTR];
> Error *err = NULL;
>
> + /* We need to do this here to ensure the cpu_type property is set. */
> + for (i = 0; i < XLNX_ZYNQMP_NUM_APU_CPUS; i++) {
> + object_initialize(&s->apu_cpu[i], sizeof(s->apu_cpu[i]),
> + s->cpu_type);
> + object_property_add_child(OBJECT(dev), "apu-cpu[*]", OBJECT(&s->apu_cpu[i]),
> + &error_abort);
> + }
> +
> ram_size = memory_region_size(s->ddr_ram);
>
> /* Create the DDR Memory Regions. User friendly checks should happen at
> @@ -425,6 +426,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
> }
>
> static Property xlnx_zynqmp_props[] = {
> + DEFINE_PROP_STRING("cpu-type", XlnxZynqMPState, cpu_type),
> DEFINE_PROP_STRING("boot-cpu", XlnxZynqMPState, boot_cpu),
> DEFINE_PROP_BOOL("secure", XlnxZynqMPState, secure, false),
> DEFINE_PROP_BOOL("virtualization", XlnxZynqMPState, virt, false),
> diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h
> index 6eff81a995..5afb8de11e 100644
> --- a/include/hw/arm/xlnx-zynqmp.h
> +++ b/include/hw/arm/xlnx-zynqmp.h
> @@ -86,6 +86,7 @@ typedef struct XlnxZynqMPState {
> XlnxDPState dp;
> XlnxDPDMAState dpdma;
>
> + char *cpu_type;
> char *boot_cpu;
> ARMCPU *boot_cpu_ptr;
>
> --
> 2.11.0
>
--
Eduardo
next prev parent reply other threads:[~2017-10-03 20:37 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-03 20:05 [Qemu-devel] [PATCH v1 0/5] Add a valid_cpu_types property Alistair Francis
2017-10-03 20:05 ` [Qemu-devel] [PATCH v1 1/5] machine: " Alistair Francis
2017-10-03 20:23 ` Eduardo Habkost
2017-10-03 20:26 ` Alistair Francis
2017-10-03 20:33 ` Eduardo Habkost
2017-10-03 21:37 ` Alistair Francis
2017-10-03 20:05 ` [Qemu-devel] [PATCH v1 2/5] netduino2: Specify the valid CPUs Alistair Francis
2017-10-03 20:28 ` Eduardo Habkost
2017-10-03 22:05 ` Philippe Mathieu-Daudé
2017-10-04 11:02 ` Igor Mammedov
2017-10-04 21:43 ` Alistair Francis
2017-10-04 22:21 ` Philippe Mathieu-Daudé
2017-10-05 8:38 ` Igor Mammedov
2017-10-03 20:05 ` [Qemu-devel] [PATCH v1 4/5] xilinx_zynq: : " Alistair Francis
2017-10-03 22:07 ` Philippe Mathieu-Daudé
2017-10-03 20:05 ` [Qemu-devel] [PATCH v1 5/5] raspi: " Alistair Francis
2017-10-03 20:39 ` Eduardo Habkost
2017-10-03 21:36 ` Alistair Francis
2017-10-03 22:18 ` Philippe Mathieu-Daudé
2017-10-04 3:46 ` Eduardo Habkost
[not found] ` <2a93b997d0acd369f35d68981a23ba491443daf6.1507059418.git.alistair.francis@xilinx.com>
2017-10-03 20:36 ` Eduardo Habkost [this message]
2017-10-03 21:41 ` [Qemu-devel] [PATCH v1 3/5] xlnx-zcu102: " Alistair Francis
2017-10-04 3:33 ` Eduardo Habkost
2017-10-04 11:12 ` Igor Mammedov
2017-10-04 12:28 ` Eduardo Habkost
2017-10-04 13:08 ` Igor Mammedov
2017-10-04 16:34 ` Eduardo Habkost
2017-10-04 21:39 ` Alistair Francis
2017-10-05 9:04 ` Igor Mammedov
2017-10-05 17:09 ` Eduardo Habkost
2017-10-06 8:23 ` Igor Mammedov
2017-10-06 11:45 ` Eduardo Habkost
2017-10-06 22:06 ` Alistair Francis
2017-10-09 7:12 ` Igor Mammedov
2017-10-10 15:25 ` Eduardo Habkost
2017-10-12 23:59 ` Alistair Francis
2017-10-13 3:16 ` Eduardo Habkost
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20171003203654.GD4760@localhost.localdomain \
--to=ehabkost@redhat.com \
--cc=alistair.francis@xilinx.com \
--cc=alistair23@gmail.com \
--cc=f4bug@amsat.org \
--cc=imammedo@redhat.com \
--cc=marcel@redhat.com \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).