From: Cornelia Huck <cohuck@redhat.com>
To: peter.maydell@linaro.org
Cc: qemu-devel@nongnu.org, rth@twiddle.net, agraf@suse.de,
thuth@redhat.com, borntraeger@de.ibm.com, david@redhat.com,
Halil Pasic <pasic@linux.vnet.ibm.com>,
Cornelia Huck <cohuck@redhat.com>
Subject: [Qemu-devel] [PULL 10/33] s390x/css: support ccw IDA
Date: Fri, 6 Oct 2017 11:59:33 +0200 [thread overview]
Message-ID: <20171006095956.27534-11-cohuck@redhat.com> (raw)
In-Reply-To: <20171006095956.27534-1-cohuck@redhat.com>
From: Halil Pasic <pasic@linux.vnet.ibm.com>
Let's add indirect data addressing support for our virtual channel
subsystem. This implementation does not bother with any kind of
prefetching. We simply step through the IDAL on demand.
Signed-off-by: Halil Pasic <pasic@linux.vnet.ibm.com>
Message-Id: <20170921180841.24490-6-pasic@linux.vnet.ibm.com>
Reviewed-by: Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
---
hw/s390x/css.c | 114 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
1 file changed, 113 insertions(+), 1 deletion(-)
diff --git a/hw/s390x/css.c b/hw/s390x/css.c
index ab7333fde8..35683d7954 100644
--- a/hw/s390x/css.c
+++ b/hw/s390x/css.c
@@ -831,6 +831,118 @@ incr:
return 0;
}
+/* returns values between 1 and bsz, where bsz is a power of 2 */
+static inline uint16_t ida_continuous_left(hwaddr cda, uint64_t bsz)
+{
+ return bsz - (cda & (bsz - 1));
+}
+
+static inline uint64_t ccw_ida_block_size(uint8_t flags)
+{
+ if ((flags & CDS_F_C64) && !(flags & CDS_F_I2K)) {
+ return 1ULL << 12;
+ }
+ return 1ULL << 11;
+}
+
+static inline int ida_read_next_idaw(CcwDataStream *cds)
+{
+ union {uint64_t fmt2; uint32_t fmt1; } idaw;
+ int ret;
+ hwaddr idaw_addr;
+ bool idaw_fmt2 = cds->flags & CDS_F_C64;
+ bool ccw_fmt1 = cds->flags & CDS_F_FMT;
+
+ if (idaw_fmt2) {
+ idaw_addr = cds->cda_orig + sizeof(idaw.fmt2) * cds->at_idaw;
+ if (idaw_addr & 0x07 || !cds_ccw_addrs_ok(idaw_addr, 0, ccw_fmt1)) {
+ return -EINVAL; /* channel program check */
+ }
+ ret = address_space_rw(&address_space_memory, idaw_addr,
+ MEMTXATTRS_UNSPECIFIED, (void *) &idaw.fmt2,
+ sizeof(idaw.fmt2), false);
+ cds->cda = be64_to_cpu(idaw.fmt2);
+ } else {
+ idaw_addr = cds->cda_orig + sizeof(idaw.fmt1) * cds->at_idaw;
+ if (idaw_addr & 0x03 || !cds_ccw_addrs_ok(idaw_addr, 0, ccw_fmt1)) {
+ return -EINVAL; /* channel program check */
+ }
+ ret = address_space_rw(&address_space_memory, idaw_addr,
+ MEMTXATTRS_UNSPECIFIED, (void *) &idaw.fmt1,
+ sizeof(idaw.fmt1), false);
+ cds->cda = be64_to_cpu(idaw.fmt1);
+ if (cds->cda & 0x80000000) {
+ return -EINVAL; /* channel program check */
+ }
+ }
+ ++(cds->at_idaw);
+ if (ret != MEMTX_OK) {
+ /* assume inaccessible address */
+ return -EINVAL; /* channel program check */
+ }
+ return 0;
+}
+
+static int ccw_dstream_rw_ida(CcwDataStream *cds, void *buff, int len,
+ CcwDataStreamOp op)
+{
+ uint64_t bsz = ccw_ida_block_size(cds->flags);
+ int ret = 0;
+ uint16_t cont_left, iter_len;
+
+ ret = cds_check_len(cds, len);
+ if (ret <= 0) {
+ return ret;
+ }
+ if (!cds->at_idaw) {
+ /* read first idaw */
+ ret = ida_read_next_idaw(cds);
+ if (ret) {
+ goto err;
+ }
+ cont_left = ida_continuous_left(cds->cda, bsz);
+ } else {
+ cont_left = ida_continuous_left(cds->cda, bsz);
+ if (cont_left == bsz) {
+ ret = ida_read_next_idaw(cds);
+ if (ret) {
+ goto err;
+ }
+ if (cds->cda & (bsz - 1)) {
+ ret = -EINVAL; /* channel program check */
+ goto err;
+ }
+ }
+ }
+ do {
+ iter_len = MIN(len, cont_left);
+ if (op != CDS_OP_A) {
+ ret = address_space_rw(&address_space_memory, cds->cda,
+ MEMTXATTRS_UNSPECIFIED, buff, iter_len, op);
+ if (ret != MEMTX_OK) {
+ /* assume inaccessible address */
+ ret = -EINVAL; /* channel program check */
+ goto err;
+ }
+ }
+ cds->at_byte += iter_len;
+ cds->cda += iter_len;
+ len -= iter_len;
+ if (!len) {
+ break;
+ }
+ ret = ida_read_next_idaw(cds);
+ if (ret) {
+ goto err;
+ }
+ cont_left = bsz;
+ } while (true);
+ return ret;
+err:
+ cds->flags |= CDS_F_STREAM_BROKEN;
+ return ret;
+}
+
void ccw_dstream_init(CcwDataStream *cds, CCW1 const *ccw, ORB const *orb)
{
/*
@@ -849,7 +961,7 @@ void ccw_dstream_init(CcwDataStream *cds, CCW1 const *ccw, ORB const *orb)
if (!(cds->flags & CDS_F_IDA)) {
cds->op_handler = ccw_dstream_rw_noflags;
} else {
- assert(false);
+ cds->op_handler = ccw_dstream_rw_ida;
}
}
--
2.13.6
next prev parent reply other threads:[~2017-10-06 10:00 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-06 9:59 [Qemu-devel] [PULL 00/33] next batch of s390x patches Cornelia Huck
2017-10-06 9:59 ` [Qemu-devel] [PULL 01/33] s390x/tcg: implement spm (SET PROGRAM MASK) Cornelia Huck
2017-10-06 9:59 ` [Qemu-devel] [PULL 02/33] s390x/tcg: move wrap_address() to internal.h Cornelia Huck
2017-10-06 9:59 ` [Qemu-devel] [PULL 03/33] s390x/tcg: add basic MSA features Cornelia Huck
2017-10-06 9:59 ` [Qemu-devel] [PULL 04/33] s390x: use generic cpu_model parsing Cornelia Huck
2017-10-06 9:59 ` [Qemu-devel] [PULL 05/33] s390x/kvm: fix and cleanup storing CPU status Cornelia Huck
2017-10-06 9:59 ` [Qemu-devel] [PULL 06/33] s390x/css: introduce css data stream Cornelia Huck
2017-10-06 9:59 ` [Qemu-devel] [PULL 07/33] s390x/css: use ccw " Cornelia Huck
2017-10-06 9:59 ` [Qemu-devel] [PULL 08/33] virtio-ccw: " Cornelia Huck
2017-10-06 9:59 ` [Qemu-devel] [PULL 09/33] 390x/css: introduce maximum data address checking Cornelia Huck
2017-10-06 9:59 ` Cornelia Huck [this message]
2017-10-06 9:59 ` [Qemu-devel] [PULL 11/33] s390x/tcg: fix checking for invalid memory check Cornelia Huck
2017-10-06 9:59 ` [Qemu-devel] [PULL 12/33] s390x/tcg: add MMU for real addresses Cornelia Huck
2017-10-06 9:59 ` [Qemu-devel] [PULL 13/33] s390x/tcg: make lura(g) use the new _real mmu Cornelia Huck
2017-10-06 9:59 ` [Qemu-devel] [PULL 14/33] s390x/tcg: make stora(g) " Cornelia Huck
2017-10-06 9:59 ` [Qemu-devel] [PULL 15/33] s390x/tcg: make testblock " Cornelia Huck
2017-10-06 9:59 ` [Qemu-devel] [PULL 16/33] s390x/tcg: make idte/ipte " Cornelia Huck
2017-10-06 9:59 ` [Qemu-devel] [PULL 17/33] Revert "s390x/ccw: create s390 phb conditionally" Cornelia Huck
2017-10-06 9:59 ` [Qemu-devel] [PULL 18/33] s390x/3270: IDA support for 3270 via CcwDataStream Cornelia Huck
2017-10-06 9:59 ` [Qemu-devel] [PULL 19/33] s390x/3270: handle writes of arbitrary length Cornelia Huck
2017-10-06 9:59 ` [Qemu-devel] [PULL 20/33] MAINTAINERS: use KVM s390x maintainers for kvm-stubs.c and kvm_s390x.h Cornelia Huck
2017-10-06 9:59 ` [Qemu-devel] [PULL 21/33] s390x: raise CPU hotplug irq after really hotplugged Cornelia Huck
2017-10-06 9:59 ` [Qemu-devel] [PULL 22/33] s390x/cpumodel: fix max STFL(E) bit number Cornelia Huck
2017-10-06 9:59 ` [Qemu-devel] [PULL 23/33] target/s390x: get rid of next_core_id Cornelia Huck
2017-10-06 9:59 ` [Qemu-devel] [PULL 24/33] s390x: introduce and use S390_MAX_CPUS Cornelia Huck
2017-10-06 9:59 ` [Qemu-devel] [PULL 25/33] s390x/tcg: make STFL store into the lowcore Cornelia Huck
2017-10-06 9:59 ` [Qemu-devel] [PULL 26/33] s390x: sort some devices into categories Cornelia Huck
2017-10-06 9:59 ` [Qemu-devel] [PULL 27/33] s390x/css: fix css migration compat handling Cornelia Huck
2017-10-06 9:59 ` [Qemu-devel] [PULL 28/33] s390/kvm: Support for get/set of extended TOD-Clock for guest Cornelia Huck
2017-10-06 9:59 ` [Qemu-devel] [PULL 29/33] s390/kvm: make TOD setting failures fatal for migration Cornelia Huck
2017-10-06 9:59 ` [Qemu-devel] [PULL 30/33] s390x/sclp: Mark the sclp device with user_creatable = false Cornelia Huck
2017-10-06 9:59 ` [Qemu-devel] [PULL 31/33] s390x/sclp: mark sclp-cpu-hotplug as non-usercreatable Cornelia Huck
2017-10-06 9:59 ` [Qemu-devel] [PULL 32/33] s390x/tcg: initialize machine check queue Cornelia Huck
2017-10-06 9:59 ` [Qemu-devel] [PULL 33/33] hw/s390x: Mark the "sclpquiesce" device with user_creatable = false Cornelia Huck
2017-10-06 16:00 ` [Qemu-devel] [PULL 00/33] next batch of s390x patches Peter Maydell
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