From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
To: Alistair Francis <alistair.francis@xilinx.com>
Cc: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
qemu-arm <qemu-arm@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH v3 0/8] Add the ZynqMP PMU and IPI
Date: Tue, 10 Oct 2017 16:48:34 +0200 [thread overview]
Message-ID: <20171010144834.GC5553@toto> (raw)
In-Reply-To: <CAKmqyKMEbQ3JbqMxeeOTBV92ixRVDfw1wFi57xNKGyF82DSC_Q@mail.gmail.com>
On Mon, Oct 09, 2017 at 05:12:39PM -0700, Alistair Francis wrote:
> On Sun, Oct 8, 2017 at 3:20 PM, Edgar E. Iglesias
> <edgar.iglesias@xilinx.com> wrote:
> > On Wed, Sep 20, 2017 at 03:01:31PM -0700, Alistair Francis wrote:
> >>
> >> This series adds the ZynqMP Power Management Unit (PMU) machine with basic
> >> functionality.
> >>
> >> The machine only has the
> >> - CPU
> >> - Memory
> >> - Interrupt controller
> >> - IPI device
> >>
> >> connected, but that is enough to run some of the ROM and firmware
> >> code on the machine
> >>
> >> The series also adds the IPI device and connects it to the ZynqMP ARM
> >> side and the ZynqMP PMU. These IPI devices don't connect between the ARM
> >> and MicroBlaze instances though.
> >>
> >> v3:
> >> - Add the interrupt controller
> >> - Replace some of the error_fatals with errp
> >> - Fix the PMU CPU name
> >
> > Hi Alistair,
> >
> >
> > Sorry for the super long delay...
> >
> > I think this mostly looks good but I was wondering if we really need
> > to have a board specific (zcu102) PMU?
>
> It doesn't have to be board specific. What I wanted though was an SoC
> and a machine so that maybe one day we could add the PMU SoC to the
> ARM ZCU102 machine. After that it was hard to think of a name to
> differentiate the SoC and the machine. Do you have a recommendation on
> names?
Hi Alistair,
Yes, I agree with your approach but I got a little confused by the names.
I think all the stuff that is inside the PMU subsystem architecture-wise
should have generic PMU names (no ZCU102). I.e the ROM, the RAM, the IOModule,
interrupt controller etc.
The IPI block can be outside of the PMU module and be instantiated by the
board or perhaps better if we could reuse some of the ZynqMP modules
instantiated by the ZCU102 machine to get a CPU-less PS for the PMU
to interact with. Or something along those lines.
How does that sound?
Best regards,
Edgar
next prev parent reply other threads:[~2017-10-10 14:48 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-20 22:01 [Qemu-devel] [PATCH v3 0/8] Add the ZynqMP PMU and IPI Alistair Francis
2017-09-20 22:01 ` [Qemu-devel] [PATCH v3 1/8] xlnx-zynqmp-pmu: Initial commit of the ZynqMP PMU Alistair Francis
2017-09-20 22:01 ` [Qemu-devel] [PATCH v3 2/8] xlnx-zynqmp-pmu: Add the CPU and memory Alistair Francis
2017-09-20 22:01 ` [Qemu-devel] [PATCH v3 3/8] aarch64-softmmu.mak: Use an ARM specific config Alistair Francis
2017-09-20 22:01 ` [Qemu-devel] [PATCH v3 4/8] xlnx-pmu-iomod-intc: Add the PMU Interrupt controller Alistair Francis
2017-09-20 22:01 ` [Qemu-devel] [PATCH v3 6/8] xlnx-zynqmp-ipi: Initial version of the Xilinx IPI device Alistair Francis
2017-09-20 22:01 ` [Qemu-devel] [PATCH v3 7/8] xlnx-zynqmp-pmu: Connect the IPI device to the PMU Alistair Francis
2017-09-20 22:01 ` [Qemu-devel] [PATCH v3 8/8] xlnx-zynqmp: Connect the IPI device to the ZynqMP SoC Alistair Francis
2017-10-08 22:20 ` [Qemu-devel] [PATCH v3 0/8] Add the ZynqMP PMU and IPI Edgar E. Iglesias
2017-10-10 0:12 ` Alistair Francis
2017-10-10 14:48 ` Edgar E. Iglesias [this message]
2017-10-10 17:59 ` Alistair Francis
2017-10-12 18:58 ` Edgar E. Iglesias
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