From: Stafford Horne <shorne@gmail.com>
To: QEMU Development <qemu-devel@nongnu.org>
Cc: Richard Henderson <rth@twiddle.net>,
Richard Henderson <richard.henderson@linaro.org>,
Openrisc <openrisc@lists.librecores.org>,
Stafford Horne <shorne@gmail.com>
Subject: [Qemu-devel] [PATCH v2 5/5] openrisc: Only kick cpu on timeout, not on update
Date: Fri, 13 Oct 2017 22:49:30 +0900 [thread overview]
Message-ID: <20171013134930.32547-6-shorne@gmail.com> (raw)
In-Reply-To: <20171013134930.32547-1-shorne@gmail.com>
Previously we were kicking the cpu on every update. This caused
problems noticeable in SMP configurations where one CPU got pinned
continuously servicing timer exceptions.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Stafford Horne <shorne@gmail.com>
---
hw/openrisc/cputimer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/openrisc/cputimer.c b/hw/openrisc/cputimer.c
index 4c5415ff75..850f88761c 100644
--- a/hw/openrisc/cputimer.c
+++ b/hw/openrisc/cputimer.c
@@ -78,7 +78,6 @@ void cpu_openrisc_timer_update(OpenRISCCPU *cpu)
}
next = now + (uint64_t)wait * TIMER_PERIOD;
timer_mod(cpu->env.timer, next);
- qemu_cpu_kick(CPU(cpu));
}
void cpu_openrisc_count_start(OpenRISCCPU *cpu)
@@ -120,6 +119,7 @@ static void openrisc_timer_cb(void *opaque)
}
cpu_openrisc_timer_update(cpu);
+ qemu_cpu_kick(CPU(cpu));
}
static const VMStateDescription vmstate_or1k_timer = {
--
2.13.6
prev parent reply other threads:[~2017-10-13 13:50 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-13 13:49 [Qemu-devel] [PATCH v2 0/5] OpenRISC SMP Support Stafford Horne
2017-10-13 13:49 ` [Qemu-devel] [PATCH v2 1/5] openrisc/ompic: Add OpenRISC Multicore PIC (OMPIC) Stafford Horne
2017-10-13 13:49 ` [Qemu-devel] [PATCH v2 2/5] target/openrisc: Make coreid and numcores variable Stafford Horne
2017-10-13 13:58 ` Richard Henderson
2017-10-13 14:31 ` Stafford Horne
2017-10-13 13:49 ` [Qemu-devel] [PATCH v2 3/5] openrisc/cputimer: Perparation for Multicore Stafford Horne
2017-10-13 13:49 ` [Qemu-devel] [PATCH v2 4/5] openrisc: Initial SMP support Stafford Horne
2017-10-13 13:49 ` Stafford Horne [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20171013134930.32547-6-shorne@gmail.com \
--to=shorne@gmail.com \
--cc=openrisc@lists.librecores.org \
--cc=qemu-devel@nongnu.org \
--cc=richard.henderson@linaro.org \
--cc=rth@twiddle.net \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).