From: David Gibson <david@gibson.dropbear.id.au>
To: peter.maydell@linaro.org
Cc: ehabkost@redhat.com, agraf@suse.de, imammedo@redhat.com,
groug@kaod.org, qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
David Gibson <david@gibson.dropbear.id.au>
Subject: [Qemu-devel] [PULL 06/34] target/ppc: Add POWER9 DD2.0 model information
Date: Tue, 17 Oct 2017 15:21:24 +1100 [thread overview]
Message-ID: <20171017042152.29443-7-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <20171017042152.29443-1-david@gibson.dropbear.id.au>
At the moment the only POWER9 model which is listed in qemu is v1.0 (aka
"DD1"). This is a very early (read, buggy) version which will never be
released to the public - it was included in qemu only for the convenience
of those doing bringup on the early silicon. For bonus points, we actually
had its PVR incorrect in the table (0x004e0000 instead of 0x004e0100). We
also never actually implemented the differences in behaviour (read, bugs)
that marked DD1 in qemu.
Now that we know the PVR for the substantially better v2.0 (DD2) chip,
include it and make it the default POWER9 in qemu. For the time being we
leave the DD1 definition in place for the poor souls (read, me) who still
need to work with DD1 hardware.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
hw/ppc/spapr_cpu_core.c | 1 +
target/ppc/cpu-models.c | 6 ++++--
target/ppc/cpu-models.h | 1 +
3 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
index 3e20b1d886..37beb56e8b 100644
--- a/hw/ppc/spapr_cpu_core.c
+++ b/hw/ppc/spapr_cpu_core.c
@@ -296,6 +296,7 @@ static const char *spapr_core_models[] = {
/* POWER9 */
"power9_v1.0",
+ "power9_v2.0",
};
static Property spapr_cpu_core_properties[] = {
diff --git a/target/ppc/cpu-models.c b/target/ppc/cpu-models.c
index 9d45702843..6c9bfde2d2 100644
--- a/target/ppc/cpu-models.c
+++ b/target/ppc/cpu-models.c
@@ -756,8 +756,10 @@
POWERPC_DEF("970_v2.2", CPU_POWERPC_970_v22, 970,
"PowerPC 970 v2.2")
- POWERPC_DEF("power9_v1.0", CPU_POWERPC_POWER9_BASE, POWER9,
+ POWERPC_DEF("power9_v1.0", CPU_POWERPC_POWER9_DD1, POWER9,
"POWER9 v1.0")
+ POWERPC_DEF("power9_v2.0", CPU_POWERPC_POWER9_DD20, POWER9,
+ "POWER9 v2.0")
POWERPC_DEF("970fx_v1.0", CPU_POWERPC_970FX_v10, 970,
"PowerPC 970FX v1.0 (G5)")
@@ -945,7 +947,7 @@ PowerPCCPUAlias ppc_cpu_aliases[] = {
{ "power8e", "power8e_v2.1" },
{ "power8", "power8_v2.0" },
{ "power8nvl", "power8nvl_v1.0" },
- { "power9", "power9_v1.0" },
+ { "power9", "power9_v2.0" },
{ "970", "970_v2.2" },
{ "970fx", "970fx_v3.1" },
{ "970mp", "970mp_v1.1" },
diff --git a/target/ppc/cpu-models.h b/target/ppc/cpu-models.h
index 25ef372d4c..efdb2fa53c 100644
--- a/target/ppc/cpu-models.h
+++ b/target/ppc/cpu-models.h
@@ -372,6 +372,7 @@ enum {
CPU_POWERPC_POWER8NVL_v10 = 0x004C0100,
CPU_POWERPC_POWER9_BASE = 0x004E0000,
CPU_POWERPC_POWER9_DD1 = 0x004E0100,
+ CPU_POWERPC_POWER9_DD20 = 0x004E1200,
CPU_POWERPC_970_v22 = 0x00390202,
CPU_POWERPC_970FX_v10 = 0x00391100,
CPU_POWERPC_970FX_v20 = 0x003C0200,
--
2.13.6
next prev parent reply other threads:[~2017-10-17 4:22 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-17 4:21 [Qemu-devel] [PULL 00/34] ppc-for-2.11 queue 20171017 David Gibson
2017-10-17 4:21 ` [Qemu-devel] [PULL 01/34] macio: add missing registers to VMStateDescription David Gibson
2017-10-17 4:21 ` [Qemu-devel] [PULL 02/34] hw/ppc: use 0 instead of fdt_path_offset(fdt, "/") David Gibson
2017-10-17 4:21 ` [Qemu-devel] [PULL 03/34] target/ppc: Remove unused PPC 460 and 460F definitions David Gibson
2017-10-17 4:21 ` [Qemu-devel] [PULL 04/34] spapr: fix OF word name in comment David Gibson
2017-10-17 4:21 ` [Qemu-devel] [PULL 05/34] spapr: sanity check size of the CAS buffer David Gibson
2017-10-17 4:21 ` David Gibson [this message]
2017-10-17 4:21 ` [Qemu-devel] [PULL 07/34] target/ppc: Fix carry flag setting for shift algebraic instructions David Gibson
2017-10-17 4:21 ` [Qemu-devel] [PULL 08/34] hw/ppc/spapr.c: abort unplug_request if previous unplug isn't done David Gibson
2017-10-17 4:21 ` [Qemu-devel] [PULL 09/34] qom: introduce type_register_static_array() David Gibson
2017-10-17 4:21 ` [Qemu-devel] [PULL 10/34] qom: add helper macro DEFINE_TYPES() David Gibson
2017-10-17 4:21 ` [Qemu-devel] [PULL 11/34] ppc: mpc8544ds/e500plat: use generic cpu_model parsing David Gibson
2017-10-17 4:21 ` [Qemu-devel] [PULL 12/34] ppc: mac_newworld: " David Gibson
2017-10-17 4:21 ` [Qemu-devel] [PULL 13/34] ppc: mac_oldworld: " David Gibson
2017-10-17 4:21 ` [Qemu-devel] [PULL 14/34] ppc: bamboo: " David Gibson
2017-10-17 4:21 ` [Qemu-devel] [PULL 15/34] ppc: replace cpu_model with cpu_type on ref405ep, taihu boards David Gibson
2017-10-17 4:21 ` [Qemu-devel] [PULL 16/34] ppc: virtex-ml507: replace cpu_model with cpu_type David Gibson
2017-10-17 4:21 ` [Qemu-devel] [PULL 17/34] ppc: 40p/prep: " David Gibson
2017-10-17 4:21 ` [Qemu-devel] [PULL 18/34] ppc: spapr: replace ppc_cpu_parse_features() with cpu_parse_cpu_model() David Gibson
2017-10-17 4:21 ` [Qemu-devel] [PULL 19/34] ppc: move '-cpu foo, compat=xxx' parsing into ppc_cpu_parse_featurestr() David Gibson
2017-10-17 4:21 ` [Qemu-devel] [PULL 20/34] ppc: spapr: define core types statically David Gibson
2017-10-17 4:21 ` [Qemu-devel] [PULL 21/34] ppc: spapr: use cpu type name directly David Gibson
2017-10-17 4:21 ` [Qemu-devel] [PULL 22/34] ppc: spapr: register 'host' core type along with the rest of core types David Gibson
2017-10-17 4:21 ` [Qemu-devel] [PULL 23/34] ppc: spapr: use cpu model names as tcg defaults instead of aliases David Gibson
2017-10-17 4:21 ` [Qemu-devel] [PULL 24/34] ppc: move ppc_cpu_lookup_alias() before its first user David Gibson
2017-10-17 4:21 ` [Qemu-devel] [PULL 25/34] ppc: spapr: use generic cpu_model parsing David Gibson
2017-10-17 4:21 ` [Qemu-devel] [PULL 26/34] ppc: pnv: " David Gibson
2017-10-17 4:21 ` [Qemu-devel] [PULL 27/34] ppc: pnv: normalize core/chip type names David Gibson
2017-10-17 4:21 ` [Qemu-devel] [PULL 28/34] ppc: pnv: drop PnvCoreClass::cpu_oc field David Gibson
2017-10-17 4:21 ` [Qemu-devel] [PULL 29/34] ppc: pnv: define core types statically David Gibson
2017-10-17 4:21 ` [Qemu-devel] [PULL 30/34] ppc: pnv: drop PnvChipClass::cpu_model field David Gibson
2017-10-17 4:21 ` [Qemu-devel] [PULL 31/34] ppc: pnv: consolidate type definitions and batch register them David Gibson
2017-10-17 4:21 ` [Qemu-devel] [PULL 32/34] spapr: Correct RAM size calculation for HPT resizing David Gibson
2017-10-17 4:21 ` [Qemu-devel] [PULL 33/34] spapr_pci: fail gracefully with non-pseries machine types David Gibson
2017-10-17 4:21 ` [Qemu-devel] [PULL 34/34] spapr_cpu_core: rewrite machine type sanity check David Gibson
2017-10-19 9:52 ` [Qemu-devel] [PULL 00/34] ppc-for-2.11 queue 20171017 Peter Maydell
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