From: "Cédric Le Goater" <clg@kaod.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org,
"Andrew Jeffery" <andrew@aj.id.au>,
"Joel Stanley" <joel@jms.id.au>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Cédric Le Goater" <clg@kaod.org>
Subject: [Qemu-devel] [PATCH v5 1/8] aspeed: use a ROM memory region to catch invalid writes
Date: Thu, 19 Oct 2017 17:12:42 +0200 [thread overview]
Message-ID: <20171019151249.13663-2-clg@kaod.org> (raw)
In-Reply-To: <20171019151249.13663-1-clg@kaod.org>
Some legacy firmwares access unimplemented addresses on the Aspeed SoC
(old U-Boot code using variables in the bss when it shouldn't do).
Let's use a ROM memory region to catch the invalid writes and support
new boards without using the 'ignore_memory_transaction_failures'
flag.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
Changes since v4 :
- use a ROM memory region
hw/arm/aspeed.c | 22 ++++++++++++++++++++--
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index ab895ad490af..d88a8b5120b6 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -166,6 +166,23 @@ static void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype,
}
}
+/*
+ * This is to track invalid writes done in the ROM by some legacy
+ * firmwares
+ */
+static void boot_rom_write(void *opaque, hwaddr offset, uint64_t value,
+ unsigned size)
+{
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: 0x%" HWADDR_PRIx " <- 0x%" PRIx64 " [%u]\n",
+ __func__, offset, value, size);
+}
+
+static const MemoryRegionOps boot_rom_ops = {
+ .write = boot_rom_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+};
+
static void aspeed_board_init(MachineState *machine,
const AspeedBoardConfig *cfg)
{
@@ -216,8 +233,9 @@ static void aspeed_board_init(MachineState *machine,
* SoC and 128MB for the AST2500 SoC, which is twice as big as
* needed by the flash modules of the Aspeed machines.
*/
- memory_region_init_rom_nomigrate(boot_rom, OBJECT(bmc), "aspeed.boot_rom",
- fl->size, &error_abort);
+ memory_region_init_rom_device(boot_rom, OBJECT(bmc), &boot_rom_ops,
+ NULL, "aspeed.boot_rom", fl->size,
+ &error_abort);
memory_region_add_subregion(get_system_memory(), FIRMWARE_ADDR,
boot_rom);
write_boot_rom(drive0, FIRMWARE_ADDR, fl->size, &error_abort);
--
2.13.6
next prev parent reply other threads:[~2017-10-19 15:13 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-19 15:12 [Qemu-devel] [PATCH v5 0/8] aspeed: add a witherspoon-bmc machine Cédric Le Goater
2017-10-19 15:12 ` Cédric Le Goater [this message]
2017-10-19 15:44 ` [Qemu-devel] [PATCH v5 1/8] aspeed: use a ROM memory region to catch invalid writes Peter Maydell
2017-10-19 16:14 ` Cédric Le Goater
2017-10-20 3:10 ` Philippe Mathieu-Daudé
2017-10-20 6:30 ` Cédric Le Goater
2017-10-19 15:12 ` [Qemu-devel] [PATCH v5 2/8] aspeed: remove ignore_memory_transaction_failures all boards Cédric Le Goater
2017-10-19 15:45 ` Peter Maydell
2017-10-19 15:12 ` [Qemu-devel] [PATCH v5 3/8] aspeed: add support for the witherspoon-bmc board Cédric Le Goater
2017-10-19 15:12 ` [Qemu-devel] [PATCH v5 4/8] aspeed: add an I2C RTC device to all machines Cédric Le Goater
2017-10-19 15:12 ` [Qemu-devel] [PATCH v5 5/8] smbus: add a smbus_eeprom_init_one() routine Cédric Le Goater
2017-10-19 15:12 ` [Qemu-devel] [PATCH v5 6/8] aspeed: Add EEPROM I2C devices Cédric Le Goater
2017-10-19 15:12 ` [Qemu-devel] [PATCH v5 7/8] misc: add pca9552 LED blinker model Cédric Le Goater
2017-10-19 15:47 ` Peter Maydell
2017-10-19 15:12 ` [Qemu-devel] [PATCH v5 8/8] aspeed: add the pc9552 chips to the witherspoon machine Cédric Le Goater
2017-11-29 9:58 ` [Qemu-devel] [PATCH v5 0/8] aspeed: add a witherspoon-bmc machine Cédric Le Goater
2017-11-29 10:11 ` Peter Maydell
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