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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: cota@braap.org, f4bug@amsat.org, pbonzini@redhat.com,
	Richard Henderson <rth@twiddle.net>
Subject: [Qemu-devel] [PATCH v7 03/52] tcg: Propagate args to op->args in tcg.c
Date: Fri, 20 Oct 2017 16:19:34 -0700	[thread overview]
Message-ID: <20171020232023.15010-4-richard.henderson@linaro.org> (raw)
In-Reply-To: <20171020232023.15010-1-richard.henderson@linaro.org>

From: Richard Henderson <rth@twiddle.net>

Reviewed-by: Emilio G. Cota <cota@braap.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 tcg/tcg.c | 121 ++++++++++++++++++++++++++++++--------------------------------
 1 file changed, 58 insertions(+), 63 deletions(-)

diff --git a/tcg/tcg.c b/tcg/tcg.c
index 98673f2190..4f56077f64 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -1277,14 +1277,12 @@ void tcg_dump_ops(TCGContext *s)
     for (oi = s->gen_op_buf[0].next; oi != 0; oi = op->next) {
         int i, k, nb_oargs, nb_iargs, nb_cargs;
         const TCGOpDef *def;
-        const TCGArg *args;
         TCGOpcode c;
         int col = 0;
 
         op = &s->gen_op_buf[oi];
         c = op->opc;
         def = &tcg_op_defs[c];
-        args = op->args;
 
         if (c == INDEX_op_insn_start) {
             col += qemu_log("%s ----", oi != s->gen_op_buf[0].next ? "\n" : "");
@@ -1292,9 +1290,9 @@ void tcg_dump_ops(TCGContext *s)
             for (i = 0; i < TARGET_INSN_START_WORDS; ++i) {
                 target_ulong a;
 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
-                a = ((target_ulong)args[i * 2 + 1] << 32) | args[i * 2];
+                a = deposit64(op->args[i * 2], 32, 32, op->args[i * 2 + 1]);
 #else
-                a = args[i];
+                a = op->args[i];
 #endif
                 col += qemu_log(" " TARGET_FMT_lx, a);
             }
@@ -1306,14 +1304,14 @@ void tcg_dump_ops(TCGContext *s)
 
             /* function name, flags, out args */
             col += qemu_log(" %s %s,$0x%" TCG_PRIlx ",$%d", def->name,
-                            tcg_find_helper(s, args[nb_oargs + nb_iargs]),
-                            args[nb_oargs + nb_iargs + 1], nb_oargs);
+                            tcg_find_helper(s, op->args[nb_oargs + nb_iargs]),
+                            op->args[nb_oargs + nb_iargs + 1], nb_oargs);
             for (i = 0; i < nb_oargs; i++) {
                 col += qemu_log(",%s", tcg_get_arg_str_idx(s, buf, sizeof(buf),
-                                                           args[i]));
+                                                           op->args[i]));
             }
             for (i = 0; i < nb_iargs; i++) {
-                TCGArg arg = args[nb_oargs + i];
+                TCGArg arg = op->args[nb_oargs + i];
                 const char *t = "<dummy>";
                 if (arg != TCG_CALL_DUMMY_ARG) {
                     t = tcg_get_arg_str_idx(s, buf, sizeof(buf), arg);
@@ -1333,14 +1331,14 @@ void tcg_dump_ops(TCGContext *s)
                     col += qemu_log(",");
                 }
                 col += qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf),
-                                                          args[k++]));
+                                                          op->args[k++]));
             }
             for (i = 0; i < nb_iargs; i++) {
                 if (k != 0) {
                     col += qemu_log(",");
                 }
                 col += qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf),
-                                                          args[k++]));
+                                                          op->args[k++]));
             }
             switch (c) {
             case INDEX_op_brcond_i32:
@@ -1351,10 +1349,11 @@ void tcg_dump_ops(TCGContext *s)
             case INDEX_op_brcond_i64:
             case INDEX_op_setcond_i64:
             case INDEX_op_movcond_i64:
-                if (args[k] < ARRAY_SIZE(cond_name) && cond_name[args[k]]) {
-                    col += qemu_log(",%s", cond_name[args[k++]]);
+                if (op->args[k] < ARRAY_SIZE(cond_name)
+                    && cond_name[op->args[k]]) {
+                    col += qemu_log(",%s", cond_name[op->args[k++]]);
                 } else {
-                    col += qemu_log(",$0x%" TCG_PRIlx, args[k++]);
+                    col += qemu_log(",$0x%" TCG_PRIlx, op->args[k++]);
                 }
                 i = 1;
                 break;
@@ -1363,7 +1362,7 @@ void tcg_dump_ops(TCGContext *s)
             case INDEX_op_qemu_ld_i64:
             case INDEX_op_qemu_st_i64:
                 {
-                    TCGMemOpIdx oi = args[k++];
+                    TCGMemOpIdx oi = op->args[k++];
                     TCGMemOp op = get_memop(oi);
                     unsigned ix = get_mmuidx(oi);
 
@@ -1388,14 +1387,15 @@ void tcg_dump_ops(TCGContext *s)
             case INDEX_op_brcond_i32:
             case INDEX_op_brcond_i64:
             case INDEX_op_brcond2_i32:
-                col += qemu_log("%s$L%d", k ? "," : "", arg_label(args[k])->id);
+                col += qemu_log("%s$L%d", k ? "," : "",
+                                arg_label(op->args[k])->id);
                 i++, k++;
                 break;
             default:
                 break;
             }
             for (; i < nb_cargs; i++, k++) {
-                col += qemu_log("%s$0x%" TCG_PRIlx, k ? "," : "", args[k]);
+                col += qemu_log("%s$0x%" TCG_PRIlx, k ? "," : "", op->args[k]);
             }
         }
         if (op->life) {
@@ -1656,7 +1656,6 @@ static void liveness_pass_1(TCGContext *s, uint8_t *temp_state)
         TCGArg arg;
 
         TCGOp * const op = &s->gen_op_buf[oi];
-        TCGArg * const args = op->args;
         TCGOpcode opc = op->opc;
         const TCGOpDef *def = &tcg_op_defs[opc];
 
@@ -1669,12 +1668,12 @@ static void liveness_pass_1(TCGContext *s, uint8_t *temp_state)
 
                 nb_oargs = op->callo;
                 nb_iargs = op->calli;
-                call_flags = args[nb_oargs + nb_iargs + 1];
+                call_flags = op->args[nb_oargs + nb_iargs + 1];
 
                 /* pure functions can be removed if their result is unused */
                 if (call_flags & TCG_CALL_NO_SIDE_EFFECTS) {
                     for (i = 0; i < nb_oargs; i++) {
-                        arg = args[i];
+                        arg = op->args[i];
                         if (temp_state[arg] != TS_DEAD) {
                             goto do_not_remove_call;
                         }
@@ -1685,7 +1684,7 @@ static void liveness_pass_1(TCGContext *s, uint8_t *temp_state)
 
                     /* output args are dead */
                     for (i = 0; i < nb_oargs; i++) {
-                        arg = args[i];
+                        arg = op->args[i];
                         if (temp_state[arg] & TS_DEAD) {
                             arg_life |= DEAD_ARG << i;
                         }
@@ -1708,7 +1707,7 @@ static void liveness_pass_1(TCGContext *s, uint8_t *temp_state)
 
                     /* record arguments that die in this helper */
                     for (i = nb_oargs; i < nb_iargs + nb_oargs; i++) {
-                        arg = args[i];
+                        arg = op->args[i];
                         if (arg != TCG_CALL_DUMMY_ARG) {
                             if (temp_state[arg] & TS_DEAD) {
                                 arg_life |= DEAD_ARG << i;
@@ -1717,7 +1716,7 @@ static void liveness_pass_1(TCGContext *s, uint8_t *temp_state)
                     }
                     /* input arguments are live for preceding opcodes */
                     for (i = nb_oargs; i < nb_iargs + nb_oargs; i++) {
-                        arg = args[i];
+                        arg = op->args[i];
                         if (arg != TCG_CALL_DUMMY_ARG) {
                             temp_state[arg] &= ~TS_DEAD;
                         }
@@ -1729,7 +1728,7 @@ static void liveness_pass_1(TCGContext *s, uint8_t *temp_state)
             break;
         case INDEX_op_discard:
             /* mark the temporary as dead */
-            temp_state[args[0]] = TS_DEAD;
+            temp_state[op->args[0]] = TS_DEAD;
             break;
 
         case INDEX_op_add2_i32:
@@ -1750,15 +1749,15 @@ static void liveness_pass_1(TCGContext *s, uint8_t *temp_state)
                the low part.  The result can be optimized to a simple
                add or sub.  This happens often for x86_64 guest when the
                cpu mode is set to 32 bit.  */
-            if (temp_state[args[1]] == TS_DEAD) {
-                if (temp_state[args[0]] == TS_DEAD) {
+            if (temp_state[op->args[1]] == TS_DEAD) {
+                if (temp_state[op->args[0]] == TS_DEAD) {
                     goto do_remove;
                 }
                 /* Replace the opcode and adjust the args in place,
                    leaving 3 unused args at the end.  */
                 op->opc = opc = opc_new;
-                args[1] = args[2];
-                args[2] = args[4];
+                op->args[1] = op->args[2];
+                op->args[2] = op->args[4];
                 /* Fall through and mark the single-word operation live.  */
                 nb_iargs = 2;
                 nb_oargs = 1;
@@ -1788,21 +1787,21 @@ static void liveness_pass_1(TCGContext *s, uint8_t *temp_state)
         do_mul2:
             nb_iargs = 2;
             nb_oargs = 2;
-            if (temp_state[args[1]] == TS_DEAD) {
-                if (temp_state[args[0]] == TS_DEAD) {
+            if (temp_state[op->args[1]] == TS_DEAD) {
+                if (temp_state[op->args[0]] == TS_DEAD) {
                     /* Both parts of the operation are dead.  */
                     goto do_remove;
                 }
                 /* The high part of the operation is dead; generate the low. */
                 op->opc = opc = opc_new;
-                args[1] = args[2];
-                args[2] = args[3];
-            } else if (temp_state[args[0]] == TS_DEAD && have_opc_new2) {
+                op->args[1] = op->args[2];
+                op->args[2] = op->args[3];
+            } else if (temp_state[op->args[0]] == TS_DEAD && have_opc_new2) {
                 /* The low part of the operation is dead; generate the high. */
                 op->opc = opc = opc_new2;
-                args[0] = args[1];
-                args[1] = args[2];
-                args[2] = args[3];
+                op->args[0] = op->args[1];
+                op->args[1] = op->args[2];
+                op->args[2] = op->args[3];
             } else {
                 goto do_not_remove;
             }
@@ -1820,7 +1819,7 @@ static void liveness_pass_1(TCGContext *s, uint8_t *temp_state)
                implies side effects */
             if (!(def->flags & TCG_OPF_SIDE_EFFECTS) && nb_oargs != 0) {
                 for (i = 0; i < nb_oargs; i++) {
-                    if (temp_state[args[i]] != TS_DEAD) {
+                    if (temp_state[op->args[i]] != TS_DEAD) {
                         goto do_not_remove;
                     }
                 }
@@ -1830,7 +1829,7 @@ static void liveness_pass_1(TCGContext *s, uint8_t *temp_state)
             do_not_remove:
                 /* output args are dead */
                 for (i = 0; i < nb_oargs; i++) {
-                    arg = args[i];
+                    arg = op->args[i];
                     if (temp_state[arg] & TS_DEAD) {
                         arg_life |= DEAD_ARG << i;
                     }
@@ -1852,14 +1851,14 @@ static void liveness_pass_1(TCGContext *s, uint8_t *temp_state)
 
                 /* record arguments that die in this opcode */
                 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
-                    arg = args[i];
+                    arg = op->args[i];
                     if (temp_state[arg] & TS_DEAD) {
                         arg_life |= DEAD_ARG << i;
                     }
                 }
                 /* input arguments are live for preceding opcodes */
                 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
-                    temp_state[args[i]] &= ~TS_DEAD;
+                    temp_state[op->args[i]] &= ~TS_DEAD;
                 }
             }
             break;
@@ -1894,7 +1893,6 @@ static bool liveness_pass_2(TCGContext *s, uint8_t *temp_state)
 
     for (oi = s->gen_op_buf[0].next; oi != 0; oi = oi_next) {
         TCGOp *op = &s->gen_op_buf[oi];
-        TCGArg *args = op->args;
         TCGOpcode opc = op->opc;
         const TCGOpDef *def = &tcg_op_defs[opc];
         TCGLifeData arg_life = op->life;
@@ -1906,7 +1904,7 @@ static bool liveness_pass_2(TCGContext *s, uint8_t *temp_state)
         if (opc == INDEX_op_call) {
             nb_oargs = op->callo;
             nb_iargs = op->calli;
-            call_flags = args[nb_oargs + nb_iargs + 1];
+            call_flags = op->args[nb_oargs + nb_iargs + 1];
         } else {
             nb_iargs = def->nb_iargs;
             nb_oargs = def->nb_oargs;
@@ -1927,7 +1925,7 @@ static bool liveness_pass_2(TCGContext *s, uint8_t *temp_state)
 
         /* Make sure that input arguments are available.  */
         for (i = nb_oargs; i < nb_iargs + nb_oargs; i++) {
-            arg = args[i];
+            arg = op->args[i];
             /* Note this unsigned test catches TCG_CALL_ARG_DUMMY too.  */
             if (arg < nb_globals) {
                 dir = dir_temps[arg];
@@ -1937,11 +1935,10 @@ static bool liveness_pass_2(TCGContext *s, uint8_t *temp_state)
                                       ? INDEX_op_ld_i32
                                       : INDEX_op_ld_i64);
                     TCGOp *lop = tcg_op_insert_before(s, op, lopc, 3);
-                    TCGArg *largs = lop->args;
 
-                    largs[0] = dir;
-                    largs[1] = temp_idx(s, its->mem_base);
-                    largs[2] = its->mem_offset;
+                    lop->args[0] = dir;
+                    lop->args[1] = temp_idx(s, its->mem_base);
+                    lop->args[2] = its->mem_offset;
 
                     /* Loaded, but synced with memory.  */
                     temp_state[arg] = TS_MEM;
@@ -1953,11 +1950,11 @@ static bool liveness_pass_2(TCGContext *s, uint8_t *temp_state)
            No action is required except keeping temp_state up to date
            so that we reload when needed.  */
         for (i = nb_oargs; i < nb_iargs + nb_oargs; i++) {
-            arg = args[i];
+            arg = op->args[i];
             if (arg < nb_globals) {
                 dir = dir_temps[arg];
                 if (dir != 0) {
-                    args[i] = dir;
+                    op->args[i] = dir;
                     changes = true;
                     if (IS_DEAD_ARG(i)) {
                         temp_state[arg] = TS_DEAD;
@@ -1988,7 +1985,7 @@ static bool liveness_pass_2(TCGContext *s, uint8_t *temp_state)
 
         /* Outputs become available.  */
         for (i = 0; i < nb_oargs; i++) {
-            arg = args[i];
+            arg = op->args[i];
             if (arg >= nb_globals) {
                 continue;
             }
@@ -1996,7 +1993,7 @@ static bool liveness_pass_2(TCGContext *s, uint8_t *temp_state)
             if (dir == 0) {
                 continue;
             }
-            args[i] = dir;
+            op->args[i] = dir;
             changes = true;
 
             /* The output is now live and modified.  */
@@ -2009,11 +2006,10 @@ static bool liveness_pass_2(TCGContext *s, uint8_t *temp_state)
                                   ? INDEX_op_st_i32
                                   : INDEX_op_st_i64);
                 TCGOp *sop = tcg_op_insert_after(s, op, sopc, 3);
-                TCGArg *sargs = sop->args;
 
-                sargs[0] = dir;
-                sargs[1] = temp_idx(s, its->mem_base);
-                sargs[2] = its->mem_offset;
+                sop->args[0] = dir;
+                sop->args[1] = temp_idx(s, its->mem_base);
+                sop->args[2] = its->mem_offset;
 
                 temp_state[arg] = TS_MEM;
             }
@@ -2841,7 +2837,6 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb)
     num_insns = -1;
     for (oi = s->gen_op_buf[0].next; oi != 0; oi = oi_next) {
         TCGOp * const op = &s->gen_op_buf[oi];
-        TCGArg * const args = op->args;
         TCGOpcode opc = op->opc;
         const TCGOpDef *def = &tcg_op_defs[opc];
         TCGLifeData arg_life = op->life;
@@ -2854,11 +2849,11 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb)
         switch (opc) {
         case INDEX_op_mov_i32:
         case INDEX_op_mov_i64:
-            tcg_reg_alloc_mov(s, def, args, arg_life);
+            tcg_reg_alloc_mov(s, def, op->args, arg_life);
             break;
         case INDEX_op_movi_i32:
         case INDEX_op_movi_i64:
-            tcg_reg_alloc_movi(s, args, arg_life);
+            tcg_reg_alloc_movi(s, op->args, arg_life);
             break;
         case INDEX_op_insn_start:
             if (num_insns >= 0) {
@@ -2868,22 +2863,22 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb)
             for (i = 0; i < TARGET_INSN_START_WORDS; ++i) {
                 target_ulong a;
 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
-                a = ((target_ulong)args[i * 2 + 1] << 32) | args[i * 2];
+                a = deposit64(op->args[i * 2], 32, 32, op->args[i * 2 + 1]);
 #else
-                a = args[i];
+                a = op->args[i];
 #endif
                 s->gen_insn_data[num_insns][i] = a;
             }
             break;
         case INDEX_op_discard:
-            temp_dead(s, &s->temps[args[0]]);
+            temp_dead(s, &s->temps[op->args[0]]);
             break;
         case INDEX_op_set_label:
             tcg_reg_alloc_bb_end(s, s->reserved_regs);
-            tcg_out_label(s, arg_label(args[0]), s->code_ptr);
+            tcg_out_label(s, arg_label(op->args[0]), s->code_ptr);
             break;
         case INDEX_op_call:
-            tcg_reg_alloc_call(s, op->callo, op->calli, args, arg_life);
+            tcg_reg_alloc_call(s, op->callo, op->calli, op->args, arg_life);
             break;
         default:
             /* Sanity check that we've not introduced any unhandled opcodes. */
@@ -2891,7 +2886,7 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb)
             /* Note: in order to speed up the code, it would be much
                faster to have specialized register allocator functions for
                some common argument patterns */
-            tcg_reg_alloc_op(s, def, opc, args, arg_life);
+            tcg_reg_alloc_op(s, def, opc, op->args, arg_life);
             break;
         }
 #ifdef CONFIG_DEBUG_TCG
-- 
2.13.6

  parent reply	other threads:[~2017-10-20 23:20 UTC|newest]

Thread overview: 83+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-20 23:19 [Qemu-devel] [PATCH v7 00/52] tcg queued patches Richard Henderson
2017-10-20 23:19 ` [Qemu-devel] [PATCH v7 01/52] tcg: Merge opcode arguments into TCGOp Richard Henderson
2017-10-20 23:19 ` [Qemu-devel] [PATCH v7 02/52] tcg: Propagate args to op->args in optimizer Richard Henderson
2017-10-20 23:19 ` Richard Henderson [this message]
2017-10-20 23:19 ` [Qemu-devel] [PATCH v7 04/52] tcg: Propagate TCGOp down to allocators Richard Henderson
2017-10-20 23:19 ` [Qemu-devel] [PATCH v7 05/52] tcg: Introduce arg_temp Richard Henderson
2017-10-24  2:45   ` Philippe Mathieu-Daudé
2017-10-20 23:19 ` [Qemu-devel] [PATCH v7 06/52] tcg: Add temp_global bit to TCGTemp Richard Henderson
2017-10-24  2:49   ` Philippe Mathieu-Daudé
2017-10-20 23:19 ` [Qemu-devel] [PATCH v7 07/52] tcg: Return NULL temp for TCG_CALL_DUMMY_ARG Richard Henderson
2017-10-24  3:09   ` Philippe Mathieu-Daudé
2017-10-20 23:19 ` [Qemu-devel] [PATCH v7 08/52] tcg: Introduce temp_arg, export temp_idx Richard Henderson
2017-10-23 17:09   ` Emilio G. Cota
2017-10-24  2:47   ` Philippe Mathieu-Daudé
2017-10-20 23:19 ` [Qemu-devel] [PATCH v7 09/52] tcg: Use per-temp state data in liveness Richard Henderson
2017-10-20 23:19 ` [Qemu-devel] [PATCH v7 10/52] tcg: Avoid loops against variable bounds Richard Henderson
2017-10-24  2:51   ` Philippe Mathieu-Daudé
2017-10-20 23:19 ` [Qemu-devel] [PATCH v7 11/52] tcg: Change temp_allocate_frame arg to TCGTemp Richard Henderson
2017-10-24  2:52   ` Philippe Mathieu-Daudé
2017-10-20 23:19 ` [Qemu-devel] [PATCH v7 12/52] tcg: Remove unused TCG_CALL_DUMMY_TCGV Richard Henderson
2017-10-20 23:19 ` [Qemu-devel] [PATCH v7 13/52] tcg: Use per-temp state data in optimize Richard Henderson
2017-10-20 23:19 ` [Qemu-devel] [PATCH v7 14/52] tcg: Push tcg_ctx into generator functions Richard Henderson
2017-10-24  2:56   ` Philippe Mathieu-Daudé
2017-10-20 23:19 ` [Qemu-devel] [PATCH v7 15/52] tcg: Push tcg_ctx into tcg_gen_callN Richard Henderson
2017-10-24  2:57   ` Philippe Mathieu-Daudé
2017-10-20 23:19 ` [Qemu-devel] [PATCH v7 16/52] tcg: Introduce tcgv_{i32, i64, ptr}_{arg, temp} Richard Henderson
2017-10-23 17:10   ` Emilio G. Cota
2017-10-24  3:02   ` Philippe Mathieu-Daudé
2017-10-20 23:19 ` [Qemu-devel] [PATCH v7 17/52] tcg: Introduce temp_tcgv_{i32, i64, ptr} Richard Henderson
2017-10-23 17:10   ` Emilio G. Cota
2017-10-24  3:05   ` Philippe Mathieu-Daudé
2017-10-20 23:19 ` [Qemu-devel] [PATCH v7 18/52] tcg: Remove GET_TCGV_* and MAKE_TCGV_* Richard Henderson
2017-10-23 17:12   ` Emilio G. Cota
2017-10-20 23:19 ` [Qemu-devel] [PATCH v7 19/52] tcg: Remove TCGV_EQUAL* Richard Henderson
2017-10-23 17:13   ` Emilio G. Cota
2017-10-24  3:11   ` Philippe Mathieu-Daudé
2017-10-24 19:56     ` Richard Henderson
2017-10-20 23:19 ` [Qemu-devel] [PATCH v7 20/52] qom: Introduce CPUClass.tcg_initialize Richard Henderson
2017-10-20 23:19 ` [Qemu-devel] [PATCH v7 21/52] tcg: Use offsets not indices for TCGv_* Richard Henderson
2017-10-23 17:37   ` Emilio G. Cota
2017-10-24  3:23     ` Philippe Mathieu-Daudé
2017-10-24  3:22   ` Philippe Mathieu-Daudé
2017-10-24  3:30     ` Philippe Mathieu-Daudé
2017-10-20 23:19 ` [Qemu-devel] [PATCH v7 22/52] tcg: Use pointers in TCGOp->args Richard Henderson
2017-10-23 17:37   ` Emilio G. Cota
2017-10-20 23:19 ` [Qemu-devel] [PATCH v7 23/52] tcg: define CF_PARALLEL and use it for TB hashing along with CF_COUNT_MASK Richard Henderson
2017-10-20 23:19 ` [Qemu-devel] [PATCH v7 24/52] tcg: Add CPUState cflags_next_tb Richard Henderson
2017-10-23 17:53   ` Emilio G. Cota
2017-10-20 23:19 ` [Qemu-devel] [PATCH v7 25/52] tcg: Include CF_COUNT_MASK in CF_HASH_MASK Richard Henderson
2017-10-23 17:53   ` Emilio G. Cota
2017-10-20 23:19 ` [Qemu-devel] [PATCH v7 26/52] tcg: convert tb->cflags reads to tb_cflags(tb) Richard Henderson
2017-10-20 23:19 ` [Qemu-devel] [PATCH v7 27/52] target/arm: check CF_PARALLEL instead of parallel_cpus Richard Henderson
2017-10-20 23:19 ` [Qemu-devel] [PATCH v7 28/52] target/hppa: " Richard Henderson
2017-10-20 23:20 ` [Qemu-devel] [PATCH v7 29/52] target/i386: " Richard Henderson
2017-10-20 23:20 ` [Qemu-devel] [PATCH v7 30/52] target/m68k: " Richard Henderson
2017-10-20 23:20 ` [Qemu-devel] [PATCH v7 31/52] target/s390x: " Richard Henderson
2017-10-20 23:20 ` [Qemu-devel] [PATCH v7 32/52] target/sh4: " Richard Henderson
2017-10-20 23:20 ` [Qemu-devel] [PATCH v7 33/52] target/sparc: " Richard Henderson
2017-10-20 23:20 ` [Qemu-devel] [PATCH v7 34/52] tcg: " Richard Henderson
2017-10-20 23:20 ` [Qemu-devel] [PATCH v7 35/52] cpu-exec: lookup/generate TB outside exclusive region during step_atomic Richard Henderson
2017-10-20 23:20 ` [Qemu-devel] [PATCH v7 36/52] tcg: Add CF_LAST_IO + CF_USE_ICOUNT to CF_HASH_MASK Richard Henderson
2017-10-23 17:57   ` Emilio G. Cota
2017-10-20 23:20 ` [Qemu-devel] [PATCH v7 37/52] tcg: Remove CF_IGNORE_ICOUNT Richard Henderson
2017-10-23 18:06   ` Emilio G. Cota
2017-10-20 23:20 ` [Qemu-devel] [PATCH v7 38/52] translate-all: use a binary search tree to track TBs in TBContext Richard Henderson
2017-10-20 23:20 ` [Qemu-devel] [PATCH v7 39/52] exec-all: rename tb_free to tb_remove Richard Henderson
2017-10-20 23:20 ` [Qemu-devel] [PATCH v7 40/52] translate-all: report correct avg host TB size Richard Henderson
2017-10-20 23:20 ` [Qemu-devel] [PATCH v7 41/52] tcg: take tb_ctx out of TCGContext Richard Henderson
2017-10-20 23:20 ` [Qemu-devel] [PATCH v7 42/52] tcg: define tcg_init_ctx and make tcg_ctx a pointer Richard Henderson
2017-10-20 23:20 ` [Qemu-devel] [PATCH v7 43/52] gen-icount: fold exitreq_label into TCGContext Richard Henderson
2017-10-20 23:20 ` [Qemu-devel] [PATCH v7 44/52] tcg: introduce **tcg_ctxs to keep track of all TCGContext's Richard Henderson
2017-10-20 23:20 ` [Qemu-devel] [PATCH v7 45/52] tcg: distribute profiling counters across TCGContext's Richard Henderson
2017-10-20 23:20 ` [Qemu-devel] [PATCH v7 46/52] tcg: allocate optimizer temps with tcg_malloc Richard Henderson
2017-10-20 23:20 ` [Qemu-devel] [PATCH v7 47/52] osdep: introduce qemu_mprotect_rwx/none Richard Henderson
2017-10-20 23:20 ` [Qemu-devel] [PATCH v7 48/52] translate-all: use qemu_protect_rwx/none helpers Richard Henderson
2017-10-20 23:20 ` [Qemu-devel] [PATCH v7 49/52] tcg: introduce regions to split code_gen_buffer Richard Henderson
2017-10-20 23:20 ` [Qemu-devel] [PATCH v7 50/52] tcg: enable multiple TCG contexts in softmmu Richard Henderson
2017-10-20 23:20 ` [Qemu-devel] [PATCH v7 51/52] tcg: Initialize cpu_env generically Richard Henderson
2017-10-20 23:20 ` [Qemu-devel] [PATCH v7 52/52] translate-all: exit from tb_phys_invalidate if qht_remove fails Richard Henderson
2017-10-21  0:24 ` [Qemu-devel] [PATCH v7 00/52] tcg queued patches no-reply
2017-10-21 18:43   ` Richard Henderson
2017-10-21  0:44 ` no-reply
2017-10-23 18:14 ` Emilio G. Cota

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