[Qemu-devel] [PATCH v2 00/12] Add support for the ZynqMP Generic QSPI

[Francisco Iglesias <frasse.iglesias@gmail.com>]

Hi,

This patch series starts by adding support in m25p80 for continous
read out of status registers, SST flash READ ID commands, bank address register
accesses, bulk erase (0x60) and two Numonyx flashes (n25q512a11 and
n25q512a13). Thereafter it updates the striping behaviour to be bit big endiann
in the Xilinx QSPI model and adds support for RX discard, endiannes
configuration of TX/RX registers, zero pumping according tranfer register and 4
byte LQSPI addresses. Finally it adds support for the ZynqMP Generic QSPI and 
adds the ZynqMP QSPI to the xlnx-zcu102 board.

Best regards,
Francisco Iglesias

Changelog:
v1 -> v2
  * Reset author on commits (due to mailing issues).


Francisco Iglesias (12):
  m25p80: Add support for continuous read out of RDSR and READ_FSR
  m25p80: Add support for SST READ ID 0x90/0xAB commands
  m25p80: Add support for BRRD/BRWR and BULK_ERASE (0x60)
  m25p80: Add support for n25q512a11 and n25q512a13
  xilinx_spips: Move FlashCMD, XilinxQSPIPS and XilinxSPIPSClass
  xilinx_spips: Update striping to be big-endian bit order
  xilinx_spips: Add support for RX discard and RX drain
  xilinx_spips: Support configured endiannes of TX/RX registers
  xilinx_spips: Add support for zero pumping
  xilinx_spips: Add support for 4 byte addresses in the LQSPI
  xilinx_spips: Add support for the ZynqMP Generic QSPI
  xlnx-zcu102: Add support for the ZynqMP QSPI

 default-configs/arm-softmmu.mak |   1 +
 hw/arm/xlnx-zcu102.c            |  23 ++
 hw/arm/xlnx-zynqmp.c            |  24 ++
 hw/block/m25p80.c               |  50 ++-
 hw/ssi/xilinx_spips.c           | 834 +++++++++++++++++++++++++++++++++-------
 include/hw/arm/xlnx-zynqmp.h    |   5 +
 include/hw/ssi/xilinx_spips.h   |  72 +++-
 7 files changed, 871 insertions(+), 138 deletions(-)

-- 
2.9.3