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From: Andrey Smirnov <andrew.smirnov@gmail.com>
To: qemu-arm@nongnu.org
Cc: "Andrey Smirnov" <andrew.smirnov@gmail.com>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Jason Wang" <jasowang@redhat.com>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	qemu-devel@nongnu.org, yurovsky@gmail.com
Subject: [Qemu-devel] [PATCH v2 14/27] i.MX: Add code to emulate i.MX2 watchdog IP block
Date: Mon, 23 Oct 2017 13:10:42 -0700	[thread overview]
Message-ID: <20171023201055.21973-15-andrew.smirnov@gmail.com> (raw)
In-Reply-To: <20171023201055.21973-1-andrew.smirnov@gmail.com>

Add enough code to emulate i.MX2 watchdog IP block so it would be
possible to reboot the machine running Linux Guest.

Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Jason Wang <jasowang@redhat.com>
Cc: Philippe Mathieu-Daudé <f4bug@amsat.org>
Cc: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org
Cc: yurovsky@gmail.com
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
 hw/misc/Makefile.objs      |  1 +
 hw/misc/imx2_wdt.c         | 88 ++++++++++++++++++++++++++++++++++++++++++++++
 include/hw/misc/imx2_wdt.h | 34 ++++++++++++++++++
 3 files changed, 123 insertions(+)
 create mode 100644 hw/misc/imx2_wdt.c
 create mode 100644 include/hw/misc/imx2_wdt.h

diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs
index ac1be05a03..c393a93456 100644
--- a/hw/misc/Makefile.objs
+++ b/hw/misc/Makefile.objs
@@ -35,6 +35,7 @@ obj-$(CONFIG_IMX) += imx25_ccm.o
 obj-$(CONFIG_IMX) += imx6_ccm.o
 obj-$(CONFIG_IMX) += imx6_src.o
 obj-$(CONFIG_IMX) += imx7_ccm.o
+obj-$(CONFIG_IMX) += imx2_wdt.o
 obj-$(CONFIG_MILKYMIST) += milkymist-hpdmc.o
 obj-$(CONFIG_MILKYMIST) += milkymist-pfpu.o
 obj-$(CONFIG_MAINSTONE) += mst_fpga.o
diff --git a/hw/misc/imx2_wdt.c b/hw/misc/imx2_wdt.c
new file mode 100644
index 0000000000..3a1c33aa51
--- /dev/null
+++ b/hw/misc/imx2_wdt.c
@@ -0,0 +1,88 @@
+/*
+ * Copyright (c) 2017, Impinj, Inc.
+ *
+ * i.MX2 Watchdog IP block
+ *
+ * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ */
+
+#include "qemu/osdep.h"
+#include "sysemu/watchdog.h"
+
+#include "hw/misc/imx2_wdt.h"
+
+#define IMX2_WDT_WCR_WDA    BIT(5)      /* -> External Reset WDOG_B */
+#define IMX2_WDT_WCR_SRS    BIT(4)      /* -> Software Reset Signal */
+
+static uint64_t imx2_wdt_read(void *opaque, hwaddr addr,
+                              unsigned int size)
+{
+    return 0;
+}
+
+static void imx2_wdt_write(void *opaque, hwaddr addr,
+                           uint64_t value, unsigned int size)
+{
+    if (addr == IMX2_WDT_WCR &&
+        (value & (IMX2_WDT_WCR_WDA | IMX2_WDT_WCR_SRS))) {
+        watchdog_perform_action();
+    }
+}
+
+static const MemoryRegionOps imx2_wdt_ops = {
+    .read  = imx2_wdt_read,
+    .write = imx2_wdt_write,
+    .endianness = DEVICE_NATIVE_ENDIAN,
+    .impl = {
+        /*
+         * Our device would not work correctly if the guest was doing
+         * unaligned access. This might not be a limitation on the
+         * real device but in practice there is no reason for a guest
+         * to access this device unaligned.
+         */
+        .min_access_size = 4,
+        .max_access_size = 4,
+        .unaligned = false,
+    },
+};
+
+static void imx2_wdt_realize(DeviceState *dev, Error **errp)
+{
+    IMX2WdtState *s = IMX2_WDT(dev);
+
+    memory_region_init_io(&s->mmio, OBJECT(dev),
+                          &imx2_wdt_ops, s,
+                          TYPE_IMX2_WDT".mmio",
+                          IMX2_WDT_REG_NUM * sizeof(uint16_t));
+    sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->mmio);
+}
+
+static void imx2_wdt_class_init(ObjectClass *klass, void *data)
+{
+    DeviceClass *dc = DEVICE_CLASS(klass);
+
+    dc->realize = imx2_wdt_realize;
+    set_bit(DEVICE_CATEGORY_MISC, dc->categories);
+}
+
+static const TypeInfo imx2_wdt_info = {
+    .name          = TYPE_IMX2_WDT,
+    .parent        = TYPE_SYS_BUS_DEVICE,
+    .instance_size = sizeof(IMX2WdtState),
+    .class_init    = imx2_wdt_class_init,
+};
+
+static WatchdogTimerModel model = {
+    .wdt_name = "imx2-watchdog",
+    .wdt_description = "i.MX2 Watchdog",
+};
+
+static void imx2_wdt_register_type(void)
+{
+    watchdog_add_model(&model);
+    type_register_static(&imx2_wdt_info);
+}
+type_init(imx2_wdt_register_type)
diff --git a/include/hw/misc/imx2_wdt.h b/include/hw/misc/imx2_wdt.h
new file mode 100644
index 0000000000..e67ac6939d
--- /dev/null
+++ b/include/hw/misc/imx2_wdt.h
@@ -0,0 +1,34 @@
+/*
+ * Copyright (c) 2017, Impinj, Inc.
+ *
+ * i.MX2 Watchdog IP block
+ *
+ * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ */
+
+#ifndef IMX2_WDT_H
+#define IMX2_WDT_H
+
+#include "qemu/bitops.h"
+#include "hw/sysbus.h"
+
+#define TYPE_IMX2_WDT "imx2.wdt"
+#define IMX2_WDT(obj) OBJECT_CHECK(IMX2WdtState, (obj), TYPE_IMX2_WDT)
+
+enum IMX2WdtRegisters {
+    IMX2_WDT_WCR     = 0x0000,
+    IMX2_WDT_REG_NUM = 0x0008 / sizeof(uint16_t) + 1,
+};
+
+
+typedef struct IMX2WdtState {
+    /* <private> */
+    SysBusDevice parent_obj;
+
+    MemoryRegion mmio;
+} IMX2WdtState;
+
+#endif /* IMX7_SNVS_H */
-- 
2.13.5

  parent reply	other threads:[~2017-10-23 20:11 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-23 20:10 [Qemu-devel] [PATCH v2 00/27] Initial i.MX7 support Andrey Smirnov
2017-10-23 20:10 ` [Qemu-devel] [PATCH v2 01/27] imx_fec: Do not link to netdev Andrey Smirnov
2017-10-23 20:10 ` [Qemu-devel] [PATCH v2 02/27] imx_fec: Refactor imx_eth_enable_rx() Andrey Smirnov
2017-10-23 20:10 ` [Qemu-devel] [PATCH v2 03/27] imx_fec: Change queue flushing heuristics Andrey Smirnov
2017-10-23 20:10 ` [Qemu-devel] [PATCH v2 04/27] imx_fec: Use ENET_FTRL to determine truncation length Andrey Smirnov
2017-10-23 20:10 ` [Qemu-devel] [PATCH v2 05/27] imx_fec: Use MIN instead of explicit ternary operator Andrey Smirnov
2017-10-23 20:10 ` [Qemu-devel] [PATCH v2 06/27] imx_fec: Emulate SHIFT16 in ENETx_RACC Andrey Smirnov
2017-10-23 20:10 ` [Qemu-devel] [PATCH v2 07/27] imx_fec: Add support for multiple Tx DMA rings Andrey Smirnov
2017-10-23 20:10 ` [Qemu-devel] [PATCH v2 08/27] imx_fec: Use correct length for packet size Andrey Smirnov
2017-10-23 20:10 ` [Qemu-devel] [PATCH v2 09/27] imx_fec: Fix a typo in imx_enet_receive() Andrey Smirnov
2017-10-23 20:10 ` [Qemu-devel] [PATCH v2 10/27] imx_fec: Reserve full 4K page for the register file Andrey Smirnov
2017-10-23 20:10 ` [Qemu-devel] [PATCH v2 11/27] sdhci: Add i.MX specific subtype of SDHCI Andrey Smirnov
2017-10-23 20:10 ` [Qemu-devel] [PATCH v2 12/27] sdhci: Implement write method of ACMD12ERRSTS register Andrey Smirnov
2017-10-23 20:10 ` [Qemu-devel] [PATCH v2 13/27] i.MX: Add code to emulate i.MX7 CCM, PMU and ANALOG IP blocks Andrey Smirnov
2017-10-23 20:10 ` Andrey Smirnov [this message]
2017-10-23 20:10 ` [Qemu-devel] [PATCH v2 15/27] i.MX: Add code to emulate i.MX7 SNVS IP-block Andrey Smirnov
2017-10-23 20:10 ` [Qemu-devel] [PATCH v2 16/27] i.MX: Add code to emulate GPCv2 IP block Andrey Smirnov
2017-10-23 20:10 ` [Qemu-devel] [PATCH v2 17/27] i.MX: Add code to emulate i.MX7 IOMUXC " Andrey Smirnov
2017-10-23 20:10 ` [Qemu-devel] [PATCH v2 19/27] i.MX: Add code to emulate SDMA " Andrey Smirnov
2017-10-23 20:10 ` [Qemu-devel] [PATCH v2 20/27] i.MX: Add code to emulate FlexCAN " Andrey Smirnov
2017-10-23 20:10 ` [Qemu-devel] [PATCH v2 21/27] i.MX: Add implementation of i.MX7 GPR " Andrey Smirnov
2017-10-23 20:10 ` [Qemu-devel] [PATCH v2 22/27] pci: Add support for Designware " Andrey Smirnov
2017-10-23 20:10 ` [Qemu-devel] [PATCH v2 23/27] i.MX: Add code to emulate i.MX7 USBMISC " Andrey Smirnov
2017-10-23 20:10 ` [Qemu-devel] [PATCH v2 24/27] i.MX: Add code to emulate i.MX7 ADC " Andrey Smirnov
2017-10-23 20:10 ` [Qemu-devel] [PATCH v2 26/27] i.MX: Add i.MX7 SOC implementation Andrey Smirnov

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