From: P J P <ppandit@redhat.com>
To: Qemu Developers <qemu-devel@nongnu.org>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
Niu Guoxiang <niuguoxiang@huawei.com>,
Prasad J Pandit <pjp@fedoraproject.org>
Subject: [Qemu-devel] [PATCH] pc: restrict port92 register value to 2 bits
Date: Thu, 2 Nov 2017 15:06:25 +0530 [thread overview]
Message-ID: <20171102093625.32342-1-ppandit@redhat.com> (raw)
From: Prasad J Pandit <pjp@fedoraproject.org>
Port 92 configuration register holds an 8-bit value. Of 8-bits,
bits 0-1 are used and 2-7 are reserved. Restrict the supplied
value to 2 bits.
Reported-by: Niu Guoxiang <niuguoxiang@huawei.com>
Signed-off-by: Prasad J Pandit <pjp@fedoraproject.org>
---
hw/i386/pc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 05985d4927..883384a599 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -515,6 +515,7 @@ static void port92_write(void *opaque, hwaddr addr, uint64_t val,
Port92State *s = opaque;
int oldval = s->outport;
+ val &= 0x03;
DPRINTF("port92: write 0x%02" PRIx64 "\n", val);
s->outport = val;
qemu_set_irq(s->a20_out, (val >> 1) & 1);
--
2.13.6
next reply other threads:[~2017-11-02 9:36 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-02 9:36 P J P [this message]
2017-11-02 9:37 ` [Qemu-devel] [PATCH] pc: restrict port92 register value to 2 bits Paolo Bonzini
2017-11-02 12:25 ` Philippe Mathieu-Daudé
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