* [Qemu-devel] [PATCH] pc: restrict port92 register value to 2 bits
@ 2017-11-02 9:36 P J P
2017-11-02 9:37 ` Paolo Bonzini
0 siblings, 1 reply; 3+ messages in thread
From: P J P @ 2017-11-02 9:36 UTC (permalink / raw)
To: Qemu Developers; +Cc: Paolo Bonzini, Niu Guoxiang, Prasad J Pandit
From: Prasad J Pandit <pjp@fedoraproject.org>
Port 92 configuration register holds an 8-bit value. Of 8-bits,
bits 0-1 are used and 2-7 are reserved. Restrict the supplied
value to 2 bits.
Reported-by: Niu Guoxiang <niuguoxiang@huawei.com>
Signed-off-by: Prasad J Pandit <pjp@fedoraproject.org>
---
hw/i386/pc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 05985d4927..883384a599 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -515,6 +515,7 @@ static void port92_write(void *opaque, hwaddr addr, uint64_t val,
Port92State *s = opaque;
int oldval = s->outport;
+ val &= 0x03;
DPRINTF("port92: write 0x%02" PRIx64 "\n", val);
s->outport = val;
qemu_set_irq(s->a20_out, (val >> 1) & 1);
--
2.13.6
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [Qemu-devel] [PATCH] pc: restrict port92 register value to 2 bits
2017-11-02 9:36 [Qemu-devel] [PATCH] pc: restrict port92 register value to 2 bits P J P
@ 2017-11-02 9:37 ` Paolo Bonzini
2017-11-02 12:25 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 3+ messages in thread
From: Paolo Bonzini @ 2017-11-02 9:37 UTC (permalink / raw)
To: P J P, Qemu Developers; +Cc: Niu Guoxiang, Prasad J Pandit
On 02/11/2017 10:36, P J P wrote:
> From: Prasad J Pandit <pjp@fedoraproject.org>
>
> Port 92 configuration register holds an 8-bit value. Of 8-bits,
> bits 0-1 are used and 2-7 are reserved. Restrict the supplied
> value to 2 bits.
This patch is not necessary. "Do nothing and just report back the value
that was written" is an okay implementation of reserved bits.
Paolo
> Reported-by: Niu Guoxiang <niuguoxiang@huawei.com>
> Signed-off-by: Prasad J Pandit <pjp@fedoraproject.org>
> ---
> hw/i386/pc.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> index 05985d4927..883384a599 100644
> --- a/hw/i386/pc.c
> +++ b/hw/i386/pc.c
> @@ -515,6 +515,7 @@ static void port92_write(void *opaque, hwaddr addr, uint64_t val,
> Port92State *s = opaque;
> int oldval = s->outport;
>
> + val &= 0x03;
> DPRINTF("port92: write 0x%02" PRIx64 "\n", val);
> s->outport = val;
> qemu_set_irq(s->a20_out, (val >> 1) & 1);
>
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [Qemu-devel] [PATCH] pc: restrict port92 register value to 2 bits
2017-11-02 9:37 ` Paolo Bonzini
@ 2017-11-02 12:25 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 3+ messages in thread
From: Philippe Mathieu-Daudé @ 2017-11-02 12:25 UTC (permalink / raw)
To: Paolo Bonzini, P J P, Qemu Developers; +Cc: Prasad J Pandit, Niu Guoxiang
Hi Prasad,
On 11/02/2017 06:37 AM, Paolo Bonzini wrote:
> On 02/11/2017 10:36, P J P wrote:
>> From: Prasad J Pandit <pjp@fedoraproject.org>
>>
>> Port 92 configuration register holds an 8-bit value. Of 8-bits,
>> bits 0-1 are used and 2-7 are reserved. Restrict the supplied
>> value to 2 bits.
>
> This patch is not necessary. "Do nothing and just report back the value
> that was written" is an okay implementation of reserved bits.
>
> Paolo
>
>
>> Reported-by: Niu Guoxiang <niuguoxiang@huawei.com>
>> Signed-off-by: Prasad J Pandit <pjp@fedoraproject.org>
>> ---
>> hw/i386/pc.c | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/hw/i386/pc.c b/hw/i386/pc.c
>> index 05985d4927..883384a599 100644
>> --- a/hw/i386/pc.c
>> +++ b/hw/i386/pc.c
>> @@ -515,6 +515,7 @@ static void port92_write(void *opaque, hwaddr addr, uint64_t val,
>> Port92State *s = opaque;
>> int oldval = s->outport;
>>
>> + val &= 0x03;
>> DPRINTF("port92: write 0x%02" PRIx64 "\n", val);
You might want to report a guest error instead:
if (val & ~3) {
qemu_log_mask(LOG_GUEST_ERROR,
"port92: bits 2-7 are reserved "
"(wrote 0x%02" PRIx64 ")\n", val);
}
>> s->outport = val;
>> qemu_set_irq(s->a20_out, (val >> 1) & 1);
^ permalink raw reply [flat|nested] 3+ messages in thread
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2017-11-02 9:36 [Qemu-devel] [PATCH] pc: restrict port92 register value to 2 bits P J P
2017-11-02 9:37 ` Paolo Bonzini
2017-11-02 12:25 ` Philippe Mathieu-Daudé
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