From: Cornelia Huck <cohuck@redhat.com>
To: Pierre Morel <pmorel@linux.vnet.ibm.com>
Cc: qemu-devel@nongnu.org, agraf@suse.de, borntraeger@de.ibm.com,
zyimin@linux.vnet.ibm.com, pasic@linux.vnet.ibm.com
Subject: Re: [Qemu-devel] [PATCH 2/7] s390x/pci: rework PCI STORE
Date: Thu, 9 Nov 2017 17:50:18 +0100 [thread overview]
Message-ID: <20171109175018.1c2f1b60.cohuck@redhat.com> (raw)
In-Reply-To: <1510075479-17224-3-git-send-email-pmorel@linux.vnet.ibm.com>
On Tue, 7 Nov 2017 18:24:34 +0100
Pierre Morel <pmorel@linux.vnet.ibm.com> wrote:
> Enhance the fault detection, correction of the fault reporting.
>
> Signed-off-by: Pierre Morel <pmorel@linux.vnet.ibm.com>
> Reviewed-by: Yi Min Zhao <zyimin@linux.vnet.ibm.com>
> ---
> hw/s390x/s390-pci-inst.c | 41 ++++++++++++++++++++++++-----------------
> 1 file changed, 24 insertions(+), 17 deletions(-)
>
> diff --git a/hw/s390x/s390-pci-inst.c b/hw/s390x/s390-pci-inst.c
> index 8fcb02d..4a2f996 100644
> --- a/hw/s390x/s390-pci-inst.c
> +++ b/hw/s390x/s390-pci-inst.c
> @@ -469,6 +469,12 @@ int pcistg_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2)
> pcias = (env->regs[r2] >> 16) & 0xf;
> len = env->regs[r2] & 0xf;
> offset = env->regs[r2 + 1];
> + data = env->regs[r1];
> +
> + if (!(fh & FH_MASK_ENABLE)) {
This covers the reserved/standby/disabled states, right?
> + setcc(cpu, ZPCI_PCI_LS_INVAL_HANDLE);
> + return 0;
> + }
>
> pbdev = s390_pci_find_dev_by_fh(s390_get_phb(), fh);
> if (!pbdev) {
> @@ -478,12 +484,7 @@ int pcistg_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2)
> }
>
> switch (pbdev->state) {
> - case ZPCI_FS_RESERVED:
> - case ZPCI_FS_STANDBY:
> - case ZPCI_FS_DISABLED:
> case ZPCI_FS_PERMANENT_ERROR:
> - setcc(cpu, ZPCI_PCI_LS_INVAL_HANDLE);
> - return 0;
> case ZPCI_FS_ERROR:
> setcc(cpu, ZPCI_PCI_LS_ERR);
> s390_set_status_code(env, r2, ZPCI_PCI_ST_BLOCKED);
> @@ -492,9 +493,13 @@ int pcistg_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2)
> break;
> }
>
> - data = env->regs[r1];
> - if (pcias < 6) {
> - if ((8 - (offset & 0x7)) < len) {
> + /* Test that the pcias is a valid pcias and do the according operations */
s/according/appropriate/ ?
> + switch (pcias) {
> + case 0 ... 5:
> + /* Check length:
> + * A length of 0 is invalid and length should not cross a double word
> + */
> + if (!len || (len > (8 - (offset & 0x7)))) {
> program_interrupt(env, PGM_OPERAND, 4);
> return 0;
> }
> @@ -512,21 +517,23 @@ int pcistg_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2)
> program_interrupt(env, PGM_OPERAND, 4);
> return 0;
> }
> - } else if (pcias == 15) {
> - if ((4 - (offset & 0x3)) < len) {
> - program_interrupt(env, PGM_OPERAND, 4);
> - return 0;
> - }
> -
> - if (zpci_endian_swap(&data, len)) {
> + break;
> + case 15:
> + /* ZPCI uses the pseudo BAR number 15 as configuration space */
> + /* possible access length are 1,2,4 and must not cross a word */
s/length/lengths/
> + if (!len || (len > (4 - (offset & 0x3))) || len == 3) {
> program_interrupt(env, PGM_OPERAND, 4);
> return 0;
> }
> -
> + /* len = 1,2,4 so we do not need to test */
> + zpci_endian_swap(&data, len);
> pci_host_config_write_common(pbdev->pdev, offset,
> pci_config_size(pbdev->pdev),
> data, len);
> - } else {
> + break;
> + case PCI_ROM_SLOT:
So, will this be filled in a later patch? (Reading from the top.)
> + /* Fall through */
> + default:
> DPRINTF("pcistg invalid space\n");
> setcc(cpu, ZPCI_PCI_LS_ERR);
> s390_set_status_code(env, r2, ZPCI_PCI_ST_INVAL_AS);
On the whole, I think this improves readability, especially for folks
that do not have access to the spec.
next prev parent reply other threads:[~2017-11-09 16:50 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-07 17:24 [Qemu-devel] [PATCH 0/7] s390x/pci: Improve zPCI to cover more cases Pierre Morel
2017-11-07 17:24 ` [Qemu-devel] [PATCH 1/7] s390x/pci: factor out endianess conversion Pierre Morel
2017-11-09 16:38 ` Cornelia Huck
2017-11-09 18:55 ` Philippe Mathieu-Daudé
2017-11-09 19:20 ` Cornelia Huck
2017-11-13 15:36 ` Pierre Morel
2017-11-13 16:38 ` Cornelia Huck
2017-11-13 16:43 ` Pierre Morel
2017-11-13 9:34 ` Pierre Morel
2017-11-13 9:37 ` Pierre Morel
2017-11-07 17:24 ` [Qemu-devel] [PATCH 2/7] s390x/pci: rework PCI STORE Pierre Morel
2017-11-09 16:50 ` Cornelia Huck [this message]
2017-11-10 9:22 ` Yi Min Zhao
2017-11-13 9:03 ` Pierre Morel
2017-11-13 11:48 ` Cornelia Huck
2017-11-13 14:40 ` Pierre Morel
2017-11-07 17:24 ` [Qemu-devel] [PATCH 3/7] s390x/pci: rework PCI LOAD Pierre Morel
2017-11-09 16:51 ` Cornelia Huck
2017-11-13 9:07 ` Pierre Morel
2017-11-13 9:44 ` Pierre Morel
2017-11-07 17:24 ` [Qemu-devel] [PATCH 4/7] s390x/pci: rework PCI STORE BLOCK Pierre Morel
2017-11-13 15:23 ` Cornelia Huck
2017-11-13 16:38 ` Pierre Morel
2017-11-13 17:10 ` Cornelia Huck
2017-11-15 10:05 ` Pierre Morel
2017-11-07 17:24 ` [Qemu-devel] [PATCH 5/7] s390x/pci: move the memory region read from pcilg Pierre Morel
2017-11-07 17:24 ` [Qemu-devel] [PATCH 6/7] s390x/pci: move the memory region write from pcistg Pierre Morel
2017-11-09 19:23 ` Cornelia Huck
2017-11-10 9:40 ` Yi Min Zhao
2017-11-10 9:51 ` Cornelia Huck
2017-11-13 9:17 ` Pierre Morel
2017-11-13 9:39 ` Pierre Morel
2017-11-13 11:54 ` Cornelia Huck
2017-11-13 14:44 ` Pierre Morel
2017-11-07 17:24 ` [Qemu-devel] [PATCH 7/7] s390x/pci: search for subregion inside the BARs Pierre Morel
2017-11-13 16:03 ` Cornelia Huck
2017-11-07 17:31 ` [Qemu-devel] [PATCH 0/7] s390x/pci: Improve zPCI to cover more cases Cornelia Huck
2017-11-07 17:50 ` Christian Borntraeger
2017-11-08 8:46 ` Cornelia Huck
2017-11-13 17:13 ` Cornelia Huck
2017-11-15 10:02 ` Pierre Morel
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20171109175018.1c2f1b60.cohuck@redhat.com \
--to=cohuck@redhat.com \
--cc=agraf@suse.de \
--cc=borntraeger@de.ibm.com \
--cc=pasic@linux.vnet.ibm.com \
--cc=pmorel@linux.vnet.ibm.com \
--cc=qemu-devel@nongnu.org \
--cc=zyimin@linux.vnet.ibm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).