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From: Cornelia Huck <cohuck@redhat.com>
To: Pierre Morel <pmorel@linux.vnet.ibm.com>
Cc: qemu-devel@nongnu.org, agraf@suse.de, borntraeger@de.ibm.com,
	zyimin@linux.vnet.ibm.com, pasic@linux.vnet.ibm.com
Subject: Re: [Qemu-devel] [PATCH v3 2/7] s390x/pci: rework PCI STORE
Date: Thu, 23 Nov 2017 10:54:53 +0100	[thread overview]
Message-ID: <20171123105453.4263b000.cohuck@redhat.com> (raw)
In-Reply-To: <1511388334-16347-3-git-send-email-pmorel@linux.vnet.ibm.com>

On Wed, 22 Nov 2017 23:05:29 +0100
Pierre Morel <pmorel@linux.vnet.ibm.com> wrote:

> Enhance the fault detection, correction of the fault reporting.
> 
> Signed-off-by: Pierre Morel <pmorel@linux.vnet.ibm.com>
> Reviewed-by: Yi Min Zhao <zyimin@linux.vnet.ibm.com>
> ---
>  hw/s390x/s390-pci-inst.c | 39 ++++++++++++++++++++++-----------------
>  1 file changed, 22 insertions(+), 17 deletions(-)
> 
> diff --git a/hw/s390x/s390-pci-inst.c b/hw/s390x/s390-pci-inst.c
> index 3e1f1a0..930c197 100644
> --- a/hw/s390x/s390-pci-inst.c
> +++ b/hw/s390x/s390-pci-inst.c
> @@ -470,6 +470,12 @@ int pcistg_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2)
>      pcias = (env->regs[r2] >> 16) & 0xf;
>      len = env->regs[r2] & 0xf;
>      offset = env->regs[r2 + 1];
> +    data = env->regs[r1];
> +
> +    if (!(fh & FH_MASK_ENABLE)) {
> +        setcc(cpu, ZPCI_PCI_LS_INVAL_HANDLE);
> +        return 0;
> +    }
>  
>      pbdev = s390_pci_find_dev_by_fh(s390_get_phb(), fh);
>      if (!pbdev) {
> @@ -479,12 +485,7 @@ int pcistg_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2)
>      }
>  
>      switch (pbdev->state) {
> -    case ZPCI_FS_RESERVED:
> -    case ZPCI_FS_STANDBY:
> -    case ZPCI_FS_DISABLED:
>      case ZPCI_FS_PERMANENT_ERROR:
> -        setcc(cpu, ZPCI_PCI_LS_INVAL_HANDLE);
> -        return 0;

Maybe add a comment that the remaining states are already covered by
the FH_MASK_ENABLE check above?

>      case ZPCI_FS_ERROR:
>          setcc(cpu, ZPCI_PCI_LS_ERR);
>          s390_set_status_code(env, r2, ZPCI_PCI_ST_BLOCKED);
> @@ -493,9 +494,13 @@ int pcistg_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2)
>          break;
>      }
>  
> -    data = env->regs[r1];
> -    if (pcias < 6) {
> -        if ((8 - (offset & 0x7)) < len) {
> +    switch (pcias) {
> +        /* A ZPCI PCI card may use any BAR from BAR 0 to BAR 5 */
> +    case 0 ... 5:

Hm... I'd still prefer speaking #defines here.

> +        /* Check length:
> +         * A length of 0 is invalid and length should not cross a double word
> +         */
> +        if (!len || (len > (8 - (offset & 0x7)))) {
>              program_interrupt(env, PGM_OPERAND, 4);
>              return 0;
>          }
> @@ -513,21 +518,21 @@ int pcistg_service_call(S390CPU *cpu, uint8_t r1, uint8_t r2)
>              program_interrupt(env, PGM_OPERAND, 4);
>              return 0;
>          }
> -    } else if (pcias == 15) {
> -        if ((4 - (offset & 0x3)) < len) {
> -            program_interrupt(env, PGM_OPERAND, 4);
> -            return 0;
> -        }
> -
> -        if (zpci_endian_swap(&data, len)) {
> +        break;
> +    case 15:

And here.

> +        /* ZPCI uses the pseudo BAR number 15 as configuration space */
> +        /* possible access lengths are 1,2,4 and must not cross a word */
> +        if (!len || (len > (4 - (offset & 0x3))) || len == 3) {
>              program_interrupt(env, PGM_OPERAND, 4);
>              return 0;
>          }
> -
> +        /* len = 1,2,4 so we do not need to test */
> +        zpci_endian_swap(&data, len);
>          pci_host_config_write_common(pbdev->pdev, offset,
>                                       pci_config_size(pbdev->pdev),
>                                       data, len);
> -    } else {
> +        break;
> +    default:
>          DPRINTF("pcistg invalid space\n");
>          setcc(cpu, ZPCI_PCI_LS_ERR);
>          s390_set_status_code(env, r2, ZPCI_PCI_ST_INVAL_AS);

  parent reply	other threads:[~2017-11-23  9:55 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-11-22 22:05 [Qemu-devel] [PATCH v3 0/7] s390x/pci: Improve zPCI to cover more cases Pierre Morel
2017-11-22 22:05 ` [Qemu-devel] [PATCH v3 1/7] s390x/pci: factor out endianess conversion Pierre Morel
2017-11-23  8:48   ` Thomas Huth
2017-11-23  9:49     ` Cornelia Huck
2017-11-23 10:01       ` Thomas Huth
2017-11-23 10:08         ` Cornelia Huck
2017-11-23 10:25           ` Thomas Huth
2017-11-23 10:33             ` Cornelia Huck
2017-11-23 11:35               ` [Qemu-devel] [qemu-s390x] " Thomas Huth
2017-11-28 17:28                 ` Michael S. Tsirkin
2017-11-23 12:07               ` [Qemu-devel] " Yi Min Zhao
2017-11-23 12:18                 ` [Qemu-devel] [qemu-s390x] " Thomas Huth
2017-11-24  6:19                   ` Yi Min Zhao
2017-11-25 13:49                     ` Pierre Morel
2017-11-27  6:31                       ` Yi Min Zhao
2017-11-27  6:59                       ` Thomas Huth
2017-11-27  8:22                         ` Pierre Morel
2017-11-27 10:09                         ` Yi Min Zhao
2017-11-27 11:13                           ` Thomas Huth
2017-11-28  6:41                             ` Yi Min Zhao
2017-11-27 11:02                         ` Cornelia Huck
2017-11-27 14:34                           ` Cornelia Huck
2017-11-27 15:24                             ` Pierre Morel
2017-11-27 15:30                               ` Cornelia Huck
2017-11-27 15:53                                 ` Pierre Morel
2017-11-27 16:02                                   ` Cornelia Huck
2017-11-27 16:40                                     ` Pierre Morel
2017-11-28  6:48                                     ` Yi Min Zhao
2017-11-22 22:05 ` [Qemu-devel] [PATCH v3 2/7] s390x/pci: rework PCI STORE Pierre Morel
2017-11-23  9:01   ` Thomas Huth
2017-11-25 10:39     ` Pierre Morel
2017-11-27  6:45       ` Thomas Huth
2017-11-23  9:54   ` Cornelia Huck [this message]
2017-11-25 10:37     ` Pierre Morel
2017-11-22 22:05 ` [Qemu-devel] [PATCH v3 3/7] s390x/pci: rework PCI LOAD Pierre Morel
2017-11-22 22:05 ` [Qemu-devel] [PATCH v3 4/7] s390x/pci: rework PCI STORE BLOCK Pierre Morel
2017-11-23  9:26   ` Thomas Huth
2017-11-27  8:17     ` Pierre Morel
2017-11-22 22:05 ` [Qemu-devel] [PATCH v3 5/7] s390x/pci: move the memory region read from pcilg Pierre Morel
2017-11-23  9:32   ` Thomas Huth
2017-11-25 10:40     ` Pierre Morel
2017-11-22 22:05 ` [Qemu-devel] [PATCH v3 6/7] s390x/pci: move the memory region write from pcistg Pierre Morel
2017-11-23  9:36   ` Thomas Huth
2017-11-25 10:40     ` Pierre Morel
2017-11-22 22:05 ` [Qemu-devel] [PATCH v3 7/7] s390x/pci: search for subregion inside the BARs Pierre Morel
2017-11-23  9:54   ` Thomas Huth
2017-11-27  8:10     ` Pierre Morel
2017-11-22 22:38 ` [Qemu-devel] [PATCH v3 0/7] s390x/pci: Improve zPCI to cover more cases no-reply
2017-11-23 10:06   ` Christian Borntraeger
2017-11-23 13:11     ` Fam Zheng

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