From: David Hildenbrand <david@redhat.com>
To: qemu-s390x@nongnu.org, qemu-devel@nongnu.org
Cc: Christian Borntraeger <borntraeger@de.ibm.com>,
Cornelia Huck <cohuck@redhat.com>,
Richard Henderson <rth@twiddle.net>,
Alexander Graf <agraf@suse.de>,
David Hildenbrand <david@redhat.com>
Subject: [Qemu-devel] [PATCH v3 for-2.12 04/14] s390x/tcg: indicate value of TODPR in STCKE
Date: Fri, 8 Dec 2017 17:01:57 +0100 [thread overview]
Message-ID: <20171208160207.26494-5-david@redhat.com> (raw)
In-Reply-To: <20171208160207.26494-1-david@redhat.com>
We were not yet using the value of the TOD Programmable Register.
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
---
target/s390x/translate.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/target/s390x/translate.c b/target/s390x/translate.c
index d13f531c5b..38e1770e5e 100644
--- a/target/s390x/translate.c
+++ b/target/s390x/translate.c
@@ -3897,7 +3897,10 @@ static ExitStatus op_stcke(DisasContext *s, DisasOps *o)
{
TCGv_i64 c1 = tcg_temp_new_i64();
TCGv_i64 c2 = tcg_temp_new_i64();
+ TCGv_i64 todpr = tcg_temp_new_i64();
gen_helper_stck(c1, cpu_env);
+ /* 16 bit value store in an uint32_t (only valid bits set) */
+ tcg_gen_ld32u_i64(todpr, cpu_env, offsetof(CPUS390XState, todpr));
/* Shift the 64-bit value into its place as a zero-extended
104-bit value. Note that "bit positions 64-103 are always
non-zero so that they compare differently to STCK"; we set
@@ -3905,11 +3908,13 @@ static ExitStatus op_stcke(DisasContext *s, DisasOps *o)
tcg_gen_shli_i64(c2, c1, 56);
tcg_gen_shri_i64(c1, c1, 8);
tcg_gen_ori_i64(c2, c2, 0x10000);
+ tcg_gen_or_i64(c2, c2, todpr);
tcg_gen_qemu_st64(c1, o->in2, get_mem_index(s));
tcg_gen_addi_i64(o->in2, o->in2, 8);
tcg_gen_qemu_st64(c2, o->in2, get_mem_index(s));
tcg_temp_free_i64(c1);
tcg_temp_free_i64(c2);
+ tcg_temp_free_i64(todpr);
/* ??? We don't implement clock states. */
gen_op_movi_cc(s, 0);
return NO_EXIT;
--
2.14.3
next prev parent reply other threads:[~2017-12-08 16:02 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-08 16:01 [Qemu-devel] [PATCH v3 for-2.12 00/14] s390x/tcg: CCW hotplug, facilities, instructions David Hildenbrand
2017-12-08 16:01 ` [Qemu-devel] [PATCH v3 for-2.12 01/14] s390x/kvm: factor out build_channel_report_mcic() into cpu.h David Hildenbrand
2017-12-09 2:17 ` Richard Henderson
2017-12-08 16:01 ` [Qemu-devel] [PATCH v3 for-2.12 02/14] s390x/tcg: fix and cleanup mcck injection David Hildenbrand
2017-12-08 16:01 ` [Qemu-devel] [PATCH v3 for-2.12 03/14] s390x/tcg: implement SET CLOCK PROGRAMMABLE FIELD David Hildenbrand
2017-12-09 2:20 ` Richard Henderson
2017-12-08 16:01 ` David Hildenbrand [this message]
2017-12-08 16:01 ` [Qemu-devel] [PATCH v3 for-2.12 05/14] s390x/tcg: wire up STORE CHANNEL REPORT WORD David Hildenbrand
2017-12-08 16:01 ` [Qemu-devel] [PATCH v3 for-2.12 06/14] s390x/tcg: ASI/ASGI/ALSI/ALSGI are atomic with Interlocked-acccess facility 1 David Hildenbrand
2017-12-08 16:02 ` [Qemu-devel] [PATCH v3 for-2.12 07/14] s390x/tcg: implement Interlocked-Access Facility 2 David Hildenbrand
2017-12-08 16:02 ` [Qemu-devel] [PATCH v3 for-2.12 08/14] s390x/tcg: wire up SET ADDRESS LIMIT David Hildenbrand
2017-12-08 16:02 ` [Qemu-devel] [PATCH v3 for-2.12 09/14] s390x/tcg: wire up SET CHANNEL MONITOR David Hildenbrand
2017-12-08 16:02 ` [Qemu-devel] [PATCH v3 for-2.12 10/14] s390x/tcg: Implement STORE CHANNEL PATH STATUS David Hildenbrand
2017-12-08 16:02 ` [Qemu-devel] [PATCH v3 for-2.12 11/14] s390x/tcg: Implement SIGNAL ADAPTER instruction David Hildenbrand
2017-12-08 16:02 ` [Qemu-devel] [PATCH v3 for-2.12 12/14] s390x/tcg: implement extract-CPU-time facility David Hildenbrand
2017-12-08 16:02 ` [Qemu-devel] [PATCH v3 for-2.12 13/14] s390x/tcg: we already implement the Set-Program-Parameter facility David Hildenbrand
2017-12-08 16:02 ` [Qemu-devel] [PATCH v3 for-2.12 14/14] s390x: change the QEMU cpu model to a stripped down z12 David Hildenbrand
2017-12-08 16:26 ` Cornelia Huck
2017-12-08 16:29 ` David Hildenbrand
2017-12-08 16:34 ` Daniel P. Berrange
2017-12-08 16:39 ` David Hildenbrand
2017-12-08 16:55 ` [Qemu-devel] [PATCH v4 for-2-12] " David Hildenbrand
2017-12-13 13:24 ` [Qemu-devel] [PATCH v1] s390x/cpumodel: make qemu cpu model play with "none" machine David Hildenbrand
2017-12-13 13:34 ` [Qemu-devel] [qemu-s390x] " Christian Borntraeger
2017-12-13 13:38 ` David Hildenbrand
2017-12-13 17:17 ` [Qemu-devel] " Cornelia Huck
2017-12-14 12:18 ` Cornelia Huck
2017-12-13 17:15 ` [Qemu-devel] [PATCH v1] s390x/tcg: don't include z13 features in the qemu model David Hildenbrand
2017-12-13 17:21 ` Cornelia Huck
2017-12-14 12:19 ` Cornelia Huck
2017-12-11 10:13 ` [Qemu-devel] [PATCH v3 for-2.12 00/14] s390x/tcg: CCW hotplug, facilities, instructions Cornelia Huck
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20171208160207.26494-5-david@redhat.com \
--to=david@redhat.com \
--cc=agraf@suse.de \
--cc=borntraeger@de.ibm.com \
--cc=cohuck@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=qemu-s390x@nongnu.org \
--cc=rth@twiddle.net \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).