From: "Alex Bennée" <alex.bennee@linaro.org>
To: richard.henderson@linaro.org, peter.maydell@linaro.org,
laurent@vivier.eu, bharata@linux.vnet.ibm.com,
andrew@andrewdutcher.com, aleksandar.markovic@imgtec.com
Cc: qemu-devel@nongnu.org, "Alex Bennée" <alex.bennee@linaro.org>,
"Aurelien Jarno" <aurelien@aurel32.net>
Subject: [Qemu-devel] [PATCH v1 18/19] fpu/softfloat: re-factor minmax
Date: Mon, 11 Dec 2017 12:57:04 +0000 [thread overview]
Message-ID: <20171211125705.16120-19-alex.bennee@linaro.org> (raw)
In-Reply-To: <20171211125705.16120-1-alex.bennee@linaro.org>
Let's do the same re-factor treatment for minmax functions. I still
use the MACRO trick to expand but now all the checking code is common.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
fpu/softfloat.c | 242 ++++++++++++++++++++++++++----------------------
include/fpu/softfloat.h | 6 ++
2 files changed, 137 insertions(+), 111 deletions(-)
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index b7ea56dfa5..5eba996932 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -1662,6 +1662,137 @@ float64 uint16_to_float64(uint16_t a, float_status *status)
return uint64_to_float64((uint64_t) a, status);
}
+/* Float Min/Max */
+/* min() and max() functions. These can't be implemented as
+ * 'compare and pick one input' because that would mishandle
+ * NaNs and +0 vs -0.
+ *
+ * minnum() and maxnum() functions. These are similar to the min()
+ * and max() functions but if one of the arguments is a QNaN and
+ * the other is numerical then the numerical argument is returned.
+ * SNaNs will get quietened before being returned.
+ * minnum() and maxnum correspond to the IEEE 754-2008 minNum()
+ * and maxNum() operations. min() and max() are the typical min/max
+ * semantics provided by many CPUs which predate that specification.
+ *
+ * minnummag() and maxnummag() functions correspond to minNumMag()
+ * and minNumMag() from the IEEE-754 2008.
+ */
+static decomposed_parts minmax_decomposed(decomposed_parts a,
+ decomposed_parts b,
+ bool ismin, bool ieee, bool ismag,
+ float_status *s)
+{
+ if (a.cls >= float_class_qnan
+ ||
+ b.cls >= float_class_qnan)
+ {
+ if (ieee) {
+ /* Takes two floating-point values `a' and `b', one of
+ * which is a NaN, and returns the appropriate NaN
+ * result. If either `a' or `b' is a signaling NaN,
+ * the invalid exception is raised.
+ */
+ if (a.cls == float_class_snan || b.cls == float_class_snan) {
+ s->float_exception_flags |= float_flag_invalid;
+ if (s->default_nan_mode) {
+ a.cls = float_class_msnan;
+ return a;
+ }
+ } else if (a.cls >= float_class_qnan
+ &&
+ b.cls < float_class_qnan) {
+ return b;
+ } else if (b.cls >= float_class_qnan
+ &&
+ a.cls < float_class_qnan) {
+ return a;
+ }
+ }
+ return pick_nan_parts(a, b, s);
+ }
+
+ /* Handle zero cases */
+ if (a.cls == float_class_zero || b.cls == float_class_zero) {
+ if (a.cls == float_class_normal) {
+ if (a.sign) {
+ return ismin ? a : b;
+ } else {
+ return ismin ? b : a;
+ }
+ } else if (b.cls == float_class_normal) {
+ if (b.sign) {
+ return ismin ? b : a;
+ } else {
+ return ismin ? a : b;
+ }
+ }
+ }
+
+ if (ismag) {
+ /* Magnitude, ignore sign */
+ bool a_less;
+ if (a.exp == b.exp) {
+ a_less = a.frac < b.frac;
+ } else {
+ a_less = a.exp < b.exp;
+ }
+ return a_less == ismin ? a : b;
+ }
+ if (a.sign != b.sign) {
+ if (ismin) {
+ return a.sign ? a : b;
+ } else {
+ return a.sign ? b : a;
+ }
+ } else {
+ bool a_less;
+ if (a.exp == b.exp) {
+ a_less = a.frac < b.frac;
+ } else {
+ a_less = a.exp < b.exp;
+ }
+ if (ismin) {
+ return a.sign ^ a_less ? a : b;
+ } else {
+ return a.sign ^ a_less ? b : a;
+ }
+ }
+}
+
+#define MINMAX(sz, name, ismin, isiee, ismag) \
+float ## sz float ## sz ## _ ## name(float ## sz a, float ## sz b, float_status *s) \
+{ \
+ decomposed_parts pa = float ## sz ## _unpack_canonical(a, s); \
+ decomposed_parts pb = float ## sz ## _unpack_canonical(b, s); \
+ decomposed_parts pr = minmax_decomposed(pa, pb, ismin, isiee, ismag, s); \
+ \
+ return float ## sz ## _round_pack_canonical(pr, s); \
+}
+
+MINMAX(16, min, true, false, false)
+MINMAX(16, minnum, true, true, false)
+MINMAX(16, minnummag, true, true, true)
+MINMAX(16, max, false, false, false)
+MINMAX(16, maxnum, false, true, false)
+MINMAX(16, maxnummag, false, true, true)
+
+MINMAX(32, min, true, false, false)
+MINMAX(32, minnum, true, true, false)
+MINMAX(32, minnummag, true, true, true)
+MINMAX(32, max, false, false, false)
+MINMAX(32, maxnum, false, true, false)
+MINMAX(32, maxnummag, false, true, true)
+
+MINMAX(64, min, true, false, false)
+MINMAX(64, minnum, true, true, false)
+MINMAX(64, minnummag, true, true, true)
+MINMAX(64, max, false, false, false)
+MINMAX(64, maxnum, false, true, false)
+MINMAX(64, maxnummag, false, true, true)
+
+#undef MINMAX
+
/* Multiply A by 2 raised to the power N. */
static decomposed_parts scalbn_decomposed(decomposed_parts a, int n,
float_status *s)
@@ -6911,117 +7042,6 @@ int float128_compare_quiet(float128 a, float128 b, float_status *status)
return float128_compare_internal(a, b, 1, status);
}
-/* min() and max() functions. These can't be implemented as
- * 'compare and pick one input' because that would mishandle
- * NaNs and +0 vs -0.
- *
- * minnum() and maxnum() functions. These are similar to the min()
- * and max() functions but if one of the arguments is a QNaN and
- * the other is numerical then the numerical argument is returned.
- * SNaNs will get quietened before being returned.
- * minnum() and maxnum correspond to the IEEE 754-2008 minNum()
- * and maxNum() operations. min() and max() are the typical min/max
- * semantics provided by many CPUs which predate that specification.
- *
- * minnummag() and maxnummag() functions correspond to minNumMag()
- * and minNumMag() from the IEEE-754 2008.
- */
-#define MINMAX(s) \
-static inline float ## s float ## s ## _minmax(float ## s a, float ## s b, \
- int ismin, int isieee, \
- int ismag, \
- float_status *status) \
-{ \
- flag aSign, bSign; \
- uint ## s ## _t av, bv, aav, abv; \
- a = float ## s ## _squash_input_denormal(a, status); \
- b = float ## s ## _squash_input_denormal(b, status); \
- if (float ## s ## _is_any_nan(a) || \
- float ## s ## _is_any_nan(b)) { \
- if (isieee) { \
- if (float ## s ## _is_signaling_nan(a, status) || \
- float ## s ## _is_signaling_nan(b, status)) { \
- return propagateFloat ## s ## NaN(a, b, status); \
- } else if (float ## s ## _is_quiet_nan(a, status) && \
- !float ## s ##_is_any_nan(b)) { \
- return b; \
- } else if (float ## s ## _is_quiet_nan(b, status) && \
- !float ## s ## _is_any_nan(a)) { \
- return a; \
- } \
- } \
- return propagateFloat ## s ## NaN(a, b, status); \
- } \
- aSign = extractFloat ## s ## Sign(a); \
- bSign = extractFloat ## s ## Sign(b); \
- av = float ## s ## _val(a); \
- bv = float ## s ## _val(b); \
- if (ismag) { \
- aav = float ## s ## _abs(av); \
- abv = float ## s ## _abs(bv); \
- if (aav != abv) { \
- if (ismin) { \
- return (aav < abv) ? a : b; \
- } else { \
- return (aav < abv) ? b : a; \
- } \
- } \
- } \
- if (aSign != bSign) { \
- if (ismin) { \
- return aSign ? a : b; \
- } else { \
- return aSign ? b : a; \
- } \
- } else { \
- if (ismin) { \
- return (aSign ^ (av < bv)) ? a : b; \
- } else { \
- return (aSign ^ (av < bv)) ? b : a; \
- } \
- } \
-} \
- \
-float ## s float ## s ## _min(float ## s a, float ## s b, \
- float_status *status) \
-{ \
- return float ## s ## _minmax(a, b, 1, 0, 0, status); \
-} \
- \
-float ## s float ## s ## _max(float ## s a, float ## s b, \
- float_status *status) \
-{ \
- return float ## s ## _minmax(a, b, 0, 0, 0, status); \
-} \
- \
-float ## s float ## s ## _minnum(float ## s a, float ## s b, \
- float_status *status) \
-{ \
- return float ## s ## _minmax(a, b, 1, 1, 0, status); \
-} \
- \
-float ## s float ## s ## _maxnum(float ## s a, float ## s b, \
- float_status *status) \
-{ \
- return float ## s ## _minmax(a, b, 0, 1, 0, status); \
-} \
- \
-float ## s float ## s ## _minnummag(float ## s a, float ## s b, \
- float_status *status) \
-{ \
- return float ## s ## _minmax(a, b, 1, 1, 1, status); \
-} \
- \
-float ## s float ## s ## _maxnummag(float ## s a, float ## s b, \
- float_status *status) \
-{ \
- return float ## s ## _minmax(a, b, 0, 1, 1, status); \
-}
-
-MINMAX(32)
-MINMAX(64)
-
-
floatx80 floatx80_scalbn(floatx80 a, int n, float_status *status)
{
flag aSign;
diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
index c1224aab8c..ba248ffa39 100644
--- a/include/fpu/softfloat.h
+++ b/include/fpu/softfloat.h
@@ -354,6 +354,12 @@ float16 float16_mul(float16, float16, float_status *status);
float16 float16_muladd(float16, float16, float16, int, float_status *status);
float16 float16_div(float16, float16, float_status *status);
float16 float16_scalbn(float16, int, float_status *status);
+float16 float16_min(float16, float16, float_status *status);
+float16 float16_max(float16, float16, float_status *status);
+float16 float16_minnum(float16, float16, float_status *status);
+float16 float16_maxnum(float16, float16, float_status *status);
+float16 float16_minnummag(float16, float16, float_status *status);
+float16 float16_maxnummag(float16, float16, float_status *status);
int float16_is_quiet_nan(float16, float_status *status);
int float16_is_signaling_nan(float16, float_status *status);
--
2.15.1
next prev parent reply other threads:[~2017-12-11 13:06 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-11 12:56 [Qemu-devel] [PATCH v1 00/19] re-factor softfloat and add fp16 functions Alex Bennée
2017-12-11 12:56 ` [Qemu-devel] [PATCH v1 01/19] fpu/softfloat: implement float16_squash_input_denormal Alex Bennée
2017-12-11 12:56 ` [Qemu-devel] [PATCH v1 02/19] include/fpu/softfloat: implement float16_abs helper Alex Bennée
2017-12-15 11:35 ` Philippe Mathieu-Daudé
2017-12-11 12:56 ` [Qemu-devel] [PATCH v1 03/19] include/fpu/softfloat: implement float16_chs helper Alex Bennée
2017-12-18 21:41 ` Richard Henderson
2017-12-11 12:56 ` [Qemu-devel] [PATCH v1 04/19] include/fpu/softfloat: implement float16_set_sign helper Alex Bennée
2017-12-18 21:44 ` Richard Henderson
2017-12-19 7:31 ` Alex Bennée
2018-01-08 12:58 ` Alex Bennée
2018-01-08 20:25 ` Richard Henderson
2018-01-05 16:15 ` Philippe Mathieu-Daudé
2017-12-11 12:56 ` [Qemu-devel] [PATCH v1 05/19] include/fpu/softfloat: add some float16 contants Alex Bennée
2017-12-15 12:24 ` Alex Bennée
2017-12-15 13:37 ` Philippe Mathieu-Daudé
2017-12-18 21:50 ` Richard Henderson
2018-01-04 14:09 ` Alex Bennée
2018-01-04 15:05 ` Richard Henderson
2017-12-11 12:56 ` [Qemu-devel] [PATCH v1 06/19] fpu/softfloat: propagate signalling NaNs in MINMAX Alex Bennée
2017-12-18 21:53 ` Richard Henderson
2018-01-05 13:05 ` Alex Bennée
2017-12-11 12:56 ` [Qemu-devel] [PATCH v1 07/19] fpu/softfloat: improve comments on ARM NaN propagation Alex Bennée
2017-12-18 21:54 ` Richard Henderson
2017-12-11 12:56 ` [Qemu-devel] [PATCH v1 08/19] fpu/softfloat: move the extract functions to the top of the file Alex Bennée
2017-12-18 21:57 ` Richard Henderson
2017-12-11 12:56 ` [Qemu-devel] [PATCH v1 09/19] fpu/softfloat: define decompose structures Alex Bennée
2017-12-18 21:59 ` Richard Henderson
2017-12-11 12:56 ` [Qemu-devel] [PATCH v1 10/19] fpu/softfloat: re-factor add/sub Alex Bennée
2017-12-18 22:18 ` Richard Henderson
2017-12-11 12:56 ` [Qemu-devel] [PATCH v1 11/19] fpu/softfloat: re-factor mul Alex Bennée
2017-12-18 22:22 ` Richard Henderson
2017-12-11 12:56 ` [Qemu-devel] [PATCH v1 12/19] fpu/softfloat: re-factor div Alex Bennée
2017-12-18 22:26 ` Richard Henderson
2017-12-11 12:56 ` [Qemu-devel] [PATCH v1 13/19] fpu/softfloat: re-factor muladd Alex Bennée
2017-12-18 22:36 ` Richard Henderson
2017-12-11 12:57 ` [Qemu-devel] [PATCH v1 14/19] fpu/softfloat: re-factor round_to_int Alex Bennée
2017-12-18 22:41 ` Richard Henderson
2017-12-11 12:57 ` [Qemu-devel] [PATCH v1 15/19] fpu/softfloat: re-factor float to int/uint Alex Bennée
2017-12-18 22:54 ` Richard Henderson
2017-12-11 12:57 ` [Qemu-devel] [PATCH v1 16/19] fpu/softfloat: re-factor int/uint to float Alex Bennée
2017-12-12 17:21 ` Alex Bennée
2017-12-18 22:59 ` Richard Henderson
2018-01-05 15:51 ` Alex Bennée
2017-12-11 12:57 ` [Qemu-devel] [PATCH v1 17/19] fpu/softfloat: re-factor scalbn Alex Bennée
2017-12-18 23:00 ` Richard Henderson
2017-12-11 12:57 ` Alex Bennée [this message]
2017-12-18 23:19 ` [Qemu-devel] [PATCH v1 18/19] fpu/softfloat: re-factor minmax Richard Henderson
2017-12-11 12:57 ` [Qemu-devel] [PATCH v1 19/19] fpu/softfloat: re-factor compare Alex Bennée
2017-12-18 23:26 ` Richard Henderson
2017-12-11 13:42 ` [Qemu-devel] [PATCH v1 00/19] re-factor softfloat and add fp16 functions no-reply
2017-12-11 15:40 ` Alex Bennée
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