* [Qemu-devel] [PATCH v1] display: limit irq handler index to TC6393XB_GPIOS
@ 2017-12-12 4:15 P J P
2017-12-12 18:03 ` Peter Maydell
0 siblings, 1 reply; 2+ messages in thread
From: P J P @ 2017-12-12 4:15 UTC (permalink / raw)
To: Qemu Developers; +Cc: Peter Maydell, Moguofang, qemu-arm, Prasad J Pandit
From: Prasad J Pandit <pjp@fedoraproject.org>
The ctz32() routine could return value greater than
TC6393XB_GPIOS=16. This could lead to an OOB array access.
Mask 'level' to avoid it.
Reported-by: Moguofang <moguofang@huawei.com>
Signed-off-by: Prasad J Pandit <pjp@fedoraproject.org>
---
hw/display/tc6393xb.c | 1 +
1 file changed, 1 insertion(+)
Update: mask 'level' value to TC6393XB_GPIOS=16
-> https://lists.gnu.org/archive/html/qemu-devel/2017-12/msg01685.html
diff --git a/hw/display/tc6393xb.c b/hw/display/tc6393xb.c
index 74d10af3d4..0ae63605f0 100644
--- a/hw/display/tc6393xb.c
+++ b/hw/display/tc6393xb.c
@@ -172,6 +172,7 @@ static void tc6393xb_gpio_handler_update(TC6393xbState *s)
int bit;
level = s->gpio_level & s->gpio_dir;
+ level &= MAKE_64BIT_MASK(0, TC6393XB_GPIOS);
for (diff = s->prev_level ^ level; diff; diff ^= 1 << bit) {
bit = ctz32(diff);
--
2.13.6
^ permalink raw reply related [flat|nested] 2+ messages in thread* Re: [Qemu-devel] [PATCH v1] display: limit irq handler index to TC6393XB_GPIOS
2017-12-12 4:15 [Qemu-devel] [PATCH v1] display: limit irq handler index to TC6393XB_GPIOS P J P
@ 2017-12-12 18:03 ` Peter Maydell
0 siblings, 0 replies; 2+ messages in thread
From: Peter Maydell @ 2017-12-12 18:03 UTC (permalink / raw)
To: P J P; +Cc: Qemu Developers, Moguofang, qemu-arm, Prasad J Pandit
On 12 December 2017 at 04:15, P J P <ppandit@redhat.com> wrote:
> From: Prasad J Pandit <pjp@fedoraproject.org>
>
> The ctz32() routine could return value greater than
> TC6393XB_GPIOS=16. This could lead to an OOB array access.
> Mask 'level' to avoid it.
>
> Reported-by: Moguofang <moguofang@huawei.com>
> Signed-off-by: Prasad J Pandit <pjp@fedoraproject.org>
> ---
> hw/display/tc6393xb.c | 1 +
> 1 file changed, 1 insertion(+)
>
> Update: mask 'level' value to TC6393XB_GPIOS=16
> -> https://lists.gnu.org/archive/html/qemu-devel/2017-12/msg01685.html
>
> diff --git a/hw/display/tc6393xb.c b/hw/display/tc6393xb.c
> index 74d10af3d4..0ae63605f0 100644
> --- a/hw/display/tc6393xb.c
> +++ b/hw/display/tc6393xb.c
> @@ -172,6 +172,7 @@ static void tc6393xb_gpio_handler_update(TC6393xbState *s)
> int bit;
>
> level = s->gpio_level & s->gpio_dir;
> + level &= MAKE_64BIT_MASK(0, TC6393XB_GPIOS);
>
> for (diff = s->prev_level ^ level; diff; diff ^= 1 << bit) {
> bit = ctz32(diff);
Thanks; applied to target-arm.next for 2.12.
-- PMM
^ permalink raw reply [flat|nested] 2+ messages in thread
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2017-12-12 4:15 [Qemu-devel] [PATCH v1] display: limit irq handler index to TC6393XB_GPIOS P J P
2017-12-12 18:03 ` Peter Maydell
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