From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: Alistair Francis <alistair.francis@xilinx.com>,
"Edgar E . Iglesias" <edgar.iglesias@xilinx.com>,
Peter Maydell <peter.maydell@linaro.org>
Cc: "Philippe Mathieu-Daudé" <f4bug@amsat.org>,
qemu-devel@nongnu.org, "Prasad J Pandit" <pjp@fedoraproject.org>,
"Peter Crosthwaite" <crosthwaite.peter@gmail.com>,
"Sai Pavan Boddu" <saipava@xilinx.com>
Subject: [Qemu-devel] [PATCH 5/8] sdhci: add check_capab_readonly() qtest
Date: Wed, 13 Dec 2017 23:00:22 -0300 [thread overview]
Message-ID: <20171214020025.4004-6-f4bug@amsat.org> (raw)
In-Reply-To: <20171214020025.4004-1-f4bug@amsat.org>
read the CAPAB register.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
tests/sdhci-test.c | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/tests/sdhci-test.c b/tests/sdhci-test.c
index 4ebe1e349b..01373a69df 100644
--- a/tests/sdhci-test.c
+++ b/tests/sdhci-test.c
@@ -9,6 +9,7 @@
#include "qemu/osdep.h"
#include "libqtest.h"
+#define SDHC_CAPAB 0x40
#define SDHC_HCVER 0xFE
static const struct sdhci_t {
@@ -36,6 +37,20 @@ static uint32_t sdhci_readl(uintptr_t base, uint32_t reg_addr)
return qtest_readl(qtest, base + reg_addr);
}
+static uint64_t sdhci_readq(uintptr_t base, uint32_t reg_addr)
+{
+ QTestState *qtest = global_qtest;
+
+ return qtest_readq(qtest, base + reg_addr);
+}
+
+static void sdhci_writeq(uintptr_t base, uint32_t reg_addr, uint64_t value)
+{
+ QTestState *qtest = global_qtest;
+
+ qtest_writeq(qtest, base + reg_addr, value);
+}
+
static void check_specs_version(uintptr_t addr, uint8_t version)
{
uint32_t v;
@@ -46,6 +61,20 @@ static void check_specs_version(uintptr_t addr, uint8_t version)
g_assert_cmpuint(v, ==, version);
}
+static void check_capab_readonly(uintptr_t addr)
+{
+ const uint64_t vrand = 0x123456789abcdef;
+ uint64_t capab0, capab1;
+
+ capab0 = sdhci_readq(addr, SDHC_CAPAB);
+ g_assert_cmpuint(capab0, !=, vrand);
+
+ sdhci_writeq(addr, SDHC_CAPAB, vrand);
+ capab1 = sdhci_readq(addr, SDHC_CAPAB);
+ g_assert_cmpuint(capab1, !=, vrand);
+ g_assert_cmpuint(capab1, ==, capab0);
+}
+
static void test_machine(const void *data)
{
const struct sdhci_t *test = data;
@@ -53,6 +82,7 @@ static void test_machine(const void *data)
global_qtest = qtest_startf("-machine %s -d unimp", test->machine);
check_specs_version(test->sdhci.addr, test->sdhci.version);
+ check_capab_readonly(test->sdhci.addr);
qtest_quit(global_qtest);
}
--
2.15.1
next prev parent reply other threads:[~2017-12-14 2:01 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-14 2:00 [Qemu-devel] [PATCH 0/8] SDHCI: add a qtest and fix few issues Philippe Mathieu-Daudé
2017-12-14 2:00 ` [Qemu-devel] [PATCH 1/8] sdhci: add a "sd-spec-version" property Philippe Mathieu-Daudé
2017-12-15 23:55 ` Alistair Francis
2017-12-14 2:00 ` [Qemu-devel] [PATCH 2/8] sdhci: some ARM boards do support SD_HOST_SPECv3_VERS Philippe Mathieu-Daudé
2017-12-16 0:00 ` Alistair Francis
2017-12-14 2:00 ` [Qemu-devel] [PATCH 3/8] sdhci: add qtest to check the SD Spec version Philippe Mathieu-Daudé
2017-12-14 2:00 ` [Qemu-devel] [PATCH 4/8] sdhci: fix CAPAB/MAXCURR registers, both are 64bit and read-only Philippe Mathieu-Daudé
2017-12-16 0:11 ` Alistair Francis
2017-12-14 2:00 ` Philippe Mathieu-Daudé [this message]
2017-12-14 2:00 ` [Qemu-devel] [PATCH 6/8] sdhci: add a check_capab_baseclock() qtest Philippe Mathieu-Daudé
2017-12-14 2:00 ` [Qemu-devel] [RFC PATCH 7/8] sdhci: add a check_capab_sdma() qtest Philippe Mathieu-Daudé
2017-12-14 2:00 ` [Qemu-devel] [PATCH 8/8] sdhci: add a check_capab_v3() qtest Philippe Mathieu-Daudé
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