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* [Qemu-devel] [PATCH v3 0/2] Add clflushopt to "Skylake-Server" cpu model
@ 2017-12-19  3:37 Haozhong Zhang
  2017-12-19  3:37 ` [Qemu-devel] [PATCH v3 1/2] pc: add 2.12 machine types Haozhong Zhang
  2017-12-19  3:37 ` [Qemu-devel] [PATCH v3 2/2] target/i386: add clflushopt to "Skylake-Server" cpu model Haozhong Zhang
  0 siblings, 2 replies; 5+ messages in thread
From: Haozhong Zhang @ 2017-12-19  3:37 UTC (permalink / raw)
  To: qemu-devel
  Cc: mst, Paolo Bonzini, Richard Henderson, Eduardo Habkost,
	Haozhong Zhang

Changes in v3:
 * Rebase on QEMU 2.12.
 * Add 2.12 PC machine types. Denis V. Lunev has already posted a
   similar patch [1]. If that one is merged first, please ignore patch 1
   in this patch series.

[1] https://lists.nongnu.org/archive/html/qemu-devel/2017-12/msg02961.html

Haozhong Zhang (2):
  pc: add 2.12 machine types
  target/i386: add clflushopt to "Skylake-Server" cpu model

 hw/i386/pc_piix.c    | 15 ++++++++++++---
 hw/i386/pc_q35.c     | 13 +++++++++++--
 include/hw/i386/pc.h |  8 ++++++++
 target/i386/cpu.c    |  2 +-
 4 files changed, 32 insertions(+), 6 deletions(-)

-- 
2.14.1

^ permalink raw reply	[flat|nested] 5+ messages in thread

* [Qemu-devel] [PATCH v3 1/2] pc: add 2.12 machine types
  2017-12-19  3:37 [Qemu-devel] [PATCH v3 0/2] Add clflushopt to "Skylake-Server" cpu model Haozhong Zhang
@ 2017-12-19  3:37 ` Haozhong Zhang
  2017-12-19  3:37 ` [Qemu-devel] [PATCH v3 2/2] target/i386: add clflushopt to "Skylake-Server" cpu model Haozhong Zhang
  1 sibling, 0 replies; 5+ messages in thread
From: Haozhong Zhang @ 2017-12-19  3:37 UTC (permalink / raw)
  To: qemu-devel
  Cc: mst, Paolo Bonzini, Richard Henderson, Eduardo Habkost,
	Haozhong Zhang

Signed-off-by: Haozhong Zhang <haozhong.zhang@intel.com>
---
 hw/i386/pc_piix.c    | 15 ++++++++++++---
 hw/i386/pc_q35.c     | 13 +++++++++++--
 include/hw/i386/pc.h |  3 +++
 3 files changed, 26 insertions(+), 5 deletions(-)

diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 5e47528993..f235ee12c2 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -430,21 +430,30 @@ static void pc_i440fx_machine_options(MachineClass *m)
     m->default_display = "std";
 }
 
-static void pc_i440fx_2_11_machine_options(MachineClass *m)
+static void pc_i440fx_2_12_machine_options(MachineClass *m)
 {
     pc_i440fx_machine_options(m);
     m->alias = "pc";
     m->is_default = 1;
 }
 
+DEFINE_I440FX_MACHINE(v2_12, "pc-i440fx-2.12", NULL,
+                      pc_i440fx_2_12_machine_options);
+
+static void pc_i440fx_2_11_machine_options(MachineClass *m)
+{
+    pc_i440fx_2_12_machine_options(m);
+    m->is_default = 0;
+    m->alias = NULL;
+    SET_MACHINE_COMPAT(m, PC_COMPAT_2_11);
+}
+
 DEFINE_I440FX_MACHINE(v2_11, "pc-i440fx-2.11", NULL,
                       pc_i440fx_2_11_machine_options);
 
 static void pc_i440fx_2_10_machine_options(MachineClass *m)
 {
     pc_i440fx_2_11_machine_options(m);
-    m->is_default = 0;
-    m->alias = NULL;
     SET_MACHINE_COMPAT(m, PC_COMPAT_2_10);
     m->auto_enable_numa_with_memhp = false;
 }
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index d6060043ac..5c6c608fcb 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -303,19 +303,28 @@ static void pc_q35_machine_options(MachineClass *m)
     m->max_cpus = 288;
 }
 
-static void pc_q35_2_11_machine_options(MachineClass *m)
+static void pc_q35_2_12_machine_options(MachineClass *m)
 {
     pc_q35_machine_options(m);
     m->alias = "q35";
 }
 
+DEFINE_Q35_MACHINE(v2_12, "pc-q35-2.12", NULL,
+                   pc_q35_2_12_machine_options);
+
+static void pc_q35_2_11_machine_options(MachineClass *m)
+{
+    pc_q35_2_12_machine_options(m);
+    m->alias = NULL;
+    SET_MACHINE_COMPAT(m, PC_COMPAT_2_11);
+}
+
 DEFINE_Q35_MACHINE(v2_11, "pc-q35-2.11", NULL,
                    pc_q35_2_11_machine_options);
 
 static void pc_q35_2_10_machine_options(MachineClass *m)
 {
     pc_q35_2_11_machine_options(m);
-    m->alias = NULL;
     SET_MACHINE_COMPAT(m, PC_COMPAT_2_10);
     m->numa_auto_assign_ram = numa_legacy_auto_assign_ram;
     m->auto_enable_numa_with_memhp = false;
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 6f77eb0665..83d825e896 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -321,6 +321,9 @@ int e820_add_entry(uint64_t, uint64_t, uint32_t);
 int e820_get_num_entries(void);
 bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
 
+#define PC_COMPAT_2_11 \
+    HW_COMPAT_2_11 \
+
 #define PC_COMPAT_2_10 \
     HW_COMPAT_2_10 \
     {\
-- 
2.14.1

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [Qemu-devel] [PATCH v3 2/2] target/i386: add clflushopt to "Skylake-Server" cpu model
  2017-12-19  3:37 [Qemu-devel] [PATCH v3 0/2] Add clflushopt to "Skylake-Server" cpu model Haozhong Zhang
  2017-12-19  3:37 ` [Qemu-devel] [PATCH v3 1/2] pc: add 2.12 machine types Haozhong Zhang
@ 2017-12-19  3:37 ` Haozhong Zhang
  2017-12-19 16:35   ` Eduardo Habkost
  1 sibling, 1 reply; 5+ messages in thread
From: Haozhong Zhang @ 2017-12-19  3:37 UTC (permalink / raw)
  To: qemu-devel
  Cc: mst, Paolo Bonzini, Richard Henderson, Eduardo Habkost,
	Haozhong Zhang

CPUID_7_0_EBX_CLFLUSHOPT is missed in current "Skylake-Server" cpu
model. Add it to "Skylake-Server" cpu model on pc-i440fx-2.12 and
pc-q35-2.12. Keep it disabled in "Skylake-Server" cpu model on older
machine types.

Signed-off-by: Haozhong Zhang <haozhong.zhang@intel.com>
---
 include/hw/i386/pc.h | 5 +++++
 target/i386/cpu.c    | 2 +-
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 83d825e896..bb49165fe0 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -323,6 +323,11 @@ bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
 
 #define PC_COMPAT_2_11 \
     HW_COMPAT_2_11 \
+    {\
+        .driver   = "Skylake-Server" "-" TYPE_X86_CPU,\
+        .property = "clflushopt",\
+        .value    = "off",\
+    },
 
 #define PC_COMPAT_2_10 \
     HW_COMPAT_2_10 \
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 82603e3130..54574fa232 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -1376,7 +1376,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
             CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_MPX | CPUID_7_0_EBX_CLWB |
             CPUID_7_0_EBX_AVX512F | CPUID_7_0_EBX_AVX512DQ |
             CPUID_7_0_EBX_AVX512BW | CPUID_7_0_EBX_AVX512CD |
-            CPUID_7_0_EBX_AVX512VL,
+            CPUID_7_0_EBX_AVX512VL | CPUID_7_0_EBX_CLFLUSHOPT,
         /* Missing: XSAVES (not supported by some Linux versions,
          * including v4.1 to v4.12).
          * KVM doesn't yet expose any XSAVES state save component,
-- 
2.14.1

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [Qemu-devel] [PATCH v3 2/2] target/i386: add clflushopt to "Skylake-Server" cpu model
  2017-12-19  3:37 ` [Qemu-devel] [PATCH v3 2/2] target/i386: add clflushopt to "Skylake-Server" cpu model Haozhong Zhang
@ 2017-12-19 16:35   ` Eduardo Habkost
  2017-12-21  0:17     ` Michael S. Tsirkin
  0 siblings, 1 reply; 5+ messages in thread
From: Eduardo Habkost @ 2017-12-19 16:35 UTC (permalink / raw)
  To: Haozhong Zhang; +Cc: qemu-devel, Paolo Bonzini, Richard Henderson, mst

On Tue, Dec 19, 2017 at 11:37:30AM +0800, Haozhong Zhang wrote:
> CPUID_7_0_EBX_CLFLUSHOPT is missed in current "Skylake-Server" cpu
> model. Add it to "Skylake-Server" cpu model on pc-i440fx-2.12 and
> pc-q35-2.12. Keep it disabled in "Skylake-Server" cpu model on older
> machine types.
> 
> Signed-off-by: Haozhong Zhang <haozhong.zhang@intel.com>


Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>

Michael, do you want to merge it through your tree as it needs
the pc-2.12 patch?


> ---
>  include/hw/i386/pc.h | 5 +++++
>  target/i386/cpu.c    | 2 +-
>  2 files changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
> index 83d825e896..bb49165fe0 100644
> --- a/include/hw/i386/pc.h
> +++ b/include/hw/i386/pc.h
> @@ -323,6 +323,11 @@ bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
>  
>  #define PC_COMPAT_2_11 \
>      HW_COMPAT_2_11 \
> +    {\
> +        .driver   = "Skylake-Server" "-" TYPE_X86_CPU,\
> +        .property = "clflushopt",\
> +        .value    = "off",\
> +    },
>  
>  #define PC_COMPAT_2_10 \
>      HW_COMPAT_2_10 \
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index 82603e3130..54574fa232 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -1376,7 +1376,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
>              CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_MPX | CPUID_7_0_EBX_CLWB |
>              CPUID_7_0_EBX_AVX512F | CPUID_7_0_EBX_AVX512DQ |
>              CPUID_7_0_EBX_AVX512BW | CPUID_7_0_EBX_AVX512CD |
> -            CPUID_7_0_EBX_AVX512VL,
> +            CPUID_7_0_EBX_AVX512VL | CPUID_7_0_EBX_CLFLUSHOPT,
>          /* Missing: XSAVES (not supported by some Linux versions,
>           * including v4.1 to v4.12).
>           * KVM doesn't yet expose any XSAVES state save component,
> -- 
> 2.14.1
> 
> 

-- 
Eduardo

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [Qemu-devel] [PATCH v3 2/2] target/i386: add clflushopt to "Skylake-Server" cpu model
  2017-12-19 16:35   ` Eduardo Habkost
@ 2017-12-21  0:17     ` Michael S. Tsirkin
  0 siblings, 0 replies; 5+ messages in thread
From: Michael S. Tsirkin @ 2017-12-21  0:17 UTC (permalink / raw)
  To: Eduardo Habkost
  Cc: Haozhong Zhang, qemu-devel, Paolo Bonzini, Richard Henderson

On Tue, Dec 19, 2017 at 02:35:20PM -0200, Eduardo Habkost wrote:
> On Tue, Dec 19, 2017 at 11:37:30AM +0800, Haozhong Zhang wrote:
> > CPUID_7_0_EBX_CLFLUSHOPT is missed in current "Skylake-Server" cpu
> > model. Add it to "Skylake-Server" cpu model on pc-i440fx-2.12 and
> > pc-q35-2.12. Keep it disabled in "Skylake-Server" cpu model on older
> > machine types.
> > 
> > Signed-off-by: Haozhong Zhang <haozhong.zhang@intel.com>
> 
> 
> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
> 
> Michael, do you want to merge it through your tree as it needs
> the pc-2.12 patch?


Reviewed-by: Michael S. Tsirkin <mst@redhat.com>


Please merge it ASAP.

> 
> > ---
> >  include/hw/i386/pc.h | 5 +++++
> >  target/i386/cpu.c    | 2 +-
> >  2 files changed, 6 insertions(+), 1 deletion(-)
> > 
> > diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
> > index 83d825e896..bb49165fe0 100644
> > --- a/include/hw/i386/pc.h
> > +++ b/include/hw/i386/pc.h
> > @@ -323,6 +323,11 @@ bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
> >  
> >  #define PC_COMPAT_2_11 \
> >      HW_COMPAT_2_11 \
> > +    {\
> > +        .driver   = "Skylake-Server" "-" TYPE_X86_CPU,\
> > +        .property = "clflushopt",\
> > +        .value    = "off",\
> > +    },
> >  
> >  #define PC_COMPAT_2_10 \
> >      HW_COMPAT_2_10 \
> > diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> > index 82603e3130..54574fa232 100644
> > --- a/target/i386/cpu.c
> > +++ b/target/i386/cpu.c
> > @@ -1376,7 +1376,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
> >              CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_MPX | CPUID_7_0_EBX_CLWB |
> >              CPUID_7_0_EBX_AVX512F | CPUID_7_0_EBX_AVX512DQ |
> >              CPUID_7_0_EBX_AVX512BW | CPUID_7_0_EBX_AVX512CD |
> > -            CPUID_7_0_EBX_AVX512VL,
> > +            CPUID_7_0_EBX_AVX512VL | CPUID_7_0_EBX_CLFLUSHOPT,
> >          /* Missing: XSAVES (not supported by some Linux versions,
> >           * including v4.1 to v4.12).
> >           * KVM doesn't yet expose any XSAVES state save component,
> > -- 
> > 2.14.1
> > 
> > 
> 
> -- 
> Eduardo

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2017-12-21  0:17 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2017-12-19  3:37 [Qemu-devel] [PATCH v3 0/2] Add clflushopt to "Skylake-Server" cpu model Haozhong Zhang
2017-12-19  3:37 ` [Qemu-devel] [PATCH v3 1/2] pc: add 2.12 machine types Haozhong Zhang
2017-12-19  3:37 ` [Qemu-devel] [PATCH v3 2/2] target/i386: add clflushopt to "Skylake-Server" cpu model Haozhong Zhang
2017-12-19 16:35   ` Eduardo Habkost
2017-12-21  0:17     ` Michael S. Tsirkin

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