* [Qemu-devel] [PATCH v2] target/ppc: more use of the PPC_*() macros
@ 2017-12-22 9:55 Cédric Le Goater
2017-12-22 10:09 ` David Gibson
0 siblings, 1 reply; 2+ messages in thread
From: Cédric Le Goater @ 2017-12-22 9:55 UTC (permalink / raw)
To: qemu-ppc, qemu-devel, David Gibson; +Cc: Cédric Le Goater
Also introduce utilities to manipulate bitmasks (originaly from OPAL)
which be will be used in the model of the XIVE interrupt controller.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
Changes since v2:
- use __builtin_ffsll() on 32bits hosts
hw/ppc/pnv_lpc.c | 10 ++++-----
target/ppc/cpu.h | 56 ++++++++++++++++++++++++++++++-------------------
target/ppc/int_helper.c | 2 +-
3 files changed, 40 insertions(+), 28 deletions(-)
diff --git a/hw/ppc/pnv_lpc.c b/hw/ppc/pnv_lpc.c
index b777b78e1837..c42b4a8f6c0f 100644
--- a/hw/ppc/pnv_lpc.c
+++ b/hw/ppc/pnv_lpc.c
@@ -146,13 +146,13 @@ static bool opb_write(PnvLpcController *lpc, uint32_t addr, uint8_t *data,
return success;
}
-#define ECCB_CTL_READ (1ull << (63 - 15))
+#define ECCB_CTL_READ PPC_BIT(15)
#define ECCB_CTL_SZ_LSH (63 - 7)
-#define ECCB_CTL_SZ_MASK (0xfull << ECCB_CTL_SZ_LSH)
-#define ECCB_CTL_ADDR_MASK 0xffffffffu;
+#define ECCB_CTL_SZ_MASK PPC_BITMASK(4, 7)
+#define ECCB_CTL_ADDR_MASK PPC_BITMASK(32, 63)
-#define ECCB_STAT_OP_DONE (1ull << (63 - 52))
-#define ECCB_STAT_OP_ERR (1ull << (63 - 52))
+#define ECCB_STAT_OP_DONE PPC_BIT(52)
+#define ECCB_STAT_OP_ERR PPC_BIT(52)
#define ECCB_STAT_RD_DATA_LSH (63 - 37)
#define ECCB_STAT_RD_DATA_MASK (0xffffffff << ECCB_STAT_RD_DATA_LSH)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 370b05e76ede..a5e49f23e9cf 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -93,6 +93,19 @@
#define PPC_BITMASK(bs, be) ((PPC_BIT(bs) - PPC_BIT(be)) | PPC_BIT(bs))
#define PPC_BITMASK32(bs, be) ((PPC_BIT32(bs) - PPC_BIT32(be)) | \
PPC_BIT32(bs))
+#define PPC_BITMASK8(bs, be) ((PPC_BIT8(bs) - PPC_BIT8(be)) | PPC_BIT8(bs))
+
+#if HOST_LONG_BITS == 32
+# define MASK_TO_LSH(m) (__builtin_ffsll(m) - 1)
+#elif HOST_LONG_BITS == 64
+# define MASK_TO_LSH(m) (__builtin_ffsl(m) - 1)
+#else
+# error Unknown sizeof long
+#endif
+
+#define GETFIELD(m, v) (((v) & (m)) >> MASK_TO_LSH(m))
+#define SETFIELD(m, v, val) \
+ (((v) & ~(m)) | ((((typeof(v))(val)) << MASK_TO_LSH(m)) & (m)))
/*****************************************************************************/
/* Exception vectors definitions */
@@ -2349,32 +2362,31 @@ enum {
/* Processor Compatibility mask (PCR) */
enum {
- PCR_COMPAT_2_05 = 1ull << (63-62),
- PCR_COMPAT_2_06 = 1ull << (63-61),
- PCR_COMPAT_2_07 = 1ull << (63-60),
- PCR_COMPAT_3_00 = 1ull << (63-59),
- PCR_VEC_DIS = 1ull << (63-0), /* Vec. disable (bit NA since POWER8) */
- PCR_VSX_DIS = 1ull << (63-1), /* VSX disable (bit NA since POWER8) */
- PCR_TM_DIS = 1ull << (63-2), /* Trans. memory disable (POWER8) */
+ PCR_COMPAT_2_05 = PPC_BIT(62),
+ PCR_COMPAT_2_06 = PPC_BIT(61),
+ PCR_COMPAT_2_07 = PPC_BIT(60),
+ PCR_COMPAT_3_00 = PPC_BIT(59),
+ PCR_VEC_DIS = PPC_BIT(0), /* Vec. disable (bit NA since POWER8) */
+ PCR_VSX_DIS = PPC_BIT(1), /* VSX disable (bit NA since POWER8) */
+ PCR_TM_DIS = PPC_BIT(2), /* Trans. memory disable (POWER8) */
};
/* HMER/HMEER */
enum {
- HMER_MALFUNCTION_ALERT = 1ull << (63 - 0),
- HMER_PROC_RECV_DONE = 1ull << (63 - 2),
- HMER_PROC_RECV_ERROR_MASKED = 1ull << (63 - 3),
- HMER_TFAC_ERROR = 1ull << (63 - 4),
- HMER_TFMR_PARITY_ERROR = 1ull << (63 - 5),
- HMER_XSCOM_FAIL = 1ull << (63 - 8),
- HMER_XSCOM_DONE = 1ull << (63 - 9),
- HMER_PROC_RECV_AGAIN = 1ull << (63 - 11),
- HMER_WARN_RISE = 1ull << (63 - 14),
- HMER_WARN_FALL = 1ull << (63 - 15),
- HMER_SCOM_FIR_HMI = 1ull << (63 - 16),
- HMER_TRIG_FIR_HMI = 1ull << (63 - 17),
- HMER_HYP_RESOURCE_ERR = 1ull << (63 - 20),
- HMER_XSCOM_STATUS_MASK = 7ull << (63 - 23),
- HMER_XSCOM_STATUS_LSH = (63 - 23),
+ HMER_MALFUNCTION_ALERT = PPC_BIT(0),
+ HMER_PROC_RECV_DONE = PPC_BIT(2),
+ HMER_PROC_RECV_ERROR_MASKED = PPC_BIT(3),
+ HMER_TFAC_ERROR = PPC_BIT(4),
+ HMER_TFMR_PARITY_ERROR = PPC_BIT(5),
+ HMER_XSCOM_FAIL = PPC_BIT(8),
+ HMER_XSCOM_DONE = PPC_BIT(9),
+ HMER_PROC_RECV_AGAIN = PPC_BIT(11),
+ HMER_WARN_RISE = PPC_BIT(14),
+ HMER_WARN_FALL = PPC_BIT(15),
+ HMER_SCOM_FIR_HMI = PPC_BIT(16),
+ HMER_TRIG_FIR_HMI = PPC_BIT(17),
+ HMER_HYP_RESOURCE_ERR = PPC_BIT(20),
+ HMER_XSCOM_STATUS_MASK = PPC_BITMASK(21, 23),
};
/* Alternate Interrupt Location (AIL) */
diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c
index 1c013a0ee3f1..3a50f1e1b72c 100644
--- a/target/ppc/int_helper.c
+++ b/target/ppc/int_helper.c
@@ -183,7 +183,7 @@ uint64_t helper_bpermd(uint64_t rs, uint64_t rb)
for (i = 0; i < 8; i++) {
int index = (rs >> (i*8)) & 0xFF;
if (index < 64) {
- if (rb & (1ull << (63-index))) {
+ if (rb & PPC_BIT(index)) {
ra |= 1 << i;
}
}
--
2.13.6
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [Qemu-devel] [PATCH v2] target/ppc: more use of the PPC_*() macros
2017-12-22 9:55 [Qemu-devel] [PATCH v2] target/ppc: more use of the PPC_*() macros Cédric Le Goater
@ 2017-12-22 10:09 ` David Gibson
0 siblings, 0 replies; 2+ messages in thread
From: David Gibson @ 2017-12-22 10:09 UTC (permalink / raw)
To: Cédric Le Goater; +Cc: qemu-ppc, qemu-devel
[-- Attachment #1: Type: text/plain, Size: 5995 bytes --]
On Fri, Dec 22, 2017 at 10:55:51AM +0100, Cédric Le Goater wrote:
> Also introduce utilities to manipulate bitmasks (originaly from OPAL)
> which be will be used in the model of the XIVE interrupt controller.
>
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
> ---
>
> Changes since v2:
>
> - use __builtin_ffsll() on 32bits hosts
I've updated my tree.
>
> hw/ppc/pnv_lpc.c | 10 ++++-----
> target/ppc/cpu.h | 56 ++++++++++++++++++++++++++++++-------------------
> target/ppc/int_helper.c | 2 +-
> 3 files changed, 40 insertions(+), 28 deletions(-)
>
> diff --git a/hw/ppc/pnv_lpc.c b/hw/ppc/pnv_lpc.c
> index b777b78e1837..c42b4a8f6c0f 100644
> --- a/hw/ppc/pnv_lpc.c
> +++ b/hw/ppc/pnv_lpc.c
> @@ -146,13 +146,13 @@ static bool opb_write(PnvLpcController *lpc, uint32_t addr, uint8_t *data,
> return success;
> }
>
> -#define ECCB_CTL_READ (1ull << (63 - 15))
> +#define ECCB_CTL_READ PPC_BIT(15)
> #define ECCB_CTL_SZ_LSH (63 - 7)
> -#define ECCB_CTL_SZ_MASK (0xfull << ECCB_CTL_SZ_LSH)
> -#define ECCB_CTL_ADDR_MASK 0xffffffffu;
> +#define ECCB_CTL_SZ_MASK PPC_BITMASK(4, 7)
> +#define ECCB_CTL_ADDR_MASK PPC_BITMASK(32, 63)
>
> -#define ECCB_STAT_OP_DONE (1ull << (63 - 52))
> -#define ECCB_STAT_OP_ERR (1ull << (63 - 52))
> +#define ECCB_STAT_OP_DONE PPC_BIT(52)
> +#define ECCB_STAT_OP_ERR PPC_BIT(52)
> #define ECCB_STAT_RD_DATA_LSH (63 - 37)
> #define ECCB_STAT_RD_DATA_MASK (0xffffffff << ECCB_STAT_RD_DATA_LSH)
>
> diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
> index 370b05e76ede..a5e49f23e9cf 100644
> --- a/target/ppc/cpu.h
> +++ b/target/ppc/cpu.h
> @@ -93,6 +93,19 @@
> #define PPC_BITMASK(bs, be) ((PPC_BIT(bs) - PPC_BIT(be)) | PPC_BIT(bs))
> #define PPC_BITMASK32(bs, be) ((PPC_BIT32(bs) - PPC_BIT32(be)) | \
> PPC_BIT32(bs))
> +#define PPC_BITMASK8(bs, be) ((PPC_BIT8(bs) - PPC_BIT8(be)) | PPC_BIT8(bs))
> +
> +#if HOST_LONG_BITS == 32
> +# define MASK_TO_LSH(m) (__builtin_ffsll(m) - 1)
> +#elif HOST_LONG_BITS == 64
> +# define MASK_TO_LSH(m) (__builtin_ffsl(m) - 1)
> +#else
> +# error Unknown sizeof long
> +#endif
> +
> +#define GETFIELD(m, v) (((v) & (m)) >> MASK_TO_LSH(m))
> +#define SETFIELD(m, v, val) \
> + (((v) & ~(m)) | ((((typeof(v))(val)) << MASK_TO_LSH(m)) & (m)))
>
> /*****************************************************************************/
> /* Exception vectors definitions */
> @@ -2349,32 +2362,31 @@ enum {
>
> /* Processor Compatibility mask (PCR) */
> enum {
> - PCR_COMPAT_2_05 = 1ull << (63-62),
> - PCR_COMPAT_2_06 = 1ull << (63-61),
> - PCR_COMPAT_2_07 = 1ull << (63-60),
> - PCR_COMPAT_3_00 = 1ull << (63-59),
> - PCR_VEC_DIS = 1ull << (63-0), /* Vec. disable (bit NA since POWER8) */
> - PCR_VSX_DIS = 1ull << (63-1), /* VSX disable (bit NA since POWER8) */
> - PCR_TM_DIS = 1ull << (63-2), /* Trans. memory disable (POWER8) */
> + PCR_COMPAT_2_05 = PPC_BIT(62),
> + PCR_COMPAT_2_06 = PPC_BIT(61),
> + PCR_COMPAT_2_07 = PPC_BIT(60),
> + PCR_COMPAT_3_00 = PPC_BIT(59),
> + PCR_VEC_DIS = PPC_BIT(0), /* Vec. disable (bit NA since POWER8) */
> + PCR_VSX_DIS = PPC_BIT(1), /* VSX disable (bit NA since POWER8) */
> + PCR_TM_DIS = PPC_BIT(2), /* Trans. memory disable (POWER8) */
> };
>
> /* HMER/HMEER */
> enum {
> - HMER_MALFUNCTION_ALERT = 1ull << (63 - 0),
> - HMER_PROC_RECV_DONE = 1ull << (63 - 2),
> - HMER_PROC_RECV_ERROR_MASKED = 1ull << (63 - 3),
> - HMER_TFAC_ERROR = 1ull << (63 - 4),
> - HMER_TFMR_PARITY_ERROR = 1ull << (63 - 5),
> - HMER_XSCOM_FAIL = 1ull << (63 - 8),
> - HMER_XSCOM_DONE = 1ull << (63 - 9),
> - HMER_PROC_RECV_AGAIN = 1ull << (63 - 11),
> - HMER_WARN_RISE = 1ull << (63 - 14),
> - HMER_WARN_FALL = 1ull << (63 - 15),
> - HMER_SCOM_FIR_HMI = 1ull << (63 - 16),
> - HMER_TRIG_FIR_HMI = 1ull << (63 - 17),
> - HMER_HYP_RESOURCE_ERR = 1ull << (63 - 20),
> - HMER_XSCOM_STATUS_MASK = 7ull << (63 - 23),
> - HMER_XSCOM_STATUS_LSH = (63 - 23),
> + HMER_MALFUNCTION_ALERT = PPC_BIT(0),
> + HMER_PROC_RECV_DONE = PPC_BIT(2),
> + HMER_PROC_RECV_ERROR_MASKED = PPC_BIT(3),
> + HMER_TFAC_ERROR = PPC_BIT(4),
> + HMER_TFMR_PARITY_ERROR = PPC_BIT(5),
> + HMER_XSCOM_FAIL = PPC_BIT(8),
> + HMER_XSCOM_DONE = PPC_BIT(9),
> + HMER_PROC_RECV_AGAIN = PPC_BIT(11),
> + HMER_WARN_RISE = PPC_BIT(14),
> + HMER_WARN_FALL = PPC_BIT(15),
> + HMER_SCOM_FIR_HMI = PPC_BIT(16),
> + HMER_TRIG_FIR_HMI = PPC_BIT(17),
> + HMER_HYP_RESOURCE_ERR = PPC_BIT(20),
> + HMER_XSCOM_STATUS_MASK = PPC_BITMASK(21, 23),
> };
>
> /* Alternate Interrupt Location (AIL) */
> diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c
> index 1c013a0ee3f1..3a50f1e1b72c 100644
> --- a/target/ppc/int_helper.c
> +++ b/target/ppc/int_helper.c
> @@ -183,7 +183,7 @@ uint64_t helper_bpermd(uint64_t rs, uint64_t rb)
> for (i = 0; i < 8; i++) {
> int index = (rs >> (i*8)) & 0xFF;
> if (index < 64) {
> - if (rb & (1ull << (63-index))) {
> + if (rb & PPC_BIT(index)) {
> ra |= 1 << i;
> }
> }
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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2017-12-22 9:55 [Qemu-devel] [PATCH v2] target/ppc: more use of the PPC_*() macros Cédric Le Goater
2017-12-22 10:09 ` David Gibson
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