From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: deller@gmx.de
Subject: [Qemu-devel] [PATCH 31/38] target/hppa: Add system registers to gdbstub
Date: Thu, 28 Dec 2017 22:31:38 -0800 [thread overview]
Message-ID: <20171229063145.29167-32-richard.henderson@linaro.org> (raw)
In-Reply-To: <20171229063145.29167-1-richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/hppa/gdbstub.c | 156 ++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 156 insertions(+)
diff --git a/target/hppa/gdbstub.c b/target/hppa/gdbstub.c
index fc27aec073..e2e9c4d77f 100644
--- a/target/hppa/gdbstub.c
+++ b/target/hppa/gdbstub.c
@@ -41,15 +41,93 @@ int hppa_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
case 33:
val = env->iaoq_f;
break;
+ case 34:
+ val = env->iasq_f >> 32;
+ break;
case 35:
val = env->iaoq_b;
break;
+ case 36:
+ val = env->iasq_b >> 32;
+ break;
+ case 37:
+ val = env->cr[CR_EIEM];
+ break;
+ case 38:
+ val = env->cr[CR_IIR];
+ break;
+ case 39:
+ val = env->cr[CR_ISR];
+ break;
+ case 40:
+ val = env->cr[CR_IOR];
+ break;
+ case 41:
+ val = env->cr[CR_IPSW];
+ break;
+ case 43:
+ val = env->sr[4] >> 32;
+ break;
+ case 44:
+ val = env->sr[0] >> 32;
+ break;
+ case 45:
+ val = env->sr[1] >> 32;
+ break;
+ case 46:
+ val = env->sr[2] >> 32;
+ break;
+ case 47:
+ val = env->sr[3] >> 32;
+ break;
+ case 48:
+ val = env->sr[5] >> 32;
+ break;
+ case 49:
+ val = env->sr[6] >> 32;
+ break;
+ case 50:
+ val = env->sr[7] >> 32;
+ break;
+ case 51:
+ val = env->cr[CR_RC];
+ break;
+ case 52:
+ val = env->cr[8];
+ break;
+ case 53:
+ val = env->cr[9];
+ break;
+ case 54:
+ val = env->cr[CR_SCRCCR];
+ break;
+ case 55:
+ val = env->cr[12];
+ break;
+ case 56:
+ val = env->cr[13];
+ break;
+ case 57:
+ val = env->cr[24];
+ break;
+ case 58:
+ val = env->cr[25];
+ break;
case 59:
val = env->cr[26];
break;
case 60:
val = env->cr[27];
break;
+ case 61:
+ val = env->cr[28];
+ break;
+ case 62:
+ val = env->cr[29];
+ break;
+ case 63:
+ val = env->cr[30];
+ break;
case 64 ... 127:
val = extract64(env->fr[(n - 64) / 2], (n & 1 ? 0 : 32), 32);
break;
@@ -94,15 +172,93 @@ int hppa_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
case 33:
env->iaoq_f = val;
break;
+ case 34:
+ env->iasq_f = (uint64_t)val << 32;
+ break;
case 35:
env->iaoq_b = val;
break;
+ case 36:
+ env->iasq_b = (uint64_t)val << 32;
+ break;
+ case 37:
+ env->cr[CR_EIEM] = val;
+ break;
+ case 38:
+ env->cr[CR_IIR] = val;
+ break;
+ case 39:
+ env->cr[CR_ISR] = val;
+ break;
+ case 40:
+ env->cr[CR_IOR] = val;
+ break;
+ case 41:
+ env->cr[CR_IPSW] = val;
+ break;
+ case 43:
+ env->sr[4] = (uint64_t)val << 32;
+ break;
+ case 44:
+ env->sr[0] = (uint64_t)val << 32;
+ break;
+ case 45:
+ env->sr[1] = (uint64_t)val << 32;
+ break;
+ case 46:
+ env->sr[2] = (uint64_t)val << 32;
+ break;
+ case 47:
+ env->sr[3] = (uint64_t)val << 32;
+ break;
+ case 48:
+ env->sr[5] = (uint64_t)val << 32;
+ break;
+ case 49:
+ env->sr[6] = (uint64_t)val << 32;
+ break;
+ case 50:
+ env->sr[7] = (uint64_t)val << 32;
+ break;
+ case 51:
+ env->cr[CR_RC] = val;
+ break;
+ case 52:
+ env->cr[8] = val;
+ break;
+ case 53:
+ env->cr[9] = val;
+ break;
+ case 54:
+ env->cr[CR_SCRCCR] = val;
+ break;
+ case 55:
+ env->cr[12] = val;
+ break;
+ case 56:
+ env->cr[13] = val;
+ break;
+ case 57:
+ env->cr[24] = val;
+ break;
+ case 58:
+ env->cr[25] = val;
+ break;
case 59:
env->cr[26] = val;
break;
case 60:
env->cr[27] = val;
break;
+ case 61:
+ env->cr[28] = val;
+ break;
+ case 62:
+ env->cr[29] = val;
+ break;
+ case 63:
+ env->cr[30] = val;
+ break;
case 64:
env->fr[0] = deposit64(env->fr[0], 32, 32, val);
cpu_hppa_loaded_fr0(env);
--
2.14.3
next prev parent reply other threads:[~2017-12-29 6:32 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-29 6:31 [Qemu-devel] [PATCH 00/38] Add hppa-softmmu Richard Henderson
2017-12-29 6:31 ` [Qemu-devel] [PATCH 01/38] target/hppa: Skeleton support for hppa-softmmu Richard Henderson
2017-12-29 6:31 ` [Qemu-devel] [PATCH 02/38] target/hppa: Define the rest of the PSW Richard Henderson
2017-12-29 6:31 ` [Qemu-devel] [PATCH 03/38] target/hppa: Disable gateway page emulation for system mode Richard Henderson
2017-12-29 6:31 ` [Qemu-devel] [PATCH 04/38] target/hppa: Define hardware exception types Richard Henderson
2017-12-29 6:31 ` [Qemu-devel] [PATCH 05/38] target/hppa: Split address size from register size Richard Henderson
2017-12-29 6:31 ` [Qemu-devel] [PATCH 06/38] target/hppa: Implement mmu_idx from IA privilege level Richard Henderson
2017-12-29 6:31 ` [Qemu-devel] [PATCH 07/38] target/hppa: Implement the system mask instructions Richard Henderson
2017-12-29 6:31 ` [Qemu-devel] [PATCH 08/38] target/hppa: Add space registers Richard Henderson
2017-12-29 6:31 ` [Qemu-devel] [PATCH 09/38] target/hppa: Add control registers Richard Henderson
2017-12-29 6:31 ` [Qemu-devel] [PATCH 10/38] target/hppa: Adjust insn mask for mfctl, w Richard Henderson
2017-12-29 6:31 ` [Qemu-devel] [PATCH 11/38] target/hppa: Implement rfi Richard Henderson
2017-12-29 6:31 ` [Qemu-devel] [PATCH 12/38] target/hppa: Fill in hppa_cpu_do_interrupt/hppa_cpu_exec_interrupt Richard Henderson
2017-12-29 6:31 ` [Qemu-devel] [PATCH 13/38] target/hppa: Implement unaligned access trap Richard Henderson
2017-12-29 6:31 ` [Qemu-devel] [PATCH 14/38] target/hppa: Use space registers in data operations Richard Henderson
2017-12-29 6:31 ` [Qemu-devel] [PATCH 15/38] target/hppa: Do not set cs_base to iaoq_b Richard Henderson
2017-12-29 6:31 ` [Qemu-devel] [PATCH 16/38] target/hppa: Avoid privilege level decrease during branches Richard Henderson
2017-12-29 6:31 ` [Qemu-devel] [PATCH 17/38] target/hppa: Implement IASQ Richard Henderson
2017-12-29 6:31 ` [Qemu-devel] [PATCH 18/38] target/hppa: Implement tlb_fill Richard Henderson
2017-12-29 6:31 ` [Qemu-devel] [PATCH 19/38] target/hppa: Implement external interrupts Richard Henderson
2017-12-29 6:31 ` [Qemu-devel] [PATCH 20/38] target/hppa: Implement the interval timer Richard Henderson
2017-12-29 6:31 ` [Qemu-devel] [PATCH 21/38] target/hppa: Log unimplemented instructions Richard Henderson
2017-12-29 6:31 ` [Qemu-devel] [PATCH 22/38] target/hppa: Implement I*TLBA and I*TLBP insns Richard Henderson
2017-12-29 6:31 ` [Qemu-devel] [PATCH 23/38] target/hppa: Implement P*TLB and P*TLBE insns Richard Henderson
2017-12-29 6:31 ` [Qemu-devel] [PATCH 24/38] target/hppa: Implement LDWA Richard Henderson
2017-12-29 6:31 ` [Qemu-devel] [PATCH 25/38] target/hppa: Implement LPA Richard Henderson
2017-12-29 6:31 ` [Qemu-devel] [PATCH 26/38] target/hppa: Implement LCI Richard Henderson
2017-12-29 6:31 ` [Qemu-devel] [PATCH 27/38] target/hppa: Implement SYNCDMA insn Richard Henderson
2017-12-29 6:31 ` [Qemu-devel] [PATCH 28/38] target/hppa: Implement a halt instruction Richard Henderson
2017-12-29 6:31 ` [Qemu-devel] [PATCH 29/38] hw/hppa: Implement DINO system board Richard Henderson
2017-12-29 9:45 ` Igor Mammedov
2017-12-29 6:31 ` [Qemu-devel] [PATCH 30/38] target/hppa: Optimize for flat addressing space Richard Henderson
2017-12-29 6:31 ` Richard Henderson [this message]
2017-12-29 6:31 ` [Qemu-devel] [PATCH 32/38] target/hppa: Add migration for the cpu Richard Henderson
2017-12-29 6:31 ` [Qemu-devel] [PATCH 33/38] target/hppa: Implement B,GATE insn Richard Henderson
2017-12-29 6:31 ` [Qemu-devel] [PATCH 34/38] target/hppa: Only use EXCP_DTLB_MISS Richard Henderson
2017-12-29 6:31 ` [Qemu-devel] [PATCH 35/38] qom: Add MMU_DEBUG_LOAD Richard Henderson
2017-12-29 16:18 ` Andreas Färber
2017-12-29 6:31 ` [Qemu-devel] [PATCH 36/38] target/hppa: Use MMU_DEBUG_LOAD when reloading for CR[IIR] Richard Henderson
2017-12-29 6:31 ` [Qemu-devel] [PATCH 37/38] target/hppa: Increase number of temp regs Richard Henderson
2017-12-29 6:31 ` [Qemu-devel] [PATCH 38/38] target/hppa: Fix comment Richard Henderson
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