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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: Alistair Francis <alistair.francis@xilinx.com>,
	"Edgar E . Iglesias" <edgar.iglesias@xilinx.com>,
	Peter Maydell <peter.maydell@linaro.org>,
	Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: "Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	qemu-devel@nongnu.org,
	"Peter Crosthwaite" <crosthwaite.peter@gmail.com>
Subject: [Qemu-devel] [PATCH v3 20/42] sdhci: add max-block-length capability (Spec v1)
Date: Fri, 29 Dec 2017 14:49:11 -0300	[thread overview]
Message-ID: <20171229174933.1781-21-f4bug@amsat.org> (raw)
In-Reply-To: <20171229174933.1781-1-f4bug@amsat.org>

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/sd/sdhci-internal.h |  1 -
 include/hw/sd/sdhci.h  |  1 +
 hw/sd/sdhci.c          | 38 +++++++++++++-------------------------
 3 files changed, 14 insertions(+), 26 deletions(-)

diff --git a/hw/sd/sdhci-internal.h b/hw/sd/sdhci-internal.h
index 6944fcaf00..0561e6eaf7 100644
--- a/hw/sd/sdhci-internal.h
+++ b/hw/sd/sdhci-internal.h
@@ -188,7 +188,6 @@ FIELD(SDHC_ACMD12ERRSTS, INDEX_ERR,    4, 1);
 #define SDHC_CAN_DO_ADMA2              0x00080000
 #define SDHC_CAN_DO_ADMA1              0x00100000
 #define SDHC_64_BIT_BUS_SUPPORT        (1 << 28)
-#define SDHC_CAPAB_BLOCKSIZE(x)        (((x) >> 16) & 0x3)
 FIELD(SDHC_CAPAB, TOCLKFREQ,           0, 6);
 FIELD(SDHC_CAPAB, TOUNIT,              7, 1);
 FIELD(SDHC_CAPAB, BASECLKFREQ,         8, 8);
diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h
index 266030dc8d..2703da1d5a 100644
--- a/include/hw/sd/sdhci.h
+++ b/include/hw/sd/sdhci.h
@@ -103,6 +103,7 @@ typedef struct SDHCIState {
     bool pending_insert_quirk; /* Quirk for Raspberry Pi card insert int */
     uint8_t spec_version;
     struct {
+        uint16_t max_blk_len;
         bool suspend;
         bool high_speed;
         bool sdma;
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index 738db6edcf..820d161db2 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -46,9 +46,6 @@
 #define SDHC_CAPAB_64BITBUS       0ul        /* 64-bit System Bus Support */
 #define SDHC_CAPAB_ADMA1          1ul        /* ADMA1 support */
 #define SDHC_CAPAB_ADMA2          1ul        /* ADMA2 support */
-/* Maximum host controller R/W buffers size
- * Possible values: 512, 1024, 2048 bytes */
-#define SDHC_CAPAB_MAXBLOCKLENGTH 512ul
 /* Maximum clock frequency for SDclock in MHz
  * value in range 10-63 MHz, 0 - not defined */
 #define SDHC_CAPAB_BASECLKFREQ    52ul
@@ -62,16 +59,6 @@
 #error Capabilities features can have value 0 or 1 only!
 #endif
 
-#if SDHC_CAPAB_MAXBLOCKLENGTH == 512
-#define MAX_BLOCK_LENGTH 0ul
-#elif SDHC_CAPAB_MAXBLOCKLENGTH == 1024
-#define MAX_BLOCK_LENGTH 1ul
-#elif SDHC_CAPAB_MAXBLOCKLENGTH == 2048
-#define MAX_BLOCK_LENGTH 2ul
-#else
-#error Max host controller block size can have value 512, 1024 or 2048 only!
-#endif
-
 #if (SDHC_CAPAB_BASECLKFREQ > 0 && SDHC_CAPAB_BASECLKFREQ < 10) || \
     SDHC_CAPAB_BASECLKFREQ > 63
 #error SDclock frequency can have value in range 0, 10-63 only!
@@ -83,7 +70,7 @@
 
 #define SDHC_CAPAB_REG_DEFAULT                                 \
    ((SDHC_CAPAB_64BITBUS << 28) | (SDHC_CAPAB_ADMA1 << 20) |   \
-    (SDHC_CAPAB_ADMA2 << 19) | (MAX_BLOCK_LENGTH << 16) |      \
+    (SDHC_CAPAB_ADMA2 << 19) |                                 \
     (SDHC_CAPAB_BASECLKFREQ << 8) | (SDHC_CAPAB_TOUNIT << 7) | \
     (SDHC_CAPAB_TOCLKFREQ))
 
@@ -92,9 +79,17 @@
 static void sdhci_init_capareg(SDHCIState *s, Error **errp)
 {
     uint64_t capareg = 0;
+    uint32_t val;
 
     switch (s->spec_version) {
     case 1:
+        val = ctz32(s->cap.max_blk_len >> 9);
+        if (val >= 0b11) {
+            error_setg(errp, "block size can be 512, 1024 or 2048 only");
+            return;
+        }
+        capareg = FIELD_DP64(capareg, SDHC_CAPAB, MAXBLOCKLENGTH, val);
+
         capareg = FIELD_DP64(capareg, SDHC_CAPAB, HIGHSPEED, s->cap.high_speed);
         capareg = FIELD_DP64(capareg, SDHC_CAPAB, SDMA, s->cap.sdma);
         capareg = FIELD_DP64(capareg, SDHC_CAPAB, SUSPRESUME, s->cap.suspend);
@@ -1175,17 +1170,7 @@ static const MemoryRegionOps sdhci_mmio_ops = {
 
 static inline unsigned int sdhci_get_fifolen(SDHCIState *s)
 {
-    switch (SDHC_CAPAB_BLOCKSIZE(s->capareg)) {
-    case 0:
-        return 512;
-    case 1:
-        return 1024;
-    case 2:
-        return 2048;
-    default:
-        hw_error("SDHC: unsupported value for maximum block size\n");
-        return 0;
-    }
+    return 1 << (9 + FIELD_EX32(s->capareg, SDHC_CAPAB, MAXBLOCKLENGTH));
 }
 
 static void sdhci_init_readonly_registers(SDHCIState *s, Error **errp)
@@ -1313,6 +1298,9 @@ const VMStateDescription sdhci_vmstate = {
 static Property sdhci_properties[] = {
     DEFINE_PROP_UINT8("sd-spec-version", SDHCIState, spec_version, 1),
 
+    /* Maximum host controller R/W buffers size
+     * Possible values: 512, 1024, 2048 bytes */
+    DEFINE_PROP_UINT16("max-block-length", SDHCIState, cap.max_blk_len, 512),
     /* DMA */
     DEFINE_PROP_BOOL("sdma", SDHCIState, cap.sdma, true),
     /* Suspend/resume support */
-- 
2.15.1

  parent reply	other threads:[~2017-12-29 17:50 UTC|newest]

Thread overview: 55+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-12-29 17:48 [Qemu-devel] [PATCH v3 00/42] SDHCI: housekeeping, add a qtest and fix few issues Philippe Mathieu-Daudé
2017-12-29 17:48 ` [Qemu-devel] [PATCH v3 01/42] sdhci: clean up includes Philippe Mathieu-Daudé
2017-12-29 17:48 ` [Qemu-devel] [PATCH v3 02/42] sdhci: sort registers comments Philippe Mathieu-Daudé
2018-01-03  0:05   ` Alistair Francis
2017-12-29 17:48 ` [Qemu-devel] [PATCH v3 03/42] sdhci: remove dead code Philippe Mathieu-Daudé
2018-01-03  0:06   ` Alistair Francis
2017-12-29 17:48 ` [Qemu-devel] [PATCH v3 04/42] sdhci: refactor same sysbus/pci properties into a common one Philippe Mathieu-Daudé
2018-01-03  7:46   ` Fam Zheng
2017-12-29 17:48 ` [Qemu-devel] [PATCH v3 05/42] sdhci: refactor common sysbus/pci class_init() into sdhci_class_init() Philippe Mathieu-Daudé
2018-01-03  7:49   ` Fam Zheng
2017-12-29 17:48 ` [Qemu-devel] [PATCH v3 06/42] sdhci: refactor common sysbus/pci realize() into sdhci_realizefn() Philippe Mathieu-Daudé
2018-01-03  7:52   ` Fam Zheng
2018-01-03 10:08     ` Philippe Mathieu-Daudé
2017-12-29 17:48 ` [Qemu-devel] [PATCH v3 07/42] sdhci: refactor common sysbus/pci unrealize() into sdhci_unrealizefn() Philippe Mathieu-Daudé
2018-01-03  7:56   ` Fam Zheng
2018-01-03 10:10     ` Philippe Mathieu-Daudé
2018-01-03 10:41       ` Philippe Mathieu-Daudé
2017-12-29 17:48 ` [Qemu-devel] [PATCH v3 08/42] sdhci: use qemu_log_mask(UNIMP) instead of fprintf() Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 09/42] sdhci: convert the DPRINT() calls into trace events Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 10/42] sdhci: add a GPIO for the 'access control' LED Philippe Mathieu-Daudé
2018-01-03  0:10   ` Alistair Francis
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 11/42] sdhci: move MASK_TRNMOD with other SDHC_TRN* defines in "sd-internal.h" Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 12/42] sdhci: use FIELD_DP32() macro for the WRITE_PROTECT flag Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 13/42] sdhci: rename the SDHC_CAPAB register Philippe Mathieu-Daudé
2018-01-03  0:12   ` Alistair Francis
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 14/42] sdhci: fix CAPAB/MAXCURR registers, both are 64bit and read-only Philippe Mathieu-Daudé
2018-01-03  0:12   ` Alistair Francis
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 15/42] sdhci: Implement write method of ACMD12ERRSTS register Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 16/42] sdhci: use deposit64() on admasysaddr Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 17/42] sdhci: add a "dma-memory" property Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 18/42] sdhci: add a spec_version property Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 19/42] sdhci: add basic Spec v1 capabilities Philippe Mathieu-Daudé
2017-12-29 17:49 ` Philippe Mathieu-Daudé [this message]
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 22/42] sdhci: add DMA and 64-bit capabilities (Spec v2) Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 23/42] sdhci: default to Spec v2 Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 24/42] sdhci: add a 'dma' shortcut property Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 26/42] sdhci: Fix 64-bit ADMA2 Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 27/42] hw/arm/exynos4210: implement SDHCI Spec v2 Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 28/42] hw/arm/xilinx_zynq: " Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 29/42] sdhci: add qtest to check the SD Spec version Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 30/42] sdhci: check Spec v2 capabilities qtest Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 32/42] sdhci: rename the hostctl1 register Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 33/42] hw/arm/bcm2835_peripherals: implement SDHCI Spec v3 Philippe Mathieu-Daudé
2018-01-09  0:24   ` Andrew Baumann
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 34/42] hw/arm/fsl-imx6: " Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 35/42] hw/arm/xilinx_zynqmp: " Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 36/42] sdhci: check Spec v3 capabilities qtest Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 37/42] sdhci: remove the deprecated 'capareg' property Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 38/42] sdhci: add check_capab_readonly() qtest Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 39/42] sdhci: add a check_capab_baseclock() qtest Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 40/42] sdhci: add a check_capab_sdma() qtest Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 41/42] sdhci: add a check_capab_v3() qtest Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 42/42] sdhci: add Spec v4.2 register definitions Philippe Mathieu-Daudé
2018-01-03  0:15 ` [Qemu-devel] [PATCH v3 00/42] SDHCI: housekeeping, add a qtest and fix few issues Alistair Francis
2018-01-03  1:08   ` Philippe Mathieu-Daudé

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