From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: Alistair Francis <alistair.francis@xilinx.com>,
"Edgar E . Iglesias" <edgar.iglesias@xilinx.com>,
Peter Maydell <peter.maydell@linaro.org>,
Eduardo Habkost <ehabkost@redhat.com>,
Xiaoqiang Zhao <zxq_yx_007@163.com>,
Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: "Philippe Mathieu-Daudé" <f4bug@amsat.org>,
qemu-devel@nongnu.org,
"Peter Crosthwaite" <crosthwaite.peter@gmail.com>
Subject: [Qemu-devel] [PATCH v3 06/42] sdhci: refactor common sysbus/pci realize() into sdhci_realizefn()
Date: Fri, 29 Dec 2017 14:48:57 -0300 [thread overview]
Message-ID: <20171229174933.1781-7-f4bug@amsat.org> (raw)
In-Reply-To: <20171229174933.1781-1-f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
---
hw/sd/sdhci.c | 22 ++++++++++++++--------
1 file changed, 14 insertions(+), 8 deletions(-)
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index 38d82b4c61..ad5853d527 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -1194,6 +1194,15 @@ static void sdhci_initfn(SDHCIState *s)
s->transfer_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, sdhci_data_transfer, s);
}
+static void sdhci_realizefn(SDHCIState *s, Error **errp)
+{
+ s->buf_maxsz = sdhci_get_fifolen(s);
+ s->fifo_buffer = g_malloc0(s->buf_maxsz);
+
+ memory_region_init_io(&s->iomem, OBJECT(s), &sdhci_mmio_ops, s, "sdhci",
+ SDHC_REGISTERS_MAP_SIZE);
+}
+
static void sdhci_uninitfn(SDHCIState *s)
{
timer_del(s->insert_timer);
@@ -1292,12 +1301,11 @@ static void sdhci_pci_realize(PCIDevice *dev, Error **errp)
SDHCIState *s = PCI_SDHCI(dev);
dev->config[PCI_CLASS_PROG] = 0x01; /* Standard Host supported DMA */
dev->config[PCI_INTERRUPT_PIN] = 0x01; /* interrupt pin A */
+
sdhci_initfn(s);
- s->buf_maxsz = sdhci_get_fifolen(s);
- s->fifo_buffer = g_malloc0(s->buf_maxsz);
+ sdhci_realizefn(s, errp);
+
s->irq = pci_allocate_irq(dev);
- memory_region_init_io(&s->iomem, OBJECT(s), &sdhci_mmio_ops, s, "sdhci",
- SDHC_REGISTERS_MAP_SIZE);
pci_register_bar(dev, 0, 0, &s->iomem);
}
@@ -1351,11 +1359,9 @@ static void sdhci_sysbus_realize(DeviceState *dev, Error ** errp)
SDHCIState *s = SYSBUS_SDHCI(dev);
SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
- s->buf_maxsz = sdhci_get_fifolen(s);
- s->fifo_buffer = g_malloc0(s->buf_maxsz);
+ sdhci_realizefn(s, errp);
+
sysbus_init_irq(sbd, &s->irq);
- memory_region_init_io(&s->iomem, OBJECT(s), &sdhci_mmio_ops, s, "sdhci",
- SDHC_REGISTERS_MAP_SIZE);
sysbus_init_mmio(sbd, &s->iomem);
}
--
2.15.1
next prev parent reply other threads:[~2017-12-29 17:50 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-29 17:48 [Qemu-devel] [PATCH v3 00/42] SDHCI: housekeeping, add a qtest and fix few issues Philippe Mathieu-Daudé
2017-12-29 17:48 ` [Qemu-devel] [PATCH v3 01/42] sdhci: clean up includes Philippe Mathieu-Daudé
2017-12-29 17:48 ` [Qemu-devel] [PATCH v3 02/42] sdhci: sort registers comments Philippe Mathieu-Daudé
2018-01-03 0:05 ` Alistair Francis
2017-12-29 17:48 ` [Qemu-devel] [PATCH v3 03/42] sdhci: remove dead code Philippe Mathieu-Daudé
2018-01-03 0:06 ` Alistair Francis
2017-12-29 17:48 ` [Qemu-devel] [PATCH v3 04/42] sdhci: refactor same sysbus/pci properties into a common one Philippe Mathieu-Daudé
2018-01-03 7:46 ` Fam Zheng
2017-12-29 17:48 ` [Qemu-devel] [PATCH v3 05/42] sdhci: refactor common sysbus/pci class_init() into sdhci_class_init() Philippe Mathieu-Daudé
2018-01-03 7:49 ` Fam Zheng
2017-12-29 17:48 ` Philippe Mathieu-Daudé [this message]
2018-01-03 7:52 ` [Qemu-devel] [PATCH v3 06/42] sdhci: refactor common sysbus/pci realize() into sdhci_realizefn() Fam Zheng
2018-01-03 10:08 ` Philippe Mathieu-Daudé
2017-12-29 17:48 ` [Qemu-devel] [PATCH v3 07/42] sdhci: refactor common sysbus/pci unrealize() into sdhci_unrealizefn() Philippe Mathieu-Daudé
2018-01-03 7:56 ` Fam Zheng
2018-01-03 10:10 ` Philippe Mathieu-Daudé
2018-01-03 10:41 ` Philippe Mathieu-Daudé
2017-12-29 17:48 ` [Qemu-devel] [PATCH v3 08/42] sdhci: use qemu_log_mask(UNIMP) instead of fprintf() Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 09/42] sdhci: convert the DPRINT() calls into trace events Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 10/42] sdhci: add a GPIO for the 'access control' LED Philippe Mathieu-Daudé
2018-01-03 0:10 ` Alistair Francis
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 11/42] sdhci: move MASK_TRNMOD with other SDHC_TRN* defines in "sd-internal.h" Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 12/42] sdhci: use FIELD_DP32() macro for the WRITE_PROTECT flag Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 13/42] sdhci: rename the SDHC_CAPAB register Philippe Mathieu-Daudé
2018-01-03 0:12 ` Alistair Francis
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 14/42] sdhci: fix CAPAB/MAXCURR registers, both are 64bit and read-only Philippe Mathieu-Daudé
2018-01-03 0:12 ` Alistair Francis
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 15/42] sdhci: Implement write method of ACMD12ERRSTS register Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 16/42] sdhci: use deposit64() on admasysaddr Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 17/42] sdhci: add a "dma-memory" property Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 18/42] sdhci: add a spec_version property Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 19/42] sdhci: add basic Spec v1 capabilities Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 20/42] sdhci: add max-block-length capability (Spec v1) Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 22/42] sdhci: add DMA and 64-bit capabilities (Spec v2) Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 23/42] sdhci: default to Spec v2 Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 24/42] sdhci: add a 'dma' shortcut property Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 26/42] sdhci: Fix 64-bit ADMA2 Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 27/42] hw/arm/exynos4210: implement SDHCI Spec v2 Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 28/42] hw/arm/xilinx_zynq: " Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 29/42] sdhci: add qtest to check the SD Spec version Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 30/42] sdhci: check Spec v2 capabilities qtest Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 32/42] sdhci: rename the hostctl1 register Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 33/42] hw/arm/bcm2835_peripherals: implement SDHCI Spec v3 Philippe Mathieu-Daudé
2018-01-09 0:24 ` Andrew Baumann
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 34/42] hw/arm/fsl-imx6: " Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 35/42] hw/arm/xilinx_zynqmp: " Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 36/42] sdhci: check Spec v3 capabilities qtest Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 37/42] sdhci: remove the deprecated 'capareg' property Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 38/42] sdhci: add check_capab_readonly() qtest Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 39/42] sdhci: add a check_capab_baseclock() qtest Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 40/42] sdhci: add a check_capab_sdma() qtest Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 41/42] sdhci: add a check_capab_v3() qtest Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 42/42] sdhci: add Spec v4.2 register definitions Philippe Mathieu-Daudé
2018-01-03 0:15 ` [Qemu-devel] [PATCH v3 00/42] SDHCI: housekeeping, add a qtest and fix few issues Alistair Francis
2018-01-03 1:08 ` Philippe Mathieu-Daudé
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20171229174933.1781-7-f4bug@amsat.org \
--to=f4bug@amsat.org \
--cc=alistair.francis@xilinx.com \
--cc=andrew.smirnov@gmail.com \
--cc=crosthwaite.peter@gmail.com \
--cc=edgar.iglesias@xilinx.com \
--cc=ehabkost@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=zxq_yx_007@163.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).