From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56814) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eUynI-0002t5-Pt for qemu-devel@nongnu.org; Fri, 29 Dec 2017 12:50:09 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eUynI-0005h4-1S for qemu-devel@nongnu.org; Fri, 29 Dec 2017 12:50:08 -0500 Received: from mail-qt0-x242.google.com ([2607:f8b0:400d:c0d::242]:34528) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1eUynH-0005gG-SB for qemu-devel@nongnu.org; Fri, 29 Dec 2017 12:50:07 -0500 Received: by mail-qt0-x242.google.com with SMTP id 33so54962921qtv.1 for ; Fri, 29 Dec 2017 09:50:07 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Fri, 29 Dec 2017 14:48:57 -0300 Message-Id: <20171229174933.1781-7-f4bug@amsat.org> In-Reply-To: <20171229174933.1781-1-f4bug@amsat.org> References: <20171229174933.1781-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [PATCH v3 06/42] sdhci: refactor common sysbus/pci realize() into sdhci_realizefn() List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alistair Francis , "Edgar E . Iglesias" , Peter Maydell , Eduardo Habkost , Xiaoqiang Zhao , Andrey Smirnov Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org, Peter Crosthwaite Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis --- hw/sd/sdhci.c | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 38d82b4c61..ad5853d527 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -1194,6 +1194,15 @@ static void sdhci_initfn(SDHCIState *s) s->transfer_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, sdhci_data_transfer, s); } +static void sdhci_realizefn(SDHCIState *s, Error **errp) +{ + s->buf_maxsz = sdhci_get_fifolen(s); + s->fifo_buffer = g_malloc0(s->buf_maxsz); + + memory_region_init_io(&s->iomem, OBJECT(s), &sdhci_mmio_ops, s, "sdhci", + SDHC_REGISTERS_MAP_SIZE); +} + static void sdhci_uninitfn(SDHCIState *s) { timer_del(s->insert_timer); @@ -1292,12 +1301,11 @@ static void sdhci_pci_realize(PCIDevice *dev, Error **errp) SDHCIState *s = PCI_SDHCI(dev); dev->config[PCI_CLASS_PROG] = 0x01; /* Standard Host supported DMA */ dev->config[PCI_INTERRUPT_PIN] = 0x01; /* interrupt pin A */ + sdhci_initfn(s); - s->buf_maxsz = sdhci_get_fifolen(s); - s->fifo_buffer = g_malloc0(s->buf_maxsz); + sdhci_realizefn(s, errp); + s->irq = pci_allocate_irq(dev); - memory_region_init_io(&s->iomem, OBJECT(s), &sdhci_mmio_ops, s, "sdhci", - SDHC_REGISTERS_MAP_SIZE); pci_register_bar(dev, 0, 0, &s->iomem); } @@ -1351,11 +1359,9 @@ static void sdhci_sysbus_realize(DeviceState *dev, Error ** errp) SDHCIState *s = SYSBUS_SDHCI(dev); SysBusDevice *sbd = SYS_BUS_DEVICE(dev); - s->buf_maxsz = sdhci_get_fifolen(s); - s->fifo_buffer = g_malloc0(s->buf_maxsz); + sdhci_realizefn(s, errp); + sysbus_init_irq(sbd, &s->irq); - memory_region_init_io(&s->iomem, OBJECT(s), &sdhci_mmio_ops, s, "sdhci", - SDHC_REGISTERS_MAP_SIZE); sysbus_init_mmio(sbd, &s->iomem); } -- 2.15.1