From: Laurent Vivier <laurent@vivier.eu>
To: qemu-devel@nongnu.org
Cc: Richard Henderson <richard.henderson@linaro.org>,
Thomas Huth <huth@tuxfamily.org>,
Laurent Vivier <laurent@vivier.eu>
Subject: [Qemu-devel] [PATCH v6 12/17] target/m68k: implement fsave/frestore
Date: Wed, 3 Jan 2018 00:41:03 +0100 [thread overview]
Message-ID: <20180102234108.32713-13-laurent@vivier.eu> (raw)
In-Reply-To: <20180102234108.32713-1-laurent@vivier.eu>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/m68k/translate.c | 23 +++++++++++++++--------
1 file changed, 15 insertions(+), 8 deletions(-)
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index 69bd347a70..baaa260875 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -5104,28 +5104,35 @@ DISAS_INSN(fscc)
#if defined(CONFIG_SOFTMMU)
DISAS_INSN(frestore)
{
- M68kCPU *cpu = m68k_env_get_cpu(env);
+ TCGv addr;
if (IS_USER(s)) {
gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);
return;
}
-
- /* TODO: Implement frestore. */
- cpu_abort(CPU(cpu), "FRESTORE not implemented");
+ if (m68k_feature(s->env, M68K_FEATURE_M68040)) {
+ SRC_EA(env, addr, OS_LONG, 0, NULL);
+ /* FIXME: check the state frame */
+ } else {
+ disas_undef(env, s, insn);
+ }
}
DISAS_INSN(fsave)
{
- M68kCPU *cpu = m68k_env_get_cpu(env);
-
if (IS_USER(s)) {
gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);
return;
}
- /* TODO: Implement fsave. */
- cpu_abort(CPU(cpu), "FSAVE not implemented");
+ if (m68k_feature(s->env, M68K_FEATURE_M68040)) {
+ /* always write IDLE */
+ TCGv idle = tcg_const_i32(0x41000000);
+ DEST_EA(env, insn, OS_LONG, idle, NULL);
+ tcg_temp_free(idle);
+ } else {
+ disas_undef(env, s, insn);
+ }
}
#endif
--
2.14.3
next prev parent reply other threads:[~2018-01-02 23:41 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-02 23:40 [Qemu-devel] [PATCH v6 00/17] target/m68k: supervisor mode (part 1) Laurent Vivier
2018-01-02 23:40 ` [Qemu-devel] [PATCH v6 01/17] target-m68k: sync CC_OP before gen_jmp_tb() Laurent Vivier
2018-01-02 23:40 ` [Qemu-devel] [PATCH v6 02/17] target/m68k: fix gen_get_ccr() Laurent Vivier
2018-01-02 23:40 ` [Qemu-devel] [PATCH v6 03/17] linux-user, m68k: correctly manage SR in context Laurent Vivier
2018-01-02 23:40 ` [Qemu-devel] [PATCH v6 04/17] target/m68k: use insn_pc to generate instruction fault address Laurent Vivier
2018-01-02 23:40 ` [Qemu-devel] [PATCH v6 05/17] target/m68k: add CPU_LOG_INT trace Laurent Vivier
2018-01-03 9:53 ` Philippe Mathieu-Daudé
2018-01-03 21:44 ` Richard Henderson
2018-01-02 23:40 ` [Qemu-devel] [PATCH v6 06/17] target/m68k: manage 680x0 stack frames Laurent Vivier
2018-01-02 23:40 ` [Qemu-devel] [PATCH v6 07/17] target/m68k: add chk and chk2 Laurent Vivier
2018-01-03 21:52 ` Richard Henderson
2018-01-03 23:40 ` Laurent Vivier
2018-01-04 0:32 ` Richard Henderson
2018-01-02 23:40 ` [Qemu-devel] [PATCH v6 08/17] target/m68k: add move16 Laurent Vivier
2018-01-03 21:54 ` Richard Henderson
2018-01-02 23:41 ` [Qemu-devel] [PATCH v6 09/17] target/m68k: softmmu cleanup Laurent Vivier
2018-01-02 23:41 ` [Qemu-devel] [PATCH v6 10/17] target/m68k: add cpush/cinv Laurent Vivier
2018-01-02 23:41 ` [Qemu-devel] [PATCH v6 11/17] target/m68k: add reset Laurent Vivier
2018-01-02 23:41 ` Laurent Vivier [this message]
2018-01-02 23:41 ` [Qemu-devel] [PATCH v6 13/17] target/m68k: move CCR/SR functions Laurent Vivier
2018-01-02 23:41 ` [Qemu-devel] [PATCH v6 14/17] target/m68k: add 680x0 "move to SR" instruction Laurent Vivier
2018-01-02 23:41 ` [Qemu-devel] [PATCH v6 15/17] target/m68k: add andi/ori/eori to SR/CCR Laurent Vivier
2018-01-02 23:41 ` [Qemu-devel] [PATCH v6 16/17] target/m68k: add the Interrupt Stack Pointer Laurent Vivier
2018-01-03 21:58 ` Richard Henderson
2018-01-02 23:41 ` [Qemu-devel] [PATCH v6 17/17] target/m68k: fix m68k_cpu_dump_state() Laurent Vivier
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