From: Fam Zheng <famz@redhat.com>
To: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
Cc: Alistair Francis <alistair.francis@xilinx.com>,
"Edgar E . Iglesias" <edgar.iglesias@xilinx.com>,
Peter Maydell <peter.maydell@linaro.org>,
Andrey Smirnov <andrew.smirnov@gmail.com>,
Eduardo Habkost <ehabkost@redhat.com>,
Xiaoqiang Zhao <zxq_yx_007@163.com>,
qemu-devel@nongnu.org,
Peter Crosthwaite <crosthwaite.peter@gmail.com>
Subject: Re: [Qemu-devel] [PATCH v3 04/42] sdhci: refactor same sysbus/pci properties into a common one
Date: Wed, 3 Jan 2018 15:46:50 +0800 [thread overview]
Message-ID: <20180103074650.GB25984@localhost.localdomain> (raw)
In-Reply-To: <20171229174933.1781-5-f4bug@amsat.org>
On Fri, 12/29 14:48, Philippe Mathieu-Daudé wrote:
> add sysbus/pci/sdbus separator comments to keep it clearer
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> hw/sd/sdhci.c | 21 ++++++++++-----------
> 1 file changed, 10 insertions(+), 11 deletions(-)
>
> diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
> index 365bc80009..a11469fbca 100644
> --- a/hw/sd/sdhci.c
> +++ b/hw/sd/sdhci.c
> @@ -1266,13 +1266,17 @@ const VMStateDescription sdhci_vmstate = {
>
> /* Capabilities registers provide information on supported features of this
> * specific host controller implementation */
> -static Property sdhci_pci_properties[] = {
> +static Property sdhci_properties[] = {
> DEFINE_PROP_UINT32("capareg", SDHCIState, capareg,
> SDHC_CAPAB_REG_DEFAULT),
> DEFINE_PROP_UINT32("maxcurr", SDHCIState, maxcurr, 0),
> + DEFINE_PROP_BOOL("pending-insert-quirk", SDHCIState, pending_insert_quirk,
> + false),
> DEFINE_PROP_END_OF_LIST(),
> };
>
> +/* --- qdev PCI --- */
> +
> static void sdhci_pci_realize(PCIDevice *dev, Error **errp)
> {
> SDHCIState *s = PCI_SDHCI(dev);
> @@ -1305,7 +1309,7 @@ static void sdhci_pci_class_init(ObjectClass *klass, void *data)
> k->class_id = PCI_CLASS_SYSTEM_SDHCI;
> set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
> dc->vmsd = &sdhci_vmstate;
> - dc->props = sdhci_pci_properties;
> + dc->props = sdhci_properties;
> dc->reset = sdhci_poweron_reset;
> }
This is effectively adding "pending-insert-quirk" property to the class. If it
is intended, should this be explained in the commit message?
>
> @@ -1320,14 +1324,7 @@ static const TypeInfo sdhci_pci_info = {
> },
> };
>
> -static Property sdhci_sysbus_properties[] = {
> - DEFINE_PROP_UINT32("capareg", SDHCIState, capareg,
> - SDHC_CAPAB_REG_DEFAULT),
> - DEFINE_PROP_UINT32("maxcurr", SDHCIState, maxcurr, 0),
> - DEFINE_PROP_BOOL("pending-insert-quirk", SDHCIState, pending_insert_quirk,
> - false),
> - DEFINE_PROP_END_OF_LIST(),
> -};
> +/* --- qdev SysBus --- */
>
> static void sdhci_sysbus_init(Object *obj)
> {
> @@ -1360,7 +1357,7 @@ static void sdhci_sysbus_class_init(ObjectClass *klass, void *data)
> DeviceClass *dc = DEVICE_CLASS(klass);
>
> dc->vmsd = &sdhci_vmstate;
> - dc->props = sdhci_sysbus_properties;
> + dc->props = sdhci_properties;
> dc->realize = sdhci_sysbus_realize;
> dc->reset = sdhci_poweron_reset;
> }
> @@ -1374,6 +1371,8 @@ static const TypeInfo sdhci_sysbus_info = {
> .class_init = sdhci_sysbus_class_init,
> };
>
> +/* --- qdev bus master --- */
> +
> static void sdhci_bus_class_init(ObjectClass *klass, void *data)
> {
> SDBusClass *sbc = SD_BUS_CLASS(klass);
> --
> 2.15.1
>
Fam
next prev parent reply other threads:[~2018-01-03 7:46 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-29 17:48 [Qemu-devel] [PATCH v3 00/42] SDHCI: housekeeping, add a qtest and fix few issues Philippe Mathieu-Daudé
2017-12-29 17:48 ` [Qemu-devel] [PATCH v3 01/42] sdhci: clean up includes Philippe Mathieu-Daudé
2017-12-29 17:48 ` [Qemu-devel] [PATCH v3 02/42] sdhci: sort registers comments Philippe Mathieu-Daudé
2018-01-03 0:05 ` Alistair Francis
2017-12-29 17:48 ` [Qemu-devel] [PATCH v3 03/42] sdhci: remove dead code Philippe Mathieu-Daudé
2018-01-03 0:06 ` Alistair Francis
2017-12-29 17:48 ` [Qemu-devel] [PATCH v3 04/42] sdhci: refactor same sysbus/pci properties into a common one Philippe Mathieu-Daudé
2018-01-03 7:46 ` Fam Zheng [this message]
2017-12-29 17:48 ` [Qemu-devel] [PATCH v3 05/42] sdhci: refactor common sysbus/pci class_init() into sdhci_class_init() Philippe Mathieu-Daudé
2018-01-03 7:49 ` Fam Zheng
2017-12-29 17:48 ` [Qemu-devel] [PATCH v3 06/42] sdhci: refactor common sysbus/pci realize() into sdhci_realizefn() Philippe Mathieu-Daudé
2018-01-03 7:52 ` Fam Zheng
2018-01-03 10:08 ` Philippe Mathieu-Daudé
2017-12-29 17:48 ` [Qemu-devel] [PATCH v3 07/42] sdhci: refactor common sysbus/pci unrealize() into sdhci_unrealizefn() Philippe Mathieu-Daudé
2018-01-03 7:56 ` Fam Zheng
2018-01-03 10:10 ` Philippe Mathieu-Daudé
2018-01-03 10:41 ` Philippe Mathieu-Daudé
2017-12-29 17:48 ` [Qemu-devel] [PATCH v3 08/42] sdhci: use qemu_log_mask(UNIMP) instead of fprintf() Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 09/42] sdhci: convert the DPRINT() calls into trace events Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 10/42] sdhci: add a GPIO for the 'access control' LED Philippe Mathieu-Daudé
2018-01-03 0:10 ` Alistair Francis
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 11/42] sdhci: move MASK_TRNMOD with other SDHC_TRN* defines in "sd-internal.h" Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 12/42] sdhci: use FIELD_DP32() macro for the WRITE_PROTECT flag Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 13/42] sdhci: rename the SDHC_CAPAB register Philippe Mathieu-Daudé
2018-01-03 0:12 ` Alistair Francis
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 14/42] sdhci: fix CAPAB/MAXCURR registers, both are 64bit and read-only Philippe Mathieu-Daudé
2018-01-03 0:12 ` Alistair Francis
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 15/42] sdhci: Implement write method of ACMD12ERRSTS register Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 16/42] sdhci: use deposit64() on admasysaddr Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 17/42] sdhci: add a "dma-memory" property Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 18/42] sdhci: add a spec_version property Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 19/42] sdhci: add basic Spec v1 capabilities Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 20/42] sdhci: add max-block-length capability (Spec v1) Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 22/42] sdhci: add DMA and 64-bit capabilities (Spec v2) Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 23/42] sdhci: default to Spec v2 Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 24/42] sdhci: add a 'dma' shortcut property Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 26/42] sdhci: Fix 64-bit ADMA2 Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 27/42] hw/arm/exynos4210: implement SDHCI Spec v2 Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 28/42] hw/arm/xilinx_zynq: " Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 29/42] sdhci: add qtest to check the SD Spec version Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 30/42] sdhci: check Spec v2 capabilities qtest Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 32/42] sdhci: rename the hostctl1 register Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 33/42] hw/arm/bcm2835_peripherals: implement SDHCI Spec v3 Philippe Mathieu-Daudé
2018-01-09 0:24 ` Andrew Baumann
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 34/42] hw/arm/fsl-imx6: " Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 35/42] hw/arm/xilinx_zynqmp: " Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 36/42] sdhci: check Spec v3 capabilities qtest Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 37/42] sdhci: remove the deprecated 'capareg' property Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 38/42] sdhci: add check_capab_readonly() qtest Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 39/42] sdhci: add a check_capab_baseclock() qtest Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 40/42] sdhci: add a check_capab_sdma() qtest Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 41/42] sdhci: add a check_capab_v3() qtest Philippe Mathieu-Daudé
2017-12-29 17:49 ` [Qemu-devel] [PATCH v3 42/42] sdhci: add Spec v4.2 register definitions Philippe Mathieu-Daudé
2018-01-03 0:15 ` [Qemu-devel] [PATCH v3 00/42] SDHCI: housekeeping, add a qtest and fix few issues Alistair Francis
2018-01-03 1:08 ` Philippe Mathieu-Daudé
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20180103074650.GB25984@localhost.localdomain \
--to=famz@redhat.com \
--cc=alistair.francis@xilinx.com \
--cc=andrew.smirnov@gmail.com \
--cc=crosthwaite.peter@gmail.com \
--cc=edgar.iglesias@xilinx.com \
--cc=ehabkost@redhat.com \
--cc=f4bug@amsat.org \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=zxq_yx_007@163.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).