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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: Alistair Francis <alistair.francis@xilinx.com>,
	Fam Zheng <famz@redhat.com>
Cc: "Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	qemu-devel@nongnu.org,
	"Edgar E . Iglesias" <edgar.iglesias@xilinx.com>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Andrey Smirnov" <andrew.smirnov@gmail.com>,
	"Eduardo Habkost" <ehabkost@redhat.com>
Subject: [Qemu-devel] [PATCH v4 04/17] sdhci: refactor same sysbus/pci properties into a common one
Date: Wed,  3 Jan 2018 08:01:13 -0300	[thread overview]
Message-ID: <20180103110126.29209-5-f4bug@amsat.org> (raw)
In-Reply-To: <20180103110126.29209-1-f4bug@amsat.org>

Now both sysbus/pci classes inherit of the 'pending-insert-quirk' property,
which is a HCI dependent property (regardless if accessed through a MMIO
sysbus or a PCI bus).
So far only the BCM implementation has to use it.

Add sysbus/pci/sdbus comments to have clearer code blocks separation.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/sd/sdhci.c | 21 ++++++++++-----------
 1 file changed, 10 insertions(+), 11 deletions(-)

diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index 365bc80009..a11469fbca 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -1266,13 +1266,17 @@ const VMStateDescription sdhci_vmstate = {
 
 /* Capabilities registers provide information on supported features of this
  * specific host controller implementation */
-static Property sdhci_pci_properties[] = {
+static Property sdhci_properties[] = {
     DEFINE_PROP_UINT32("capareg", SDHCIState, capareg,
             SDHC_CAPAB_REG_DEFAULT),
     DEFINE_PROP_UINT32("maxcurr", SDHCIState, maxcurr, 0),
+    DEFINE_PROP_BOOL("pending-insert-quirk", SDHCIState, pending_insert_quirk,
+                     false),
     DEFINE_PROP_END_OF_LIST(),
 };
 
+/* --- qdev PCI --- */
+
 static void sdhci_pci_realize(PCIDevice *dev, Error **errp)
 {
     SDHCIState *s = PCI_SDHCI(dev);
@@ -1305,7 +1309,7 @@ static void sdhci_pci_class_init(ObjectClass *klass, void *data)
     k->class_id = PCI_CLASS_SYSTEM_SDHCI;
     set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
     dc->vmsd = &sdhci_vmstate;
-    dc->props = sdhci_pci_properties;
+    dc->props = sdhci_properties;
     dc->reset = sdhci_poweron_reset;
 }
 
@@ -1320,14 +1324,7 @@ static const TypeInfo sdhci_pci_info = {
     },
 };
 
-static Property sdhci_sysbus_properties[] = {
-    DEFINE_PROP_UINT32("capareg", SDHCIState, capareg,
-            SDHC_CAPAB_REG_DEFAULT),
-    DEFINE_PROP_UINT32("maxcurr", SDHCIState, maxcurr, 0),
-    DEFINE_PROP_BOOL("pending-insert-quirk", SDHCIState, pending_insert_quirk,
-                     false),
-    DEFINE_PROP_END_OF_LIST(),
-};
+/* --- qdev SysBus --- */
 
 static void sdhci_sysbus_init(Object *obj)
 {
@@ -1360,7 +1357,7 @@ static void sdhci_sysbus_class_init(ObjectClass *klass, void *data)
     DeviceClass *dc = DEVICE_CLASS(klass);
 
     dc->vmsd = &sdhci_vmstate;
-    dc->props = sdhci_sysbus_properties;
+    dc->props = sdhci_properties;
     dc->realize = sdhci_sysbus_realize;
     dc->reset = sdhci_poweron_reset;
 }
@@ -1374,6 +1371,8 @@ static const TypeInfo sdhci_sysbus_info = {
     .class_init = sdhci_sysbus_class_init,
 };
 
+/* --- qdev bus master --- */
+
 static void sdhci_bus_class_init(ObjectClass *klass, void *data)
 {
     SDBusClass *sbc = SD_BUS_CLASS(klass);
-- 
2.15.1

  parent reply	other threads:[~2018-01-03 11:01 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-03 11:01 [Qemu-devel] [PATCH v4 00/17] SDHCI: housekeeping Philippe Mathieu-Daudé
2018-01-03 11:01 ` [Qemu-devel] [PATCH v4 01/17] sdhci: clean up includes Philippe Mathieu-Daudé
2018-01-03 11:01 ` [Qemu-devel] [PATCH v4 02/17] sdhci: sort registers comments Philippe Mathieu-Daudé
2018-01-03 11:01 ` [Qemu-devel] [PATCH v4 03/17] sdhci: remove dead code Philippe Mathieu-Daudé
2018-01-03 11:01 ` Philippe Mathieu-Daudé [this message]
2018-01-03 11:01 ` [Qemu-devel] [PATCH v4 05/17] sdhci: refactor common sysbus/pci class_init() into sdhci_class_init() Philippe Mathieu-Daudé
2018-01-03 11:01 ` [Qemu-devel] [PATCH v4 06/17] sdhci: refactor common sysbus/pci realize() into sdhci_realizefn() Philippe Mathieu-Daudé
2018-01-03 17:41   ` Philippe Mathieu-Daudé
2018-01-03 11:01 ` [Qemu-devel] [PATCH v4 07/17] sdhci: refactor common sysbus/pci unrealize() into sdhci_unrealizefn() Philippe Mathieu-Daudé
2018-01-03 11:01 ` [Qemu-devel] [PATCH v4 08/17] sdhci: use qemu_log_mask(UNIMP) instead of fprintf() Philippe Mathieu-Daudé
2018-01-03 11:01 ` [Qemu-devel] [PATCH v4 09/17] sdhci: convert the DPRINT() calls into trace events Philippe Mathieu-Daudé
2018-01-03 11:01 ` [Qemu-devel] [PATCH v4 10/17] sdhci: add a GPIO for the 'access control' LED Philippe Mathieu-Daudé
2018-01-03 11:01 ` [Qemu-devel] [PATCH v4 11/17] sdhci: move MASK_TRNMOD with other SDHC_TRN* defines in "sd-internal.h" Philippe Mathieu-Daudé
2018-01-03 11:01 ` [Qemu-devel] [PATCH v4 12/17] sdhci: use FIELD_DP32() macro for the WRITE_PROTECT flag Philippe Mathieu-Daudé
2018-01-03 11:01 ` [Qemu-devel] [PATCH v4 13/17] sdhci: rename the SDHC_CAPAB register Philippe Mathieu-Daudé
2018-01-03 11:01 ` [Qemu-devel] [PATCH v4 14/17] sdhci: fix CAPAB/MAXCURR registers, both are 64bit and read-only Philippe Mathieu-Daudé
2018-01-03 11:01 ` [Qemu-devel] [PATCH v4 15/17] sdhci: Implement write method of ACMD12ERRSTS register Philippe Mathieu-Daudé
2018-01-03 11:01 ` [Qemu-devel] [PATCH v4 16/17] sdhci: use deposit64() on admasysaddr Philippe Mathieu-Daudé
2018-01-03 11:01 ` [Qemu-devel] [PATCH v4 17/17] sdhci: add a "dma-memory" property Philippe Mathieu-Daudé
2018-01-03 11:25 ` [Qemu-devel] [PATCH v4 00/17] SDHCI: housekeeping no-reply

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