From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47822) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eWgo1-00037F-Px for qemu-devel@nongnu.org; Wed, 03 Jan 2018 06:01:59 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eWgnw-0005qd-6V for qemu-devel@nongnu.org; Wed, 03 Jan 2018 06:01:57 -0500 Received: from mail-qt0-x244.google.com ([2607:f8b0:400d:c0d::244]:33012) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1eWgnw-0005qJ-1z for qemu-devel@nongnu.org; Wed, 03 Jan 2018 06:01:52 -0500 Received: by mail-qt0-x244.google.com with SMTP id e2so1650071qti.0 for ; Wed, 03 Jan 2018 03:01:51 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 3 Jan 2018 08:01:15 -0300 Message-Id: <20180103110126.29209-7-f4bug@amsat.org> In-Reply-To: <20180103110126.29209-1-f4bug@amsat.org> References: <20180103110126.29209-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [PATCH v4 06/17] sdhci: refactor common sysbus/pci realize() into sdhci_realizefn() List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alistair Francis , Fam Zheng Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org, "Edgar E . Iglesias" , Peter Maydell , Andrey Smirnov , Eduardo Habkost Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis --- hw/sd/sdhci.c | 35 ++++++++++++++++++++++++++--------- 1 file changed, 26 insertions(+), 9 deletions(-) diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 38d82b4c61..d5c6d8ab0b 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -29,6 +29,7 @@ #include "sysemu/dma.h" #include "qemu/timer.h" #include "qemu/bitops.h" +#include "qapi/error.h" #include "hw/sd/sdhci.h" #include "sdhci-internal.h" #include "qemu/log.h" @@ -1194,6 +1195,15 @@ static void sdhci_initfn(SDHCIState *s) s->transfer_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, sdhci_data_transfer, s); } +static void sdhci_realizefn(SDHCIState *s, Error **errp) +{ + s->buf_maxsz = sdhci_get_fifolen(s); + s->fifo_buffer = g_malloc0(s->buf_maxsz); + + memory_region_init_io(&s->iomem, OBJECT(s), &sdhci_mmio_ops, s, "sdhci", + SDHC_REGISTERS_MAP_SIZE); +} + static void sdhci_uninitfn(SDHCIState *s) { timer_del(s->insert_timer); @@ -1290,14 +1300,18 @@ static void sdhci_class_init(ObjectClass *klass, void *data) static void sdhci_pci_realize(PCIDevice *dev, Error **errp) { SDHCIState *s = PCI_SDHCI(dev); + Error *err_local = NULL; + + sdhci_initfn(s); + sdhci_realizefn(s, errp); + if (errp) { + error_propagate(errp, err_local); + return; + } + dev->config[PCI_CLASS_PROG] = 0x01; /* Standard Host supported DMA */ dev->config[PCI_INTERRUPT_PIN] = 0x01; /* interrupt pin A */ - sdhci_initfn(s); - s->buf_maxsz = sdhci_get_fifolen(s); - s->fifo_buffer = g_malloc0(s->buf_maxsz); s->irq = pci_allocate_irq(dev); - memory_region_init_io(&s->iomem, OBJECT(s), &sdhci_mmio_ops, s, "sdhci", - SDHC_REGISTERS_MAP_SIZE); pci_register_bar(dev, 0, 0, &s->iomem); } @@ -1350,12 +1364,15 @@ static void sdhci_sysbus_realize(DeviceState *dev, Error ** errp) { SDHCIState *s = SYSBUS_SDHCI(dev); SysBusDevice *sbd = SYS_BUS_DEVICE(dev); + Error *err_local = NULL; + + sdhci_realizefn(s, &err_local); + if (errp) { + error_propagate(errp, err_local); + return; + } - s->buf_maxsz = sdhci_get_fifolen(s); - s->fifo_buffer = g_malloc0(s->buf_maxsz); sysbus_init_irq(sbd, &s->irq); - memory_region_init_io(&s->iomem, OBJECT(s), &sdhci_mmio_ops, s, "sdhci", - SDHC_REGISTERS_MAP_SIZE); sysbus_init_mmio(sbd, &s->iomem); } -- 2.15.1