qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: Alistair Francis <alistair.francis@xilinx.com>,
	"Edgar E . Iglesias" <edgar.iglesias@xilinx.com>,
	Peter Maydell <peter.maydell@linaro.org>,
	Igor Mitsyanko <i.mitsyanko@gmail.com>,
	Krzysztof Kozlowski <krzk@kernel.org>,
	Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: "Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	qemu-devel@nongnu.org, qemu-arm@nongnu.org,
	"Peter Crosthwaite" <crosthwaite.peter@gmail.com>
Subject: [Qemu-devel] [PATCH v4 10/25] hw/arm/exynos4210: implement SDHCI Spec v2
Date: Wed,  3 Jan 2018 15:34:03 -0300	[thread overview]
Message-ID: <20180103183418.23730-11-f4bug@amsat.org> (raw)
In-Reply-To: <20180103183418.23730-1-f4bug@amsat.org>

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/arm/exynos4210.c | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c
index e8e1d81e62..0e6acac784 100644
--- a/hw/arm/exynos4210.c
+++ b/hw/arm/exynos4210.c
@@ -75,7 +75,6 @@
 #define EXYNOS4210_INT_COMBINER_BASE_ADDR   0x10448000
 
 /* SD/MMC host controllers */
-#define EXYNOS4210_SDHCI_CAPABILITIES       0x05E80080
 #define EXYNOS4210_SDHCI_BASE_ADDR          0x12510000
 #define EXYNOS4210_SDHCI_ADDR(n)            (EXYNOS4210_SDHCI_BASE_ADDR + \
                                                 0x00010000 * (n))
@@ -377,8 +376,18 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem)
         BlockBackend *blk;
         DriveInfo *di;
 
+        /* Compatible with:
+         * - SD Host Controller Specification Version 2.0
+         * - SDIO Specification Version 2.0
+         * - MMC Specification Version 4.3
+         *
+         * - SDMA
+         * - ADMA
+         */
         dev = qdev_create(NULL, TYPE_SYSBUS_SDHCI);
-        qdev_prop_set_uint32(dev, "capareg", EXYNOS4210_SDHCI_CAPABILITIES);
+        qdev_prop_set_uint8(dev, "sd-spec-version", 2);
+        qdev_prop_set_bit(dev, "suspend", true);
+        qdev_prop_set_bit(dev, "1v8", true);
         qdev_init_nofail(dev);
 
         busdev = SYS_BUS_DEVICE(dev);
-- 
2.15.1

  parent reply	other threads:[~2018-01-03 18:34 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-03 18:33 [Qemu-devel] [PATCH v4 00/25] SDHCI: add qtests and fix few issues Philippe Mathieu-Daudé
2018-01-03 18:33 ` [Qemu-devel] [PATCH v4 01/25] sdhci: add a spec_version property Philippe Mathieu-Daudé
2018-01-04 17:51   ` Alistair Francis
2018-01-04 19:36     ` Philippe Mathieu-Daudé
2018-01-03 18:33 ` [Qemu-devel] [PATCH v4 02/25] sdhci: add basic Spec v1 capabilities Philippe Mathieu-Daudé
2018-01-03 18:33 ` [Qemu-devel] [PATCH v4 03/25] sdhci: add max-block-length capability (Spec v1) Philippe Mathieu-Daudé
2018-01-03 18:33 ` [Qemu-devel] [PATCH v4 05/25] sdhci: add DMA and 64-bit capabilities (Spec v2) Philippe Mathieu-Daudé
2018-01-03 18:33 ` [Qemu-devel] [PATCH v4 06/25] sdhci: default to Spec v2 Philippe Mathieu-Daudé
2018-01-03 18:34 ` [Qemu-devel] [PATCH v4 07/25] sdhci: add a 'dma' shortcut property Philippe Mathieu-Daudé
2018-01-03 18:34 ` [Qemu-devel] [PATCH v4 09/25] sdhci: Fix 64-bit ADMA2 Philippe Mathieu-Daudé
2018-01-03 18:34 ` Philippe Mathieu-Daudé [this message]
2018-01-03 18:34 ` [Qemu-devel] [PATCH v4 11/25] hw/arm/xilinx_zynq: implement SDHCI Spec v2 Philippe Mathieu-Daudé
2018-01-03 18:34 ` [Qemu-devel] [PATCH v4 12/25] sdhci: add qtest to check the SD Spec version Philippe Mathieu-Daudé
2018-01-03 18:34 ` [Qemu-devel] [PATCH v4 13/25] sdhci: check Spec v2 capabilities qtest Philippe Mathieu-Daudé
2018-01-03 18:34 ` [Qemu-devel] [PATCH v4 15/25] sdhci: rename the hostctl1 register Philippe Mathieu-Daudé
2018-01-03 18:34 ` [Qemu-devel] [PATCH v4 16/25] hw/arm/bcm2835_peripherals: implement SDHCI Spec v3 Philippe Mathieu-Daudé
2018-01-03 18:34 ` [Qemu-devel] [PATCH v4 17/25] hw/arm/fsl-imx6: " Philippe Mathieu-Daudé
2018-01-03 18:34 ` [Qemu-devel] [PATCH v4 18/25] hw/arm/xilinx_zynqmp: " Philippe Mathieu-Daudé
2018-01-03 18:34 ` [Qemu-devel] [PATCH v4 19/25] sdhci: check Spec v3 capabilities qtest Philippe Mathieu-Daudé
2018-01-03 18:34 ` [Qemu-devel] [PATCH v4 20/25] sdhci: remove the deprecated 'capareg' property Philippe Mathieu-Daudé
2018-01-03 18:34 ` [Qemu-devel] [PATCH v4 21/25] sdhci: add check_capab_readonly() qtest Philippe Mathieu-Daudé
2018-01-03 18:34 ` [Qemu-devel] [PATCH v4 22/25] sdhci: add a check_capab_baseclock() qtest Philippe Mathieu-Daudé
2018-01-03 18:34 ` [Qemu-devel] [PATCH v4 23/25] sdhci: add a check_capab_sdma() qtest Philippe Mathieu-Daudé
2018-01-03 18:34 ` [Qemu-devel] [PATCH v4 24/25] sdhci: add a check_capab_v3() qtest Philippe Mathieu-Daudé
2018-01-03 18:34 ` [Qemu-devel] [PATCH v4 25/25] sdhci: add Spec v4.2 register definitions Philippe Mathieu-Daudé

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20180103183418.23730-11-f4bug@amsat.org \
    --to=f4bug@amsat.org \
    --cc=alistair.francis@xilinx.com \
    --cc=andrew.smirnov@gmail.com \
    --cc=crosthwaite.peter@gmail.com \
    --cc=edgar.iglesias@xilinx.com \
    --cc=i.mitsyanko@gmail.com \
    --cc=krzk@kernel.org \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-arm@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).