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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: Alistair Francis <alistair.francis@xilinx.com>,
	"Edgar E . Iglesias" <edgar.iglesias@xilinx.com>,
	Peter Maydell <peter.maydell@linaro.org>,
	Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: "Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	qemu-devel@nongnu.org,
	"Peter Crosthwaite" <crosthwaite.peter@gmail.com>,
	"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
	"open list:Xilinx Zynq" <qemu-arm@nongnu.org>
Subject: [Qemu-devel] [PATCH v4 11/25] hw/arm/xilinx_zynq: implement SDHCI Spec v2
Date: Wed,  3 Jan 2018 15:34:04 -0300	[thread overview]
Message-ID: <20180103183418.23730-12-f4bug@amsat.org> (raw)
In-Reply-To: <20180103183418.23730-1-f4bug@amsat.org>

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/arm/xilinx_zynq.c | 64 ++++++++++++++++++++++++++++++++--------------------
 1 file changed, 40 insertions(+), 24 deletions(-)

diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index 1836a4ed45..9a106db7b7 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -165,10 +165,8 @@ static void zynq_init(MachineState *machine)
     MemoryRegion *address_space_mem = get_system_memory();
     MemoryRegion *ext_ram = g_new(MemoryRegion, 1);
     MemoryRegion *ocm_ram = g_new(MemoryRegion, 1);
-    DeviceState *dev, *carddev;
+    DeviceState *dev;
     SysBusDevice *busdev;
-    DriveInfo *di;
-    BlockBackend *blk;
     qemu_irq pic[64];
     int n;
 
@@ -247,27 +245,45 @@ static void zynq_init(MachineState *machine)
     gem_init(&nd_table[0], 0xE000B000, pic[54-IRQ_OFFSET]);
     gem_init(&nd_table[1], 0xE000C000, pic[77-IRQ_OFFSET]);
 
-    dev = qdev_create(NULL, TYPE_SYSBUS_SDHCI);
-    qdev_init_nofail(dev);
-    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xE0100000);
-    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[56-IRQ_OFFSET]);
-
-    di = drive_get_next(IF_SD);
-    blk = di ? blk_by_legacy_dinfo(di) : NULL;
-    carddev = qdev_create(qdev_get_child_bus(dev, "sd-bus"), TYPE_SD_CARD);
-    qdev_prop_set_drive(carddev, "drive", blk, &error_fatal);
-    object_property_set_bool(OBJECT(carddev), true, "realized", &error_fatal);
-
-    dev = qdev_create(NULL, TYPE_SYSBUS_SDHCI);
-    qdev_init_nofail(dev);
-    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xE0101000);
-    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[79-IRQ_OFFSET]);
-
-    di = drive_get_next(IF_SD);
-    blk = di ? blk_by_legacy_dinfo(di) : NULL;
-    carddev = qdev_create(qdev_get_child_bus(dev, "sd-bus"), TYPE_SD_CARD);
-    qdev_prop_set_drive(carddev, "drive", blk, &error_fatal);
-    object_property_set_bool(OBJECT(carddev), true, "realized", &error_fatal);
+    for (n = 0; n < 2; n++) {
+        int hci_irq = n ? 79 : 56;
+        hwaddr hci_addr = n ? 0xE0101000 : 0xE0100000;
+        DriveInfo *di;
+        BlockBackend *blk;
+        DeviceState *carddev;
+
+        /* Compatible with:
+         * - SD Host Controller Specification Version 2.0 Part A2
+         * - SDIO Specification Version 2.0
+         * - MMC Specification Version 3.31
+         *
+         * - SDMA (single operation DMA)
+         * - ADMA1 (4 KB boundary limited DMA)
+         * - ADMA2
+         *
+         * - up to seven functions in SD1, SD4, but does not support SPI mode
+         * - SD high-speed (SDHS) card
+         * - SD High Capacity (SDHC) card
+         *
+         * - Low-speed, 1 KHz to 400 KHz
+         * - Full-speed, 1 MHz to 50 MHz (25 MB/sec)
+         */
+        dev = qdev_create(NULL, TYPE_SYSBUS_SDHCI);
+        qdev_prop_set_uint8(dev, "sd-spec-version", 2);
+        qdev_prop_set_bit(dev, "adma1", true);
+        qdev_prop_set_bit(dev, "high-speed", true);
+        qdev_prop_set_uint16(dev, "max-block-length", 1024);
+        qdev_init_nofail(dev);
+        sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, hci_addr);
+        sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[hci_irq - IRQ_OFFSET]);
+
+        di = drive_get_next(IF_SD);
+        blk = di ? blk_by_legacy_dinfo(di) : NULL;
+        carddev = qdev_create(qdev_get_child_bus(dev, "sd-bus"), TYPE_SD_CARD);
+        qdev_prop_set_drive(carddev, "drive", blk, &error_fatal);
+        object_property_set_bool(OBJECT(carddev), true, "realized",
+                                 &error_fatal);
+    }
 
     dev = qdev_create(NULL, TYPE_ZYNQ_XADC);
     qdev_init_nofail(dev);
-- 
2.15.1

  parent reply	other threads:[~2018-01-03 18:35 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-03 18:33 [Qemu-devel] [PATCH v4 00/25] SDHCI: add qtests and fix few issues Philippe Mathieu-Daudé
2018-01-03 18:33 ` [Qemu-devel] [PATCH v4 01/25] sdhci: add a spec_version property Philippe Mathieu-Daudé
2018-01-04 17:51   ` Alistair Francis
2018-01-04 19:36     ` Philippe Mathieu-Daudé
2018-01-03 18:33 ` [Qemu-devel] [PATCH v4 02/25] sdhci: add basic Spec v1 capabilities Philippe Mathieu-Daudé
2018-01-03 18:33 ` [Qemu-devel] [PATCH v4 03/25] sdhci: add max-block-length capability (Spec v1) Philippe Mathieu-Daudé
2018-01-03 18:33 ` [Qemu-devel] [PATCH v4 05/25] sdhci: add DMA and 64-bit capabilities (Spec v2) Philippe Mathieu-Daudé
2018-01-03 18:33 ` [Qemu-devel] [PATCH v4 06/25] sdhci: default to Spec v2 Philippe Mathieu-Daudé
2018-01-03 18:34 ` [Qemu-devel] [PATCH v4 07/25] sdhci: add a 'dma' shortcut property Philippe Mathieu-Daudé
2018-01-03 18:34 ` [Qemu-devel] [PATCH v4 09/25] sdhci: Fix 64-bit ADMA2 Philippe Mathieu-Daudé
2018-01-03 18:34 ` [Qemu-devel] [PATCH v4 10/25] hw/arm/exynos4210: implement SDHCI Spec v2 Philippe Mathieu-Daudé
2018-01-03 18:34 ` Philippe Mathieu-Daudé [this message]
2018-01-03 18:34 ` [Qemu-devel] [PATCH v4 12/25] sdhci: add qtest to check the SD Spec version Philippe Mathieu-Daudé
2018-01-03 18:34 ` [Qemu-devel] [PATCH v4 13/25] sdhci: check Spec v2 capabilities qtest Philippe Mathieu-Daudé
2018-01-03 18:34 ` [Qemu-devel] [PATCH v4 15/25] sdhci: rename the hostctl1 register Philippe Mathieu-Daudé
2018-01-03 18:34 ` [Qemu-devel] [PATCH v4 16/25] hw/arm/bcm2835_peripherals: implement SDHCI Spec v3 Philippe Mathieu-Daudé
2018-01-03 18:34 ` [Qemu-devel] [PATCH v4 17/25] hw/arm/fsl-imx6: " Philippe Mathieu-Daudé
2018-01-03 18:34 ` [Qemu-devel] [PATCH v4 18/25] hw/arm/xilinx_zynqmp: " Philippe Mathieu-Daudé
2018-01-03 18:34 ` [Qemu-devel] [PATCH v4 19/25] sdhci: check Spec v3 capabilities qtest Philippe Mathieu-Daudé
2018-01-03 18:34 ` [Qemu-devel] [PATCH v4 20/25] sdhci: remove the deprecated 'capareg' property Philippe Mathieu-Daudé
2018-01-03 18:34 ` [Qemu-devel] [PATCH v4 21/25] sdhci: add check_capab_readonly() qtest Philippe Mathieu-Daudé
2018-01-03 18:34 ` [Qemu-devel] [PATCH v4 22/25] sdhci: add a check_capab_baseclock() qtest Philippe Mathieu-Daudé
2018-01-03 18:34 ` [Qemu-devel] [PATCH v4 23/25] sdhci: add a check_capab_sdma() qtest Philippe Mathieu-Daudé
2018-01-03 18:34 ` [Qemu-devel] [PATCH v4 24/25] sdhci: add a check_capab_v3() qtest Philippe Mathieu-Daudé
2018-01-03 18:34 ` [Qemu-devel] [PATCH v4 25/25] sdhci: add Spec v4.2 register definitions Philippe Mathieu-Daudé

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