From: "Alex Bennée" <alex.bennee@linaro.org>
To: richard.henderson@linaro.org, peter.maydell@linaro.org,
laurent@vivier.eu, bharata@linux.vnet.ibm.com,
andrew@andrewdutcher.com
Cc: qemu-devel@nongnu.org, "Alex Bennée" <alex.bennee@linaro.org>,
"Aurelien Jarno" <aurelien@aurel32.net>
Subject: [Qemu-devel] [PATCH v2 15/20] fpu/softfloat: re-factor round_to_int
Date: Tue, 9 Jan 2018 12:22:47 +0000 [thread overview]
Message-ID: <20180109122252.17670-16-alex.bennee@linaro.org> (raw)
In-Reply-To: <20180109122252.17670-1-alex.bennee@linaro.org>
We can now add float16_round_to_int and use the common round_decomposed and
canonicalize functions to have a single implementation for
float16/32/64 round_to_int functions.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
fpu/softfloat.c | 304 ++++++++++++++++++++----------------------------
include/fpu/softfloat.h | 1 +
2 files changed, 130 insertions(+), 175 deletions(-)
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 84386f354b..edc35300d1 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -1183,6 +1183,135 @@ float64 float64_div(float64 a, float64 b, float_status *status)
return float64_round_pack_canonical(pr, status);
}
+/*
+ * Rounds the floating-point value `a' to an integer, and returns the
+ * result as a floating-point value. The operation is performed
+ * according to the IEC/IEEE Standard for Binary Floating-Point
+ * Arithmetic.
+ */
+
+static decomposed_parts round_decomposed(decomposed_parts a, int rounding_mode,
+ float_status *s)
+{
+
+ switch (a.cls) {
+ case float_class_snan:
+ a.cls = s->default_nan_mode ? float_class_dnan : float_class_msnan;
+ s->float_exception_flags |= float_flag_invalid;
+ break;
+ case float_class_zero:
+ case float_class_inf:
+ case float_class_qnan:
+ /* already "integral" */
+ break;
+ case float_class_normal:
+ if (a.exp >= DECOMPOSED_BINARY_POINT) {
+ /* already integral */
+ break;
+ }
+ if (a.exp < 0) {
+ bool one;
+ /* all fractional */
+ s->float_exception_flags |= float_flag_inexact;
+ switch (rounding_mode) {
+ case float_round_nearest_even:
+ one = a.exp == -1 && a.frac > DECOMPOSED_IMPLICIT_BIT;
+ break;
+ case float_round_ties_away:
+ one = a.exp == -1 && a.frac >= DECOMPOSED_IMPLICIT_BIT;
+ break;
+ case float_round_to_zero:
+ one = false;
+ break;
+ case float_round_up:
+ one = !a.sign;
+ break;
+ case float_round_down:
+ one = a.sign;
+ break;
+ default:
+ g_assert_not_reached();
+ }
+
+ if (one) {
+ a.frac = DECOMPOSED_IMPLICIT_BIT;
+ a.exp = 0;
+ } else {
+ a.cls = float_class_zero;
+ }
+ } else {
+ uint64_t frac_lsb, frac_lsbm1, round_mask, roundeven_mask, inc;
+
+ frac_lsb = DECOMPOSED_IMPLICIT_BIT >> a.exp;
+ frac_lsbm1 = frac_lsb >> 1;
+ roundeven_mask = (frac_lsb - 1) | frac_lsb;
+ round_mask = roundeven_mask >> 1;
+
+ switch (rounding_mode) {
+ case float_round_nearest_even:
+ inc = ((a.frac & roundeven_mask) != frac_lsbm1 ? frac_lsbm1 : 0);
+ break;
+ case float_round_ties_away:
+ inc = frac_lsbm1;
+ break;
+ case float_round_to_zero:
+ inc = 0;
+ break;
+ case float_round_up:
+ inc = a.sign ? 0 : round_mask;
+ break;
+ case float_round_down:
+ inc = a.sign ? round_mask : 0;
+ break;
+ default:
+ g_assert_not_reached();
+ }
+
+ if (a.frac & round_mask) {
+ s->float_exception_flags |= float_flag_inexact;
+ a.frac += inc;
+ a.frac &= ~round_mask;
+ if (a.frac & DECOMPOSED_OVERFLOW_BIT) {
+ a.frac >>= 1;
+ a.exp++;
+ }
+ }
+ }
+ break;
+ default:
+ g_assert_not_reached();
+ }
+ return a;
+}
+
+float16 float16_round_to_int(float16 a, float_status *s)
+{
+ decomposed_parts pa = float16_unpack_canonical(a, s);
+ decomposed_parts pr = round_decomposed(pa, s->float_rounding_mode, s);
+ return float16_round_pack_canonical(pr, s);
+}
+
+float32 float32_round_to_int(float32 a, float_status *s)
+{
+ decomposed_parts pa = float32_unpack_canonical(a, s);
+ decomposed_parts pr = round_decomposed(pa, s->float_rounding_mode, s);
+ return float32_round_pack_canonical(pr, s);
+}
+
+float64 float64_round_to_int(float64 a, float_status *s)
+{
+ decomposed_parts pa = float64_unpack_canonical(a, s);
+ decomposed_parts pr = round_decomposed(pa, s->float_rounding_mode, s);
+ return float64_round_pack_canonical(pr, s);
+}
+
+float64 float64_trunc_to_int(float64 a, float_status *s)
+{
+ decomposed_parts pa = float64_unpack_canonical(a, s);
+ decomposed_parts pr = round_decomposed(pa, float_round_to_zero, s);
+ return float64_round_pack_canonical(pr, s);
+}
+
/*----------------------------------------------------------------------------
| Takes a 64-bit fixed-point value `absZ' with binary point between bits 6
| and 7, and returns the properly rounded 32-bit integer corresponding to the
@@ -2913,88 +3042,6 @@ float128 float32_to_float128(float32 a, float_status *status)
}
-/*----------------------------------------------------------------------------
-| Rounds the single-precision floating-point value `a' to an integer, and
-| returns the result as a single-precision floating-point value. The
-| operation is performed according to the IEC/IEEE Standard for Binary
-| Floating-Point Arithmetic.
-*----------------------------------------------------------------------------*/
-
-float32 float32_round_to_int(float32 a, float_status *status)
-{
- flag aSign;
- int aExp;
- uint32_t lastBitMask, roundBitsMask;
- uint32_t z;
- a = float32_squash_input_denormal(a, status);
-
- aExp = extractFloat32Exp( a );
- if ( 0x96 <= aExp ) {
- if ( ( aExp == 0xFF ) && extractFloat32Frac( a ) ) {
- return propagateFloat32NaN(a, a, status);
- }
- return a;
- }
- if ( aExp <= 0x7E ) {
- if ( (uint32_t) ( float32_val(a)<<1 ) == 0 ) return a;
- status->float_exception_flags |= float_flag_inexact;
- aSign = extractFloat32Sign( a );
- switch (status->float_rounding_mode) {
- case float_round_nearest_even:
- if ( ( aExp == 0x7E ) && extractFloat32Frac( a ) ) {
- return packFloat32( aSign, 0x7F, 0 );
- }
- break;
- case float_round_ties_away:
- if (aExp == 0x7E) {
- return packFloat32(aSign, 0x7F, 0);
- }
- break;
- case float_round_down:
- return make_float32(aSign ? 0xBF800000 : 0);
- case float_round_up:
- return make_float32(aSign ? 0x80000000 : 0x3F800000);
- }
- return packFloat32( aSign, 0, 0 );
- }
- lastBitMask = 1;
- lastBitMask <<= 0x96 - aExp;
- roundBitsMask = lastBitMask - 1;
- z = float32_val(a);
- switch (status->float_rounding_mode) {
- case float_round_nearest_even:
- z += lastBitMask>>1;
- if ((z & roundBitsMask) == 0) {
- z &= ~lastBitMask;
- }
- break;
- case float_round_ties_away:
- z += lastBitMask >> 1;
- break;
- case float_round_to_zero:
- break;
- case float_round_up:
- if (!extractFloat32Sign(make_float32(z))) {
- z += roundBitsMask;
- }
- break;
- case float_round_down:
- if (extractFloat32Sign(make_float32(z))) {
- z += roundBitsMask;
- }
- break;
- default:
- abort();
- }
- z &= ~ roundBitsMask;
- if (z != float32_val(a)) {
- status->float_exception_flags |= float_flag_inexact;
- }
- return make_float32(z);
-
-}
-
-
/*----------------------------------------------------------------------------
@@ -4140,99 +4187,6 @@ float128 float64_to_float128(float64 a, float_status *status)
}
-/*----------------------------------------------------------------------------
-| Rounds the double-precision floating-point value `a' to an integer, and
-| returns the result as a double-precision floating-point value. The
-| operation is performed according to the IEC/IEEE Standard for Binary
-| Floating-Point Arithmetic.
-*----------------------------------------------------------------------------*/
-
-float64 float64_round_to_int(float64 a, float_status *status)
-{
- flag aSign;
- int aExp;
- uint64_t lastBitMask, roundBitsMask;
- uint64_t z;
- a = float64_squash_input_denormal(a, status);
-
- aExp = extractFloat64Exp( a );
- if ( 0x433 <= aExp ) {
- if ( ( aExp == 0x7FF ) && extractFloat64Frac( a ) ) {
- return propagateFloat64NaN(a, a, status);
- }
- return a;
- }
- if ( aExp < 0x3FF ) {
- if ( (uint64_t) ( float64_val(a)<<1 ) == 0 ) return a;
- status->float_exception_flags |= float_flag_inexact;
- aSign = extractFloat64Sign( a );
- switch (status->float_rounding_mode) {
- case float_round_nearest_even:
- if ( ( aExp == 0x3FE ) && extractFloat64Frac( a ) ) {
- return packFloat64( aSign, 0x3FF, 0 );
- }
- break;
- case float_round_ties_away:
- if (aExp == 0x3FE) {
- return packFloat64(aSign, 0x3ff, 0);
- }
- break;
- case float_round_down:
- return make_float64(aSign ? LIT64( 0xBFF0000000000000 ) : 0);
- case float_round_up:
- return make_float64(
- aSign ? LIT64( 0x8000000000000000 ) : LIT64( 0x3FF0000000000000 ));
- }
- return packFloat64( aSign, 0, 0 );
- }
- lastBitMask = 1;
- lastBitMask <<= 0x433 - aExp;
- roundBitsMask = lastBitMask - 1;
- z = float64_val(a);
- switch (status->float_rounding_mode) {
- case float_round_nearest_even:
- z += lastBitMask >> 1;
- if ((z & roundBitsMask) == 0) {
- z &= ~lastBitMask;
- }
- break;
- case float_round_ties_away:
- z += lastBitMask >> 1;
- break;
- case float_round_to_zero:
- break;
- case float_round_up:
- if (!extractFloat64Sign(make_float64(z))) {
- z += roundBitsMask;
- }
- break;
- case float_round_down:
- if (extractFloat64Sign(make_float64(z))) {
- z += roundBitsMask;
- }
- break;
- default:
- abort();
- }
- z &= ~ roundBitsMask;
- if (z != float64_val(a)) {
- status->float_exception_flags |= float_flag_inexact;
- }
- return make_float64(z);
-
-}
-
-float64 float64_trunc_to_int(float64 a, float_status *status)
-{
- int oldmode;
- float64 res;
- oldmode = status->float_rounding_mode;
- status->float_rounding_mode = float_round_to_zero;
- res = float64_round_to_int(a, status);
- status->float_rounding_mode = oldmode;
- return res;
-}
-
/*----------------------------------------------------------------------------
| Returns the remainder of the double-precision floating-point value `a'
diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
index c92147abec..6427762a9a 100644
--- a/include/fpu/softfloat.h
+++ b/include/fpu/softfloat.h
@@ -319,6 +319,7 @@ float64 float16_to_float64(float16 a, flag ieee, float_status *status);
| Software half-precision operations.
*----------------------------------------------------------------------------*/
+float16 float16_round_to_int(float16, float_status *status);
float16 float16_add(float16, float16, float_status *status);
float16 float16_sub(float16, float16, float_status *status);
float16 float16_mul(float16, float16, float_status *status);
--
2.15.1
next prev parent reply other threads:[~2018-01-09 12:28 UTC|newest]
Thread overview: 68+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-09 12:22 [Qemu-devel] [PATCH v2 00/20] re-factor softfloat and add fp16 functions Alex Bennée
2018-01-09 12:22 ` [Qemu-devel] [PATCH v2 01/20] fpu/softfloat: implement float16_squash_input_denormal Alex Bennée
2018-01-12 13:41 ` Peter Maydell
2018-01-09 12:22 ` [Qemu-devel] [PATCH v2 02/20] include/fpu/softfloat: remove USE_SOFTFLOAT_STRUCT_TYPES Alex Bennée
2018-01-09 12:27 ` Laurent Vivier
2018-01-09 14:12 ` Aurelien Jarno
2018-01-09 14:14 ` Peter Maydell
2018-01-09 14:20 ` Laurent Vivier
2018-01-09 14:43 ` Peter Maydell
2018-01-09 16:45 ` Richard Henderson
2018-01-09 15:25 ` Alex Bennée
2018-01-09 12:22 ` [Qemu-devel] [PATCH v2 03/20] include/fpu/softfloat: implement float16_abs helper Alex Bennée
2018-01-12 13:42 ` Peter Maydell
2018-01-09 12:22 ` [Qemu-devel] [PATCH v2 04/20] include/fpu/softfloat: implement float16_chs helper Alex Bennée
2018-01-12 13:43 ` Peter Maydell
2018-01-09 12:22 ` [Qemu-devel] [PATCH v2 05/20] include/fpu/softfloat: implement float16_set_sign helper Alex Bennée
2018-01-12 13:43 ` Peter Maydell
2018-01-09 12:22 ` [Qemu-devel] [PATCH v2 06/20] include/fpu/softfloat: add some float16 constants Alex Bennée
2018-01-09 13:27 ` Philippe Mathieu-Daudé
2018-01-09 15:16 ` Alex Bennée
2018-01-12 13:47 ` Peter Maydell
2018-01-09 12:22 ` [Qemu-devel] [PATCH v2 07/20] fpu/softfloat: propagate signalling NaNs in MINMAX Alex Bennée
2018-01-12 14:04 ` Peter Maydell
2018-01-16 11:31 ` Alex Bennée
2018-01-16 11:53 ` Alex Bennée
2018-01-09 12:22 ` [Qemu-devel] [PATCH v2 08/20] fpu/softfloat: improve comments on ARM NaN propagation Alex Bennée
2018-01-12 14:07 ` Peter Maydell
2018-01-09 12:22 ` [Qemu-devel] [PATCH v2 09/20] fpu/softfloat: move the extract functions to the top of the file Alex Bennée
2018-01-12 14:07 ` Peter Maydell
2018-01-09 12:22 ` [Qemu-devel] [PATCH v2 10/20] fpu/softfloat: define decompose structures Alex Bennée
2018-01-09 17:01 ` Richard Henderson
2018-01-12 14:22 ` Peter Maydell
2018-01-12 16:21 ` Philippe Mathieu-Daudé
2018-01-18 13:08 ` Alex Bennée
2018-01-18 14:26 ` Philippe Mathieu-Daudé
2018-01-18 14:31 ` Peter Maydell
2018-01-18 14:59 ` Philippe Mathieu-Daudé
2018-01-18 15:17 ` Peter Maydell
2018-01-23 12:00 ` Alex Bennée
2018-01-09 12:22 ` [Qemu-devel] [PATCH v2 11/20] fpu/softfloat: re-factor add/sub Alex Bennée
2018-01-12 15:57 ` Peter Maydell
2018-01-12 18:30 ` Richard Henderson
2018-01-18 16:43 ` Alex Bennée
2018-01-18 16:47 ` Richard Henderson
2018-01-23 20:05 ` Alex Bennée
2018-01-09 12:22 ` [Qemu-devel] [PATCH v2 12/20] fpu/softfloat: re-factor mul Alex Bennée
2018-01-09 12:43 ` Philippe Mathieu-Daudé
2018-01-12 16:17 ` Peter Maydell
2018-01-16 10:16 ` Alex Bennée
2018-01-09 12:22 ` [Qemu-devel] [PATCH v2 13/20] fpu/softfloat: re-factor div Alex Bennée
2018-01-12 16:22 ` Peter Maydell
2018-01-12 18:35 ` Richard Henderson
2018-01-09 12:22 ` [Qemu-devel] [PATCH v2 14/20] fpu/softfloat: re-factor muladd Alex Bennée
2018-02-13 15:15 ` Peter Maydell
2018-01-09 12:22 ` Alex Bennée [this message]
2018-01-09 12:22 ` [Qemu-devel] [PATCH v2 16/20] fpu/softfloat: re-factor float to int/uint Alex Bennée
2018-01-09 17:12 ` Richard Henderson
2018-01-12 16:36 ` Peter Maydell
2018-01-16 17:06 ` Alex Bennée
2018-01-09 12:22 ` [Qemu-devel] [PATCH v2 17/20] fpu/softfloat: re-factor int/uint to float Alex Bennée
2018-01-09 12:22 ` [Qemu-devel] [PATCH v2 18/20] fpu/softfloat: re-factor scalbn Alex Bennée
2018-01-12 16:31 ` Peter Maydell
2018-01-24 12:03 ` Alex Bennée
2018-01-09 12:22 ` [Qemu-devel] [PATCH v2 19/20] fpu/softfloat: re-factor minmax Alex Bennée
2018-01-09 17:16 ` Richard Henderson
2018-01-09 12:22 ` [Qemu-devel] [PATCH v2 20/20] fpu/softfloat: re-factor compare Alex Bennée
2018-01-09 17:18 ` Richard Henderson
2018-01-09 13:07 ` [Qemu-devel] [PATCH v2 00/20] re-factor softfloat and add fp16 functions no-reply
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