[Qemu-devel] [PATCH 0/2] target/arm: split out vfp_expand_imm

[Qemu-devel] [PATCH 0/2] target/arm: split out vfp_expand_imm

[Richard Henderson]

One more piece of target/arm prep work from my SVE branch.

I saw that Alex was touching the same bit of code in his ARMv8.2
fp16 patch set and thought we should coordinate on this.


r~


Richard Henderson (2):
  target/arm: Split out vfp_expand_imm
  target/arm: Add fp16 support to vfp_expand_imm

 target/arm/translate-a64.c | 49 +++++++++++++++++++++++++++++++---------------
 1 file changed, 33 insertions(+), 16 deletions(-)

-- 
2.13.6

[Qemu-devel] [PATCH 1/2] target/arm: Split out vfp_expand_imm

[Richard Henderson]

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/translate-a64.c | 44 ++++++++++++++++++++++++++++----------------
 1 file changed, 28 insertions(+), 16 deletions(-)

diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index ecb72e4d9c..e03cd3801a 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -5014,6 +5014,33 @@ static void disas_fp_3src(DisasContext *s, uint32_t insn)
     }
 }
 
+/* The imm8 encodes the sign bit, enough bits to represent an exponent in
+ * the range 01....1xx to 10....0xx, and the most significant 4 bits of
+ * the mantissa; see VFPExpandImm() in the v8 ARM ARM.
+ */
+static uint64_t vfp_expand_imm(int size, uint8_t imm8)
+{
+    uint64_t imm;
+
+    switch (size) {
+    case MO_64:
+        imm = (extract32(imm8, 7, 1) ? 0x8000 : 0) |
+            (extract32(imm8, 6, 1) ? 0x3fc0 : 0x4000) |
+            extract32(imm8, 0, 6);
+        imm <<= 48;
+        break;
+    case MO_32:
+        imm = (extract32(imm8, 7, 1) ? 0x8000 : 0) |
+            (extract32(imm8, 6, 1) ? 0x3e00 : 0x4000) |
+            (extract32(imm8, 0, 6) << 3);
+        imm <<= 16;
+        break;
+    default:
+        g_assert_not_reached();
+    }
+    return imm;
+}
+
 /* Floating point immediate
  *   31  30  29 28       24 23  22  21 20        13 12   10 9    5 4    0
  * +---+---+---+-----------+------+---+------------+-------+------+------+
@@ -5037,22 +5064,7 @@ static void disas_fp_imm(DisasContext *s, uint32_t insn)
         return;
     }
 
-    /* The imm8 encodes the sign bit, enough bits to represent
-     * an exponent in the range 01....1xx to 10....0xx,
-     * and the most significant 4 bits of the mantissa; see
-     * VFPExpandImm() in the v8 ARM ARM.
-     */
-    if (is_double) {
-        imm = (extract32(imm8, 7, 1) ? 0x8000 : 0) |
-            (extract32(imm8, 6, 1) ? 0x3fc0 : 0x4000) |
-            extract32(imm8, 0, 6);
-        imm <<= 48;
-    } else {
-        imm = (extract32(imm8, 7, 1) ? 0x8000 : 0) |
-            (extract32(imm8, 6, 1) ? 0x3e00 : 0x4000) |
-            (extract32(imm8, 0, 6) << 3);
-        imm <<= 16;
-    }
+    imm = vfp_expand_imm(MO_32 + is_double, imm8);
 
     tcg_res = tcg_const_i64(imm);
     write_fp_dreg(s, rd, tcg_res);
-- 
2.13.6

[Qemu-devel] [PATCH 2/2] target/arm: Add fp16 support to vfp_expand_imm

[Richard Henderson]

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/translate-a64.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index e03cd3801a..4fe9d82a55 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -5035,6 +5035,11 @@ static uint64_t vfp_expand_imm(int size, uint8_t imm8)
             (extract32(imm8, 0, 6) << 3);
         imm <<= 16;
         break;
+    case MO_16:
+        imm = (extract32(imm8, 7, 1) ? 0x8000 : 0) |
+            (extract32(imm8, 6, 1) ? 0x3000 : 0x4000) |
+            (extract32(imm8, 0, 6) << 6);
+        break;
     default:
         g_assert_not_reached();
     }
-- 
2.13.6

Re: [Qemu-devel] [PATCH 0/2] target/arm: split out vfp_expand_imm

[Alex Bennée]

Richard Henderson <richard.henderson@linaro.org> writes:

> One more piece of target/arm prep work from my SVE branch.
>
> I saw that Alex was touching the same bit of code in his ARMv8.2
> fp16 patch set and thought we should coordinate on this.


Thanks, I'll roll them into my series.

>
>
> r~
>
>
> Richard Henderson (2):
>   target/arm: Split out vfp_expand_imm
>   target/arm: Add fp16 support to vfp_expand_imm
>
>  target/arm/translate-a64.c | 49 +++++++++++++++++++++++++++++++---------------
>  1 file changed, 33 insertions(+), 16 deletions(-)


--
Alex Bennée

Re: [Qemu-devel] [PATCH 0/2] target/arm: split out vfp_expand_imm

[Peter Maydell]

On 10 January 2018 at 06:33, Richard Henderson
<richard.henderson@linaro.org> wrote:
> One more piece of target/arm prep work from my SVE branch.
>
> I saw that Alex was touching the same bit of code in his ARMv8.2
> fp16 patch set and thought we should coordinate on this.
>
>
> r~
>
>
> Richard Henderson (2):
>   target/arm: Split out vfp_expand_imm
>   target/arm: Add fp16 support to vfp_expand_imm
>
>  target/arm/translate-a64.c | 49 +++++++++++++++++++++++++++++++---------------
>  1 file changed, 33 insertions(+), 16 deletions(-)

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

I could put these in target-arm.next now if you like ?

thanks
-- PMM

Re: [Qemu-devel] [PATCH 0/2] target/arm: split out vfp_expand_imm

[Richard Henderson]

On 01/12/2018 09:22 AM, Peter Maydell wrote:
>> Richard Henderson (2):
>>   target/arm: Split out vfp_expand_imm
>>   target/arm: Add fp16 support to vfp_expand_imm
>>
>>  target/arm/translate-a64.c | 49 +++++++++++++++++++++++++++++++---------------
>>  1 file changed, 33 insertions(+), 16 deletions(-)
> 
> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
> 
> I could put these in target-arm.next now if you like ?

Yes, please.


r~

Re: [Qemu-devel] [PATCH 0/2] target/arm: split out vfp_expand_imm

[Peter Maydell]

On 12 January 2018 at 19:07, Richard Henderson
<richard.henderson@linaro.org> wrote:
> On 01/12/2018 09:22 AM, Peter Maydell wrote:
>>> Richard Henderson (2):
>>>   target/arm: Split out vfp_expand_imm
>>>   target/arm: Add fp16 support to vfp_expand_imm
>>>
>>>  target/arm/translate-a64.c | 49 +++++++++++++++++++++++++++++++---------------
>>>  1 file changed, 33 insertions(+), 16 deletions(-)
>>
>> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
>>
>> I could put these in target-arm.next now if you like ?
>
> Yes, please.

OK, done.

thanks
-- PMM