[Qemu-devel] [PULL 0/4] TCG queued patches

[Richard Henderson <richard.henderson@linaro.org>]

This includes a fix for the tcg/arm bug exposed by the ppc64 code change
for comparisons.

It also includes improvements to tcg/arm and tcg/ppc to allow for larger
CPUFooState structures, as exposed by expanding CPUARMState for 2048-bit
vector registers.

Note that tcg/mips has the exact same problem.  However, the mips isa
makes it more difficult to fix up.  I'd like someone with hardware to
make this change.



r~



The following changes since commit 7398166ddf7c6dbbc9cae6ac69bb2feda14b40ac:

  Merge remote-tracking branch 'remotes/kraxel/tags/vnc-20180112-pull-request' into staging (2018-01-12 16:01:30 +0000)

are available in the Git repository at:

  git://github.com/rth7680/qemu.git tags/pull-tcg-20180112

for you to fetch changes up to bb08c35b17b7245c696bd12e527453e624e77da3:

  tcg/ppc: Allow a 32-bit offset to the constant pool (2018-01-12 12:50:36 -0800)

----------------------------------------------------------------
Queued tcg patches

----------------------------------------------------------------
Richard Henderson (4):
      tcg/arm: Fix double-word comparisons
      tcg/arm: Support tlb offsets larger than 64k
      tcg/ppc: Support tlb offsets larger than 64k
      tcg/ppc: Allow a 32-bit offset to the constant pool

 tcg/arm/tcg-target.inc.c | 142 ++++++++++++++++++++++++++++++++---------------
 tcg/ppc/tcg-target.inc.c |  84 ++++++++++++++++------------
 2 files changed, 144 insertions(+), 82 deletions(-)