From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38204) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ecEzK-0007Qg-BN for qemu-devel@nongnu.org; Thu, 18 Jan 2018 13:32:35 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ecEzH-0003Xt-89 for qemu-devel@nongnu.org; Thu, 18 Jan 2018 13:32:34 -0500 Received: from mail-qt0-x242.google.com ([2607:f8b0:400d:c0d::242]:46984) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1ecEzH-0003Xh-41 for qemu-devel@nongnu.org; Thu, 18 Jan 2018 13:32:31 -0500 Received: by mail-qt0-x242.google.com with SMTP id o35so22517778qtj.13 for ; Thu, 18 Jan 2018 10:32:31 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Thu, 18 Jan 2018 15:31:04 -0300 Message-Id: <20180118183108.16009-13-f4bug@amsat.org> In-Reply-To: <20180118183108.16009-1-f4bug@amsat.org> References: <20180118183108.16009-1-f4bug@amsat.org> In-Reply-To: <20180118182510.15630-1-f4bug@amsat.org> References: <20180118182510.15630-1-f4bug@amsat.org> Subject: [Qemu-devel] [PATCH v8 13/17] sdhci: Fix 64-bit ADMA2 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paolo Bonzini , Alistair Francis , Peter Maydell , Stefan Hajnoczi Cc: Sai Pavan Boddu , qemu-devel@nongnu.org, Kevin O'Connor , "Edgar E . Iglesias" , Andrey Smirnov , Marcel Apfelbaum From: Sai Pavan Boddu The 64-bit ADMA address is not converted to the cpu endianes correctly. This patch fixes the issue and uses a valid mask for the attribute data. Signed-off-by: Sai Pavan Boddu [AF: Re-write commit message] Reviewed-by: Alistair Francis --- hw/sd/sdhci.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 7390b8464b..6277f067da 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -632,8 +632,8 @@ static void get_adma_description(SDHCIState *s, ADMADescr *dscr) dscr->length = le16_to_cpu(dscr->length); dma_memory_read(s->dma_as, entry_addr + 4, (uint8_t *)(&dscr->addr), 8); - dscr->attr = le64_to_cpu(dscr->attr); - dscr->attr &= 0xfffffff8; + dscr->addr = le64_to_cpu(dscr->addr); + dscr->attr &= (uint8_t) ~0xC0; dscr->incr = 12; break; } -- 2.15.1