From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37919) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ecEyl-0006yQ-Md for qemu-devel@nongnu.org; Thu, 18 Jan 2018 13:32:00 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ecEyk-0003F0-P5 for qemu-devel@nongnu.org; Thu, 18 Jan 2018 13:31:59 -0500 Received: from mail-qt0-x242.google.com ([2607:f8b0:400d:c0d::242]:37007) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1ecEyk-0003Er-LF for qemu-devel@nongnu.org; Thu, 18 Jan 2018 13:31:58 -0500 Received: by mail-qt0-x242.google.com with SMTP id d54so20573127qtd.4 for ; Thu, 18 Jan 2018 10:31:58 -0800 (PST) Sender: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Thu, 18 Jan 2018 15:30:55 -0300 Message-Id: <20180118183108.16009-4-f4bug@amsat.org> In-Reply-To: <20180118183108.16009-1-f4bug@amsat.org> References: <20180118183108.16009-1-f4bug@amsat.org> In-Reply-To: <20180118182510.15630-1-f4bug@amsat.org> References: <20180118182510.15630-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [PATCH v8 04/17] sdhci: add a check_capab_baseclock() qtest List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paolo Bonzini , Alistair Francis , Peter Maydell , Stefan Hajnoczi Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org, Kevin O'Connor , "Edgar E . Iglesias" , Andrey Smirnov , Marcel Apfelbaum Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Stefan Hajnoczi --- tests/sdhci-test.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/tests/sdhci-test.c b/tests/sdhci-test.c index 645f61dc48..bd5090162f 100644 --- a/tests/sdhci-test.c +++ b/tests/sdhci-test.c @@ -14,6 +14,7 @@ #include "hw/pci/pci.h" #define SDHC_CAPAB 0x40 +FIELD(SDHC_CAPAB, BASECLKFREQ, 8, 8); /* since v2 */ #define SDHC_HCVER 0xFE static const struct sdhci_t { @@ -95,6 +96,18 @@ static void check_capab_readonly(uintptr_t addr) g_assert_cmpuint(capab1, ==, capab0); } +static void check_capab_baseclock(uintptr_t addr, uint8_t expected_freq) +{ + uint64_t capab, capab_freq; + + if (!expected_freq) { + return; + } + capab = sdhci_readq(addr, SDHC_CAPAB); + capab_freq = FIELD_EX64(capab, SDHC_CAPAB, BASECLKFREQ); + g_assert_cmpuint(capab_freq, ==, expected_freq); +} + static void machine_start(const struct sdhci_t *test) { if (test->pci.vendor_id) { @@ -136,6 +149,7 @@ static void test_machine(const void *data) check_capab_capareg(test->sdhci.addr, test->sdhci.capab.reg); check_capab_readonly(test->sdhci.addr); + check_capab_baseclock(test->sdhci.addr, test->sdhci.baseclock); machine_stop(); } -- 2.15.1