qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: Paolo Bonzini <pbonzini@redhat.com>,
	Alistair Francis <alistair.francis@xilinx.com>,
	Peter Maydell <peter.maydell@linaro.org>,
	Stefan Hajnoczi <stefanha@redhat.com>
Cc: "Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	qemu-devel@nongnu.org, "Kevin O'Connor" <kevin@koconnor.net>,
	"Edgar E . Iglesias" <edgar.iglesias@xilinx.com>,
	"Andrey Smirnov" <andrew.smirnov@gmail.com>,
	"Marcel Apfelbaum" <marcel@redhat.com>
Subject: [Qemu-devel] [PATCH v8 05/17] sdhci: add a check_capab_sdma() qtest
Date: Thu, 18 Jan 2018 15:30:56 -0300	[thread overview]
Message-ID: <20180118183108.16009-5-f4bug@amsat.org> (raw)
In-Reply-To: <20180118183108.16009-1-f4bug@amsat.org>
In-Reply-To: <20180118182510.15630-1-f4bug@amsat.org>

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
---
 tests/sdhci-test.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/tests/sdhci-test.c b/tests/sdhci-test.c
index bd5090162f..3f6377474c 100644
--- a/tests/sdhci-test.c
+++ b/tests/sdhci-test.c
@@ -15,6 +15,7 @@
 
 #define SDHC_CAPAB                      0x40
 FIELD(SDHC_CAPAB, BASECLKFREQ,               8, 8); /* since v2 */
+FIELD(SDHC_CAPAB, SDMA,                     22, 1);
 #define SDHC_HCVER                      0xFE
 
 static const struct sdhci_t {
@@ -108,6 +109,15 @@ static void check_capab_baseclock(uintptr_t addr, uint8_t expected_freq)
     g_assert_cmpuint(capab_freq, ==, expected_freq);
 }
 
+static void check_capab_sdma(uintptr_t addr, bool supported)
+{
+    uint64_t capab, capab_sdma;
+
+    capab = sdhci_readq(addr, SDHC_CAPAB);
+    capab_sdma = FIELD_EX64(capab, SDHC_CAPAB, SDMA);
+    g_assert_cmpuint(capab_sdma, ==, supported);
+}
+
 static void machine_start(const struct sdhci_t *test)
 {
     if (test->pci.vendor_id) {
@@ -149,6 +159,7 @@ static void test_machine(const void *data)
 
     check_capab_capareg(test->sdhci.addr, test->sdhci.capab.reg);
     check_capab_readonly(test->sdhci.addr);
+    check_capab_sdma(test->sdhci.addr, test->sdhci.capab.sdma);
     check_capab_baseclock(test->sdhci.addr, test->sdhci.baseclock);
 
     machine_stop();
-- 
2.15.1

  parent reply	other threads:[~2018-01-18 18:32 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-18 18:24 [Qemu-devel] [PATCH v8 00/17] SDHCI: clean v1/v2 Specs (part 2) Philippe Mathieu-Daudé
2018-01-18 18:30 ` [Qemu-devel] [PATCH v8 01/17] sdhci: use error_propagate(local_err) in realize() Philippe Mathieu-Daudé
2018-01-19 17:59   ` Alistair Francis
2018-01-18 18:30 ` [Qemu-devel] [PATCH v8 02/17] sdhci: add qtest to check the SD capabilities register Philippe Mathieu-Daudé
2018-01-18 18:30 ` [Qemu-devel] [PATCH v8 03/17] sdhci: add check_capab_readonly() qtest Philippe Mathieu-Daudé
2018-01-18 18:30 ` [Qemu-devel] [PATCH v8 04/17] sdhci: add a check_capab_baseclock() qtest Philippe Mathieu-Daudé
2018-01-18 18:30 ` Philippe Mathieu-Daudé [this message]
2018-01-18 18:30 ` [Qemu-devel] [PATCH v8 06/17] sdhci: add qtest to check the SD Spec version Philippe Mathieu-Daudé
2018-01-18 18:30 ` [Qemu-devel] [PATCH v8 07/17] sdhci: add init_readonly_registers() to initialize the CAPAB register Philippe Mathieu-Daudé
2018-01-19 18:01   ` Alistair Francis
2018-01-18 18:30 ` [Qemu-devel] [PATCH v8 08/17] sdhci: add a 'spec_version property' (default to v2) Philippe Mathieu-Daudé
2018-01-18 18:31 ` [Qemu-devel] [PATCH v8 09/17] sdhci: add basic Spec v1 capabilities Philippe Mathieu-Daudé
2018-01-19 18:19   ` Alistair Francis
2018-01-18 18:31 ` [Qemu-devel] [PATCH v8 10/17] sdhci: add max-block-length capability (Spec v1) Philippe Mathieu-Daudé
2018-01-18 18:31 ` [Qemu-devel] [PATCH v8 13/17] sdhci: Fix 64-bit ADMA2 Philippe Mathieu-Daudé
2018-01-18 18:31 ` [Qemu-devel] [PATCH v8 15/17] hw/arm/xilinx_zynq: implement SDHCI Spec v2 Philippe Mathieu-Daudé
2018-01-18 18:31 ` [Qemu-devel] [PATCH v8 16/17] hw/arm/exynos4210: " Philippe Mathieu-Daudé
2018-01-21 16:49   ` Krzysztof Kozlowski
2018-01-18 18:31 ` [Qemu-devel] [PATCH v8 17/17] sdhci: throw an error if capabilities are incorrectly configured Philippe Mathieu-Daudé

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20180118183108.16009-5-f4bug@amsat.org \
    --to=f4bug@amsat.org \
    --cc=alistair.francis@xilinx.com \
    --cc=andrew.smirnov@gmail.com \
    --cc=edgar.iglesias@xilinx.com \
    --cc=kevin@koconnor.net \
    --cc=marcel@redhat.com \
    --cc=pbonzini@redhat.com \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-devel@nongnu.org \
    --cc=stefanha@redhat.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).